--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/sh4/sh4dasm.in Tue Sep 18 08:58:23 2007 +0000 @@ -0,0 +1,303 @@ +/** + * $Id: sh4dasm.in,v 1.1 2007-08-23 12:33:27 nkeynes Exp $ + * + * SH4 CPU definition and disassembly functions + * + * Copyright (c) 2005 Nathan Keynes. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "sh4core.h" +#include "sh4dasm.h" +#include "mem.h" + +#define UNIMP(ir) snprintf( buf, len, "??? " ) + + +const struct reg_desc_struct sh4_reg_map[] = + { {"R0", REG_INT, &sh4r.r[0]}, {"R1", REG_INT, &sh4r.r[1]}, + {"R2", REG_INT, &sh4r.r[2]}, {"R3", REG_INT, &sh4r.r[3]}, + {"R4", REG_INT, &sh4r.r[4]}, {"R5", REG_INT, &sh4r.r[5]}, + {"R6", REG_INT, &sh4r.r[6]}, {"R7", REG_INT, &sh4r.r[7]}, + {"R8", REG_INT, &sh4r.r[8]}, {"R9", REG_INT, &sh4r.r[9]}, + {"R10",REG_INT, &sh4r.r[10]}, {"R11",REG_INT, &sh4r.r[11]}, + {"R12",REG_INT, &sh4r.r[12]}, {"R13",REG_INT, &sh4r.r[13]}, + {"R14",REG_INT, &sh4r.r[14]}, {"R15",REG_INT, &sh4r.r[15]}, + {"SR", REG_INT, &sh4r.sr}, {"GBR", REG_INT, &sh4r.gbr}, + {"SSR",REG_INT, &sh4r.ssr}, {"SPC", REG_INT, &sh4r.spc}, + {"SGR",REG_INT, &sh4r.sgr}, {"DBR", REG_INT, &sh4r.dbr}, + {"VBR",REG_INT, &sh4r.vbr}, + {"PC", REG_INT, &sh4r.pc}, {"PR", REG_INT, &sh4r.pr}, + {"MACL",REG_INT, &sh4r.mac},{"MACH",REG_INT, ((uint32_t *)&sh4r.mac)+1}, + {"FPUL", REG_INT, &sh4r.fpul}, {"FPSCR", REG_INT, &sh4r.fpscr}, + {NULL, 0, NULL} }; + + +const struct cpu_desc_struct sh4_cpu_desc = + { "SH4", sh4_disasm_instruction, sh4_execute_instruction, mem_has_page, + sh4_set_breakpoint, sh4_clear_breakpoint, sh4_get_breakpoint, 2, + (char *)&sh4r, sizeof(sh4r), sh4_reg_map, + &sh4r.pc }; + +uint32_t sh4_disasm_instruction( uint32_t pc, char *buf, int len, char *opcode ) +{ + uint16_t ir = sh4_read_word(pc); + +#define UNDEF(ir) snprintf( buf, len, "???? " ); +#define RN(ir) ((ir&0x0F00)>>8) +#define RN_BANK(ir) ((ir&0x0070)>>4) +#define RM(ir) ((ir&0x00F0)>>4) +#define DISP4(ir) (ir&0x000F) /* 4-bit displacements are *not* sign extended */ +#define DISP8(ir) (ir&0x00FF) +#define PCDISP8(ir) SIGNEXT8(ir&0x00FF) +#define UIMM8(ir) (ir&0x00FF) +#define IMM8(ir) SIGNEXT8(ir&0x00FF) +#define DISP12(ir) SIGNEXT12(ir&0x0FFF) +#define FVN(ir) ((ir&0x0C00)>>10) +#define FVM(ir) ((ir&0x0300)>>8) + + sprintf( opcode, "%02X %02X", ir&0xFF, ir>>8 ); + +%% +ADD Rm, Rn {: snprintf( buf, len, "ADD R%d, R%d", Rm, Rn ); :} +ADD #imm, Rn {: snprintf( buf, len, "ADD #%d, R%d", imm, Rn ); :} +ADDC Rm, Rn {: snprintf( buf, len, "ADDC R%d, R%d", Rm, Rn ); :} +ADDV Rm, Rn {: snprintf( buf, len, "ADDV R%d, R%d", Rm, Rn ); :} +AND Rm, Rn {: snprintf( buf, len, "AND R%d, R%d", Rm, Rn ); :} +AND #imm, R0 {: snprintf( buf, len, "ADD #%d, R0", imm ); :} +AND.B #imm, @(R0, GBR) {: snprintf( buf, len, "AND.B #%d, @(R0, GBR)", imm ); :} +BF disp {: snprintf( buf, len, "BF $%xh", disp+pc+4 ); :} +BF/S disp {: snprintf( buf, len, "BF/S $%xh", disp+pc+4 ); :} +BRA disp {: snprintf( buf, len, "BRA $%xh", disp+pc+4 ); :} +BRAF Rn {: snprintf( buf, len, "BRAF R%d", Rn ); :} +BSR disp {: snprintf( buf, len, "BSR $%xh", disp+pc+4 ); :} +BSRF Rn {: snprintf( buf, len, "BSRF R%d", Rn ); :} +BT disp {: snprintf( buf, len, "BT $%xh", disp+pc+4 ); :} +BT/S disp {: snprintf( buf, len, "BT/S $%xh", disp+pc+4 ); :} +CLRMAC {: snprintf( buf, len, "CLRMAC " ); :} +CLRS {: snprintf( buf, len, "CLRS " ); :} +CLRT {: snprintf( buf, len, "CLRT " ); :} +CMP/EQ Rm, Rn {: snprintf( buf, len, "CMP/EQ R%d, R%d", Rm, Rn ); :} +CMP/EQ #imm, R0 {: snprintf( buf, len, "CMP/EQ #%d, R0", imm ); :} +CMP/GE Rm, Rn {: snprintf( buf, len, "CMP/GE R%d, R%d", Rm, Rn ); :} +CMP/GT Rm, Rn {: snprintf( buf, len, "CMP/GT R%d, R%d", Rm, Rn ); :} +CMP/HI Rm, Rn {: snprintf( buf, len, "CMP/HI R%d, R%d", Rm, Rn ); :} +CMP/HS Rm, Rn {: snprintf( buf, len, "CMP/HS R%d, R%d", Rm, Rn ); :} +CMP/PL Rn {: snprintf( buf, len, "CMP/PL R%d", Rn ); :} +CMP/PZ Rn {: snprintf( buf, len, "CMP/PZ R%d", Rn ); :} +CMP/STR Rm, Rn {: snprintf( buf, len, "CMP/STR R%d, R%d", Rm, Rn ); :} +DIV0S Rm, Rn {: snprintf( buf, len, "DIV0S R%d, R%d", Rm, Rn ); :} +DIV0U {: snprintf( buf, len, "DIV0U " ); :} +DIV1 Rm, Rn {: snprintf( buf, len, "DIV1 R%d, R%d", Rm, Rn ); :} +DMULS.L Rm, Rn {: snprintf( buf, len, "DMULS.L R%d, R%d", Rm, Rn ); :} +DMULU.L RM, Rn {: snprintf( buf, len, "DMULU.L R%d, R%d", Rm, Rn ); :} +DT Rn {: snprintf( buf, len, "DT R%d", Rn ); :} +EXTS.B Rm, Rn {: snprintf( buf, len, "EXTS.B R%d, R%d", Rm, Rn ); :} +EXTS.W Rm, Rn {: snprintf( buf, len, "EXTS.W R%d, R%d", Rm, Rn ); :} +EXTU.B Rm, Rn {: snprintf( buf, len, "EXTU.B R%d, R%d", Rm, Rn ); :} +EXTU.W Rm, Rn {: snprintf( buf, len, "EXTU.W R%d, R%d", Rm, Rn ); :} +FABS FRn {: snprintf( buf, len, "FABS FR%d", FRn ); :} +FADD FRm, FRn {: snprintf( buf, len, "FADD FR%d, FR%d", FRm, FRn ); :} +FCMP/EQ FRm, FRn {: snprintf( buf, len, "FCMP/EQ FR%d, FR%d", FRm, FRn ); :} +FCMP/GT FRm, FRn {: snprintf( buf, len, "FCMP/QT FR%d, FR%d", FRm, FRn ); :} +FCNVDS FRm, FPUL {: snprintf( buf, len, "FCNVDS FR%d, FPUL", FRm ); :} +FCNVSD FPUL, FRn {: snprintf( buf, len, "FCNVSD FPUL, FR%d", FRn ); :} +FDIV FRm, FRn {: snprintf( buf, len, "FDIV FR%d, FR%d", FRm, FRn ); :} +FIPR FVm, FVn {: snprintf( buf, len, "FIPR FV%d, FV%d", FVm, FVn ); :} +FLDS FRm, FPUL {: snprintf( buf, len, "FLDS FR%d, FPUL", FRm ); :} +FLDI0 FRn {: snprintf( buf, len, "FLDI0 FR%d", FRn ); :} +FLDI1 FRn {: snprintf( buf, len, "FLDI1 FR%d", FRn ); :} +FLOAT FPUL, FRn {: snprintf( buf, len, "FLOAT FPUL, FR%d", FRn ); :} +FMAC FR0, FRm, FRn {: snprintf( buf, len, "FMAC FR0, FR%d, FR%d", FRm, FRn ); :} +FMOV FRm, FRn {: snprintf( buf, len, "FMOV FR%d, FR%d", FRm, FRn ); :} +FMOV FRm, @Rn {: snprintf( buf, len, "FMOV FR%d, @R%d", FRm, Rn ); :} +FMOV FRm, @-Rn {: snprintf( buf, len, "FMOV FR%d, @-R%d", FRm, Rn ); :} +FMOV FRm, @(R0, Rn) {: snprintf( buf, len, "FMOV FR%d, @(R0, R%d)", FRm, Rn ); :} +FMOV @Rm, FRn {: snprintf( buf, len, "FMOV @R%d, FR%d", Rm, FRn ); :} +FMOV @Rm+, FRn {: snprintf( buf, len, "FMOV @R%d+, FR%d", Rm, FRn ); :} +FMOV @(R0, Rm), FRn {: snprintf( buf, len, "FMOV @(R0, R%d), FR%d", Rm, FRn ); :} +FMUL FRm, FRn {: snprintf( buf, len, "FMUL FRm, FR%d", FRm, FRn ); :} +FNEG FRn {: snprintf( buf, len, "FNEG FR%d", FRn ); :} +FRCHG {: snprintf( buf, len, "FRCHG " ); :} +FSCA FPUL, FRn {: snprintf( buf, len, "FSCA FPUL, FR%d", FRn ); :} +FSCHG {: snprintf( buf, len, "FSCHG " ); :} +FSQRT FRn {: snprintf( buf, len, "FSQRT FR%d", FRn ); :} +FSRRA FRn {: snprintf( buf, len, "FSRRA FR%d", FRn ); :} +FSTS FPUL, FRn {: snprintf( buf, len, "FSTS FPUL, FR%d", FRn ); :} +FSUB FRm, FRn {: snprintf( buf, len, "FSUB FRm, FR%d", FRm, FRn ); :} +FTRC FRm, FPUL {: snprintf( buf, len, "FTRC FR%d, FPUL", FRm ); :} +FTRV XMTRX, FVn {: snprintf( buf, len, "FTRV XMTRX, FV%d", FVn ); :} +JMP @Rn {: snprintf( buf, len, "JMP @R%d", Rn ); :} +JSR @Rn {: snprintf( buf, len, "JSR @R%d", Rn ); :} +LDC Rm, GBR {: snprintf( buf, len, "LDC R%d, GBR", Rm ); :} +LDC Rm, SR {: snprintf( buf, len, "LDC R%d, SR", Rm ); :} +LDC Rm, VBR {: snprintf( buf, len, "LDC R%d, VBR", Rm ); :} +LDC Rm, SSR {: snprintf( buf, len, "LDC R%d, SSR", Rm ); :} +LDC Rm, SGR {: snprintf( buf, len, "LDC R%d, SGR", Rm ); :} +LDC Rm, SPC {: snprintf( buf, len, "LDC R%d, SPC", Rm ); :} +LDC Rm, DBR {: snprintf( buf, len, "LDC R%d, DBR", Rm ); :} +LDC Rm, Rn_BANK {: snprintf( buf, len, "LDC R%d, R%d_BANK", Rm, Rn_BANK ); :} +LDS Rm, FPSCR {: snprintf( buf, len, "LDS R%d, FPSCR", Rm ); :} +LDS Rm, FPUL {: snprintf( buf, len, "LDS R%d, FPUL", Rm ); :} +LDS Rm, MACH {: snprintf( buf, len, "LDS R%d, MACH", Rm ); :} +LDS Rm, MACL {: snprintf( buf, len, "LDS R%d, MACL", Rm ); :} +LDS Rm, PR {: snprintf( buf, len, "LDS R%d, PR", Rm ); :} +LDC.L @Rm+, GBR {: snprintf( buf, len, "LDC.L @R%d+, GBR", Rm ); :} +LDC.L @Rm+, SR {: snprintf( buf, len, "LDC.L @R%d+, SR", Rm ); :} +LDC.L @Rm+, VBR {: snprintf( buf, len, "LDC.L @R%d+, VBR", Rm ); :} +LDC.L @Rm+, SSR {: snprintf( buf, len, "LDC.L @R%d+, SSR", Rm ); :} +LDC.L @Rm+, SGR {: snprintf( buf, len, "LDC.L @R%d+, SGR", Rm ); :} +LDC.L @Rm+, SPC {: snprintf( buf, len, "LDC.L @R%d+, SPC", Rm ); :} +LDC.L @Rm+, DBR {: snprintf( buf, len, "LDC.L @R%d+, DBR", Rm ); :} +LDC.L @Rm+, Rn_BANK{: snprintf( buf, len, "LDC.L @R%d+, @R%d+_BANK", Rm, Rn_BANK ); :} +LDS.L @Rm+, FPSCR{: snprintf( buf, len, "LDS.L @R%d+, FPSCR", Rm ); :} +LDS.L @Rm+, FPUL {: snprintf( buf, len, "LDS.L @R%d+, FPUL", Rm ); :} +LDS.L @Rm+, MACH {: snprintf( buf, len, "LDS.L @R%d+, MACH", Rm ); :} +LDS.L @Rm+, MACL {: snprintf( buf, len, "LDS.L @R%d+, MACL", Rm ); :} +LDS.L @Rm+, PR {: snprintf( buf, len, "LDS.L @R%d+, PR", Rm ); :} +LDTLB {: snprintf( buf, len, "LDTLB " ); :} +MAC.L @Rm+, @Rn+ {: snprintf( buf, len, "MAC.L @R%d+, @R%d+", Rm, Rn ); :} +MAC.W @Rm+, @Rn+ {: snprintf( buf, len, "MAC.W @R%d+, @R%d+", Rm, Rn ); :} +MOV Rm, Rn {: snprintf( buf, len, "MOV R%d, R%d", Rm, Rn ); :} +MOV #imm, Rn {: snprintf( buf, len, "MOV #%d, R%d", imm, Rn ); :} +MOV.B Rm, @Rn {: snprintf( buf, len, "MOV.B R%d, @R%d", Rm, Rn ); :} +MOV.B Rm, @-Rn {: snprintf( buf, len, "MOV.B R%d, @-R%d", Rm, Rn ); :} +MOV.B Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.B R%d, @(R0, R%d)", Rm, Rn ); :} +MOV.B R0, @(disp, GBR) {: snprintf( buf, len, "MOV.B R0, @(%d, GBR)", disp ); :} +MOV.B R0, @(disp, Rn) {: snprintf( buf, len, "MOV.B R0, @(%d, R%d)", disp, Rn ); :} +MOV.B @Rm, Rn {: snprintf( buf, len, "MOV.B @R%d, R%d", Rm, Rn ); :} +MOV.B @Rm+, Rn {: snprintf( buf, len, "MOV.B @R%d+, R%d", Rm, Rn ); :} +MOV.B @(R0, Rm), Rn {: snprintf( buf, len, "MOV.B @(R0, R%d), R%d", Rm, Rn ); :} +MOV.B @(disp, GBR), R0{: snprintf( buf, len, "MOV.B @(%d, GBR), R0", disp ); :} +MOV.B @(disp, Rm), R0 {: snprintf( buf, len, "MOV.B @(%d, R%d), R0", disp, Rm ); :} +MOV.L Rm, @Rn {: snprintf( buf, len, "MOV.L R%d, @R%d", Rm, Rn ); :} +MOV.L Rm, @-Rn {: snprintf( buf, len, "MOV.L R%d, @-R%d", Rm, Rn ); :} +MOV.L Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.L R%d, @(R0, R%d)", Rm, Rn ); :} +MOV.L R0, @(disp, GBR) {: snprintf( buf, len, "MOV.L R0, @(%d, GBR)", disp ); :} +MOV.L Rm, @(disp, Rn) {: snprintf( buf, len, "MOV.L R%d, @(%d, R%d)", Rm, disp, Rn ); :} +MOV.L @Rm, Rn {: snprintf( buf, len, "MOV.L @R%d, R%d", Rm, Rn ); :} +MOV.L @Rm+, Rn {: snprintf( buf, len, "MOV.L @R%d+, R%d", Rm, Rn ); :} +MOV.L @(R0, Rm), Rn {: snprintf( buf, len, "MOV.L @(R0, R%d), R%d", Rm, Rn ); :} +MOV.L @(disp, GBR), R0 {: snprintf( buf, len, "MOV.L @(%d, GBR), R0",disp ); :} +MOV.L @(disp, PC), Rn {: snprintf( buf, len, "MOV.L @($%xh), R%d ; <- #%08x", disp + (pc & 0xFFFFFFFC) + 4, Rn, sh4_read_long(disp+(pc&0xFFFFFFFC)+4) ); :} +MOV.L @(disp, Rm), Rn {: snprintf( buf, len, "MOV.L @(%d, R%d), @R%d", disp, Rm, Rn ); :} +MOV.W Rm, @Rn {: snprintf( buf, len, "MOV.W R%d, @R%d", Rm, Rn ); :} +MOV.W Rm, @-Rn {: snprintf( buf, len, "MOV.W R%d, @-R%d", Rm, Rn ); :} +MOV.W Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.W R%d, @(R0, R%d)", Rm, Rn ); :} +MOV.W R0, @(disp, GBR) {: snprintf( buf, len, "MOV.W R0, @(%d, GBR)", disp); :} +MOV.W R0, @(disp, Rn) {: snprintf( buf, len, "MOV.W R0, @(%d, Rn)", disp, Rn ); :} +MOV.W @Rm, Rn {: snprintf( buf, len, "MOV.W @R%d, R%d", Rm, Rn ); :} +MOV.W @Rm+, Rn {: snprintf( buf, len, "MOV.W @R%d+, R%d", Rm, Rn ); :} +MOV.W @(R0, Rm), Rn {: snprintf( buf, len, "MOV.W @(R0, R%d), R%d", Rm, Rn ); :} +MOV.W @(disp, GBR), R0 {: snprintf( buf, len, "MOV.W @(%d, GBR), R0", disp ); :} +MOV.W @(disp, PC), Rn {: snprintf( buf, len, "MOV.W @($%xh), R%d ; <- #%08x", disp + pc + 4, Rn, sh4_read_word(disp+pc+4) ); :} +MOV.W @(disp, Rm), R0 {: snprintf( buf, len, "MOV.W @(%d, R%d), R0", disp, Rm ); :} +MOVA @(disp, PC), R0 {: snprintf( buf, len, "MOVA @($%xh), R0", disp + (pc&0xFFFFFFFC) + 4 ); :} +MOVCA.L R0, @Rn {: snprintf( buf, len, "MOVCA.L R0, @R%d", Rn ); :} +MOVT Rn {: snprintf( buf, len, "MOVT R%d", Rn ); :} +MUL.L Rm, Rn {: snprintf( buf, len, "MUL.L R%d, R%d", Rm, Rn ); :} +MULS.W Rm, Rn {: snprintf( buf, len, "MULS.W R%d, R%d", Rm, Rn ); :} +MULU.W Rm, Rn {: snprintf( buf, len, "MULU.W R%d, R%d", Rm, Rn ); :} +NEG Rm, Rn {: snprintf( buf, len, "NEG R%d, R%d", Rm, Rn ); :} +NEGC Rm, Rn {: snprintf( buf, len, "NEGC R%d, R%d", Rm, Rn ); :} +NOP {: snprintf( buf, len, "NOP " ); :} +NOT Rm, Rn {: snprintf( buf, len, "NOT R%d, R%d", Rm, Rn ); :} +OCBI @Rn {: snprintf( buf, len, "OCBI @R%d", Rn ); :} +OCBP @Rn {: snprintf( buf, len, "OCBP @R%d", Rn ); :} +OCBWB @Rn {: snprintf( buf, len, "OCBWB @R%d", Rn ); :} +OR Rm, Rn {: snprintf( buf, len, "OR R%d, R%d", Rm, Rn ); :} +OR #imm, R0 {: snprintf( buf, len, "OR #%d, R0", imm ); :} +OR.B #imm, @(R0, GBR) {: snprintf( buf, len, "OR.B #%d, @(R0, GBR)", imm ); :} +PREF @Rn {: snprintf( buf, len, "PREF R%d", Rn ); :} +ROTCL Rn {: snprintf( buf, len, "ROTCL R%d", Rn ); :} +ROTCR Rn {: snprintf( buf, len, "ROTCR R%d", Rn ); :} +ROTL Rn {: snprintf( buf, len, "ROTL R%d", Rn ); :} +ROTR Rn {: snprintf( buf, len, "ROTR R%d", Rn ); :} +RTE {: snprintf( buf, len, "RTE " ); :} +RTS {: snprintf( buf, len, "RTS " ); :} +SETS {: snprintf( buf, len, "SETS " ); :} +SETT {: snprintf( buf, len, "SETT " ); :} +SHAD Rm, Rn {: snprintf( buf, len, "SHAD R%d, R%d", Rm, Rn ); :} +SHAL Rn {: snprintf( buf, len, "SHAL R%d", Rn ); :} +SHAR Rn {: snprintf( buf, len, "SHAR R%d", Rn ); :} +SHLD Rm, Rn {: snprintf( buf, len, "SHLD R%d, R%d", Rm, Rn ); :} +SHLL Rn {: snprintf( buf, len, "SHLL R%d", Rn ); :} +SHLL2 Rn {: snprintf( buf, len, "SHLL2 R%d", Rn ); :} +SHLL8 Rn {: snprintf( buf, len, "SHLL8 R%d", Rn ); :} +SHLL16 Rn {: snprintf( buf, len, "SHLL16 R%d", Rn ); :} +SHLR Rn {: snprintf( buf, len, "SHLR R%d", Rn ); :} +SHLR2 Rn {: snprintf( buf, len, "SHLR2 R%d", Rn ); :} +SHLR8 Rn {: snprintf( buf, len, "SHLR8 R%d", Rn ); :} +SHLR16 Rn {: snprintf( buf, len, "SHLR16 R%d", Rn ); :} +SLEEP {: snprintf( buf, len, "SLEEP " ); :} +STC SR, Rn {: snprintf( buf, len, "STC SR, R%d", Rn ); :} +STC GBR, Rn {: snprintf( buf, len, "STC GBR, R%d", Rn ); :} +STC VBR, Rn {: snprintf( buf, len, "STC VBR, R%d", Rn ); :} +STC SSR, Rn {: snprintf( buf, len, "STC SSR, R%d", Rn ); :} +STC SPC, Rn {: snprintf( buf, len, "STC SPC, R%d", Rn ); :} +STC SGR, Rn {: snprintf( buf, len, "STC SGR, R%d", Rn ); :} +STC DBR, Rn {: snprintf( buf, len, "STC DBR, R%d", Rn ); :} +STC Rm_BANK, Rn {: snprintf( buf, len, "STC R%d_BANK, R%d", Rm_BANK, Rn ); :} +STS FPSCR, Rn {: snprintf( buf, len, "STS FPSCR, R%d", Rn ); :} +STS FPUL, Rn {: snprintf( buf, len, "STS FPUL, R%d", Rn ); :} +STS MACH, Rn {: snprintf( buf, len, "STS MACH, R%d", Rn ); :} +STS MACL, Rn {: snprintf( buf, len, "STS MACL, R%d", Rn ); :} +STS PR, Rn {: snprintf( buf, len, "STS PR, R%d", Rn ); :} +STC.L SR, @-Rn {: snprintf( buf, len, "STC.L SR, @-R%d", Rn ); :} +STC.L GBR, @-Rn {: snprintf( buf, len, "STC.L GBR, @-R%d", Rn ); :} +STC.L VBR, @-Rn {: snprintf( buf, len, "STC.L VBR, @-R%d", Rn ); :} +STC.L SSR, @-Rn {: snprintf( buf, len, "STC.L SSR, @-R%d", Rn ); :} +STC.L SPC, @-Rn {: snprintf( buf, len, "STC.L SPC, @-R%d", Rn ); :} +STC.L SGR, @-Rn {: snprintf( buf, len, "STC.L SGR, @-R%d", Rn ); :} +STC.L DBR, @-Rn {: snprintf( buf, len, "STC.L DBR, @-R%d", Rn ); :} +STC.L Rm_BANK, @-Rn {: snprintf( buf, len, "STC.L @-R%d_BANK, @-R%d", Rm_BANK, Rn ); :} +STS.L FPSCR, @-Rn{: snprintf( buf, len, "STS.L FPSCR, @-R%d", Rn ); :} +STS.L FPUL, @-Rn {: snprintf( buf, len, "STS.L FPUL, @-R%d", Rn ); :} +STS.L MACH, @-Rn {: snprintf( buf, len, "STS.L MACH, @-R%d", Rn ); :} +STS.L MACL, @-Rn {: snprintf( buf, len, "STS.L MACL, @-R%d", Rn ); :} +STS.L PR, @-Rn {: snprintf( buf, len, "STS.L PR, @-R%d", Rn ); :} +SUB Rm, Rn {: snprintf( buf, len, "SUB R%d, R%d", Rm, Rn ); :} +SUBC Rm, Rn {: snprintf( buf, len, "SUBC R%d, R%d", Rm, Rn ); :} +SUBV Rm, Rn {: snprintf( buf, len, "SUBV R%d, R%d", Rm, Rn ); :} +SWAP.B Rm, Rn {: snprintf( buf, len, "SWAP.B R%d, R%d", Rm, Rn ); :} +SWAP.W Rm, Rn {: snprintf( buf, len, "SWAP.W R%d, R%d", Rm, Rn ); :} +TAS.B @Rn {: snprintf( buf, len, "TAS.B R%d", Rn ); :} +TRAPA #imm {: snprintf( buf, len, "TRAPA #%d", imm ); :} +TST Rm, Rn {: snprintf( buf, len, "TST R%d, R%d", Rm, Rn ); :} +TST #imm, R0 {: snprintf( buf, len, "TST #%d, R0", imm ); :} +TST.B #imm, @(R0, GBR) {: snprintf( buf, len, "TST.B #%d, @(R0, GBR)", imm ); :} +XOR Rm, Rn {: snprintf( buf, len, "XOR R%d, R%d", Rm, Rn ); :} +XOR #imm, R0 {: snprintf( buf, len, "XOR #%d, R0", imm ); :} +XOR.B #imm, @(R0, GBR) {: snprintf( buf, len, "XOR.B #%d, @(R0, GBR)", imm ); :} +XTRCT Rm, Rn {: snprintf( buf, len, "XTRCT R%d, R%d", Rm, Rn ); :} +UNDEF {: snprintf( buf, len, "UNDEF " ); :} +%% + return pc+2; +} + + +void sh4_disasm_region( const gchar *filename, int from, int to ) +{ + int pc; + char buf[80]; + char opcode[16]; + FILE *f; + + f = fopen( filename, "w" ); + for( pc = from; pc < to; pc+=2 ) { + buf[0] = '\0'; + sh4_disasm_instruction( pc, + buf, sizeof(buf), opcode ); + fprintf( f, " %08x: %s %s\n", pc, opcode, buf ); + } + fclose(f); +}