--- a/test/testta4.data	Fri Aug 04 01:38:30 2006 +0000
+++ b/test/testta4.data	Fri Aug 18 09:33:19 2006 +0000
@@ -2309,3 +2309,78 @@
 0.5      31.6     0.7      F8878787
 31.5     31.6     0.7      F0565656
 tile 3 =
+[4.17 Test high memory (polygon buf)]
+config = 00100001 000E0013 007F0000 00000000 00070000 00060000 00070000
+input =
+80800002 E0000000 2083242D 00000000 00000000 00000000 00000000 00000000
+E0000000 0.0      0.1      0.2      00000000 00000000 FF00FF00 FE010203
+E0000000 31.2     0.3      0.4      00000000 00000000 FF0000FF FD040506
+F0000000 31.8     31.9     0.9      00000000 00000000 FFFFFFFF FB0A0B0C
+00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+output =
+E0A00000 2083242D 00000000
+0.0      0.1      0.2      FF00FF00
+31.2     0.3      0.4      FF0000FF
+31.8     31.9     0.9      FFFFFFFF
+tile 1 =
+8023C000
+[4.18 Test MB boundary spill]
+config = 00100001 000E0013 006FFFFC 00000000 00070000 00060000 00070000
+input =
+80800002 E0000000 2083242D 00000000 00000000 00000000 00000000 00000000
+E0000000 0.0      0.1      0.2      00000000 00000000 FF00FF00 FE010203
+E0000000 31.2     0.3      0.4      00000000 00000000 FF0000FF FD040506
+F0000000 31.8     31.9     0.9      00000000 00000000 FFFFFFFF FB0A0B0C
+80840002 E0000000 2083242D 00000000 00000000 00000000 00000000 00000000
+E0000000 0.0      0.1      0.2      00000000 00000000 FF00FF00 FE010203
+E0000000 31.2     0.3      0.4      00000000 00000000 FF0000FF FD040506
+E0000000 15.2     15.3     0.4      00000000 00000000 FF0000FF FD040506
+F0000000 31.8     31.9     0.9      00000000 00000000 FFFFFFFF FB0A0B0C
+00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+output =
+E0A00000 2083242D 00000000
+0.0      0.1      0.2      FF00FF00
+31.2     0.3      0.4      FF0000FF
+31.8     31.9     0.9      FFFFFFFF
+E0A00000 2083242D 00000000
+0.0      0.1      0.2      FF00FF00
+31.2     0.3      0.4      FF0000FF
+15.2     15.3     0.4      FF0000FF
+31.8     31.9     0.9      FFFFFFFF
+tile 1 =
+8023FFFF 6024000E
+[4.19 Test Wrap-around boundary spill]
+config = 00100001 000E0013 007FFFF8 00100000 00070000 00060000 00070000
+input =
+80800002 E0000000 2083242D 00000000 00000000 00000000 00000000 00000000
+E0000000 0.0      0.1      0.2      00000000 00000000 FF00FF00 FE010203
+E0000000 31.2     0.3      0.4      00000000 00000000 FF0000FF FD040506
+F0000000 31.8     31.9     0.9      00000000 00000000 FFFFFFFF FB0A0B0C
+80840002 E0000000 2083242D 00000000 00000000 00000000 00000000 00000000
+E0000000 0.0      0.1      0.2      00000000 00000000 FF00FF00 FE010203
+E0000000 31.2     0.3      0.4      00000000 00000000 FF0000FF FD040506
+E0000000 15.2     15.3     0.4      00000000 00000000 FF0000FF FD040506
+F0000000 31.8     31.9     0.9      00000000 00000000 FFFFFFFF FB0A0B0C
+80840002 E0000000 2083242D 00000000 00000000 00000000 00000000 00000000
+E0000000 0.0      0.1      0.2      00000000 00000000 FF00FF00 FE010203
+E0000000 31.2     0.3      0.4      00000000 00000000 FF0000FF FD040506
+E0000000 15.2     15.3     0.4      00000000 00000000 FF0000FF FD040506
+F0000000 31.8     31.9     0.9      00000000 00000000 FFFFFFFF FB0A0B0C
+00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+output =
+E0A00000 2083242D FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE FEFEFEFE FEFEFEFE
+FEFEFEFE FEFEFEFE 
+tile 1 =
+8023FFFE 6024000D 60240020