# HG changeset patch
# User nkeynes
# Date 1169118841 0
# Node ID 1191085c5988aa07bb2913ee6200191c4cf7cd84
# Parent  2855cf8709a52eeeac2045504004f845aa9641b3
Rearrange asic cascade events

--- a/src/asic.c	Thu Jan 18 11:13:12 2007 +0000
+++ b/src/asic.c	Thu Jan 18 11:14:01 2007 +0000
@@ -1,5 +1,5 @@
 /**
- * $Id: asic.c,v 1.24 2007-01-17 21:27:20 nkeynes Exp $
+ * $Id: asic.c,v 1.25 2007-01-18 11:14:01 nkeynes Exp $
  *
  * Support for the miscellaneous ASIC functions (Primarily event multiplexing,
  * and DMA). 
@@ -217,13 +217,27 @@
         intc_raise_interrupt( INT_IRQ11 );
     if( result & MMIO_READ(ASIC, IRQC0 + offset) )
         intc_raise_interrupt( INT_IRQ9 );
+
+    if( event >= 64 ) { /* Third word */
+	asic_event( EVENT_CASCADE2 );
+    } else if( event >= 32 ) { /* Second word */
+	asic_event( EVENT_CASCADE1 );
+    }
 }
 
 void asic_clear_event( int event ) {
     int offset = ((event&0x60)>>3);
     uint32_t result = MMIO_READ(ASIC, PIRQ0 + offset)  & (~(1<<(event&0x1F)));
     MMIO_WRITE( ASIC, PIRQ0 + offset, result );
-
+    if( result == 0 ) {
+	/* clear cascades if necessary */
+	if( event >= 64 ) {
+	    MMIO_WRITE( ASIC, PIRQ0, MMIO_READ( ASIC, PIRQ0 ) & 0x7FFFFFFF );
+	} else if( event >= 32 ) {
+	    MMIO_WRITE( ASIC, PIRQ0, MMIO_READ( ASIC, PIRQ0 ) & 0xBFFFFFFF );
+	}
+    }
+	    
     asic_check_cleared_events();
 }
 
@@ -297,12 +311,19 @@
 {
     switch( reg ) {
     case PIRQ1:
-	val = val & 0xFFFFFFFE; /* Prevent the IDE event from clearing */
-	/* fallthrough */
+	break; /* Treat this as read-only for the moment */
     case PIRQ0:
+	val = val & 0x3FFFFFFF; /* Top two bits aren't clearable */
+	MMIO_WRITE( ASIC, reg, MMIO_READ(ASIC, reg)&~val );
+	asic_check_cleared_events();
+	break;
     case PIRQ2:
-	/* Clear any interrupts */
-	MMIO_WRITE( ASIC, reg, MMIO_READ(ASIC, reg)&~val );
+	/* Clear any events */
+	val = MMIO_READ(ASIC, reg)&(~val);
+	MMIO_WRITE( ASIC, reg, val );
+	if( val == 0 ) { /* all clear - clear the cascade bit */
+	    MMIO_WRITE( ASIC, PIRQ0, MMIO_READ( ASIC, PIRQ0 ) & 0x7FFFFFFF );
+	}
 	asic_check_cleared_events();
 	break;
     case SYSRESET:
--- a/src/asic.h	Thu Jan 18 11:13:12 2007 +0000
+++ b/src/asic.h	Thu Jan 18 11:14:01 2007 +0000
@@ -1,5 +1,5 @@
 /**
- * $Id: asic.h,v 1.17 2007-01-17 21:27:20 nkeynes Exp $
+ * $Id: asic.h,v 1.18 2007-01-18 11:14:01 nkeynes Exp $
  *
  * Support for the miscellaneous ASIC functions (Primarily event multiplexing,
  * and DMA). Includes MMIO definitions for the 5f6000 and 5f7000 regions, 
@@ -175,7 +175,7 @@
 #define EVENT_PVR_RENDER_DONE 2
 #define EVENT_SCANLINE2 3
 #define EVENT_SCANLINE1 4
-#define EVENT_RETRACE   5
+#define EVENT_HPOS   5
 #define EVENT_PVR_YUV_DONE 6
 #define EVENT_PVR_OPAQUE_DONE 7
 #define EVENT_PVR_OPAQUEMOD_DONE 8
@@ -190,8 +190,9 @@
 #define EVENT_G2_DMA3  18
 #define EVENT_PVR_DMA   19
 #define EVENT_PVR_PUNCHOUT_DONE 21
+#define EVENT_CASCADE1  30 /* Set if something in the second word is active */
+#define EVENT_CASCADE2  31 /* Set if something in the third word is active */
 
-#define EVENT_TA_ERROR  31
 #define EVENT_IDE       32
 #define EVENT_AICA      33
 
--- a/src/pvr2/tacore.c	Thu Jan 18 11:13:12 2007 +0000
+++ b/src/pvr2/tacore.c	Thu Jan 18 11:14:01 2007 +0000
@@ -1,5 +1,5 @@
 /**
- * $Id: tacore.c,v 1.9 2006-08-18 12:43:24 nkeynes Exp $
+ * $Id: tacore.c,v 1.10 2007-01-18 11:14:01 nkeynes Exp $
  *
  * PVR2 Tile Accelerator implementation
  *
@@ -327,7 +327,6 @@
 }
 
 static void ta_bad_input_error() {
-    asic_event( EVENT_TA_ERROR );
     asic_event( EVENT_PVR_BAD_INPUT );
 }
 
@@ -347,7 +346,6 @@
     for( rv=0; rv < length; rv++ ) {
 	if( posn == end ) {
 	    asic_event( EVENT_PVR_PRIM_ALLOC_FAIL );
-	    asic_event( EVENT_TA_ERROR );
 	    //	    ta_status.state = STATE_ERROR;
 	    break;
 	}
@@ -383,7 +381,6 @@
 	    return TA_NO_ALLOC;
 	} else if( newposn <= limit ) {
 	} else if( newposn <= (limit + ta_status.tilelist_size) ) {
-	    asic_event( EVENT_TA_ERROR );
 	    asic_event( EVENT_PVR_MATRIX_ALLOC_FAIL );
 	    MMIO_WRITE( PVR2, TA_LISTPOS, newposn );
 	} else {
@@ -402,7 +399,6 @@
 	    return TA_NO_ALLOC;
 	} else if( newposn >= limit ) {
 	} else if( newposn >= (limit - ta_status.tilelist_size) ) {
-	    asic_event( EVENT_TA_ERROR );
 	    asic_event( EVENT_PVR_MATRIX_ALLOC_FAIL );
 	    MMIO_WRITE( PVR2, TA_LISTPOS, newposn );
 	} else {