# HG changeset patch
# User nkeynes
# Date 1136213412 0
# Node ID eb7a73c9bcaeb41c05cf28b64bcef41fe1056abc
# Parent  d09f85b2a58343bdf267ed64a8ba446055d912db
AICA IRQ event work in progress

--- a/src/aica/aica.c	Mon Jan 02 14:49:51 2006 +0000
+++ b/src/aica/aica.c	Mon Jan 02 14:50:12 2006 +0000
@@ -1,5 +1,5 @@
 /**
- * $Id: aica.c,v 1.9 2005-12-26 11:52:56 nkeynes Exp $
+ * $Id: aica.c,v 1.10 2006-01-02 14:50:12 nkeynes Exp $
  * 
  * This is the core sound system (ie the bit which does the actual work)
  *
@@ -21,6 +21,7 @@
 #include "dream.h"
 #include "mem.h"
 #include "aica.h"
+#include "armcore.h"
 #define MMIO_IMPL
 #include "aica.h"
 
@@ -90,6 +91,47 @@
     return arm_load_state( f );
 }
 
+int aica_event_pending = 0;
+int aica_clear_count = 0;
+
+/* Note: This is probably not necessarily technically correct but it should
+ * work in the meantime.
+ */
+
+void aica_event( int event )
+{
+    if( aica_event_pending == 0 )
+	armr.int_pending |= CPSR_F;
+    aica_event_pending |= (1<<event);
+    
+    int pending = MMIO_READ( AICA2, AICA_IRQ );
+    if( pending == 0 || event < pending )
+	MMIO_WRITE( AICA2, AICA_IRQ, event );
+}
+
+void aica_clear_event( )
+{
+    aica_clear_count++;
+    if( aica_clear_count == 4 ) {
+	int i;
+	aica_clear_count = 0;
+
+	for( i=0; i<8; i++ ) {
+	    if( aica_event_pending & (1<<i) ) {
+		aica_event_pending &= ~(1<<i);
+		break;
+	    }
+	}
+	for( ;i<8; i++ ) {
+	    if( aica_event_pending & (1<<i) ) {
+		MMIO_WRITE( AICA2, AICA_IRQ, i );
+		break;
+	    }
+	}
+	if( aica_event_pending == 0 )
+	    armr.int_pending &= ~CPSR_F;
+    }
+}
 /** Channel register structure:
  * 00  4  Channel config
  * 04  4  Waveform address lo (16 bits)
@@ -142,6 +184,9 @@
 	}
 	MMIO_WRITE( AICA2, AICA_RESET, val );
 	break;
+    case AICA_IRQCLEAR:
+	aica_clear_event();
+	break;
     default:
 	MMIO_WRITE( AICA2, reg, val );
 	break;
--- a/src/aica/aica.h	Mon Jan 02 14:49:51 2006 +0000
+++ b/src/aica/aica.h	Mon Jan 02 14:50:12 2006 +0000
@@ -1,5 +1,5 @@
 /**
- * $Id: aica.h,v 1.4 2005-12-27 08:42:57 nkeynes Exp $
+ * $Id: aica.h,v 1.5 2006-01-02 14:50:12 nkeynes Exp $
  * 
  * MMIO definitions for the AICA sound chip. Note that the regions defined
  * here are relative to the SH4 memory map (0x00700000 based), rather than
@@ -32,14 +32,17 @@
 LONG_PORT( 0x040, CDDA_VOL_L, PORT_MRW, 0, "CDDA Volume left" )
 LONG_PORT( 0x044, CDDA_VOL_R, PORT_MRW, 0, "CDDA Volume right" )
 LONG_PORT( 0x800, VOL_MASTER, PORT_MRW, UNDEFINED, "Master volume" )
-LONG_PORT( 0x890, AICA_TIMER, PORT_MRW, 0, "IRQ Timer (?)" )
+LONG_PORT( 0x808, AICA_UNK7, PORT_MRW, 0, "AICA ??? 7" )
+LONG_PORT( 0x880, AICA_TIMER1, PORT_MRW, 0, "AICA Timer 1" )
+LONG_PORT( 0x890, AICA_TIMER2, PORT_MRW, 0, "AICA Timer 2" )
 LONG_PORT( 0x89C, AICA_UNK1, PORT_MRW, 0, "AICA ??? 1" )
 LONG_PORT( 0x8A4, AICA_UNK2, PORT_MRW, 0, "AICA ??? 2" )
 BYTE_PORT( 0x8A8, AICA_UNK3, PORT_MRW, 0, "AICA ??? 3" )
 BYTE_PORT( 0x8AC, AICA_UNK4, PORT_MRW, 0, "AICA ??? 4" )
 BYTE_PORT( 0x8B0, AICA_UNK5, PORT_MRW, 0, "AICA ??? 5" )
 LONG_PORT( 0xC00, AICA_RESET,PORT_MRW, 1, "AICA reset" )
-LONG_PORT( 0xD04, AICA_UNK6, PORT_MRW, 0, "AICA ??? 6" )
+LONG_PORT( 0xD00, AICA_IRQ, PORT_MR, 1, "AICA IRQ Pending" )
+LONG_PORT( 0xD04, AICA_IRQCLEAR, PORT_MRW, 0, "AICA IRQ Clear" )
 MMIO_REGION_END
 
 MMIO_REGION_LIST_BEGIN( spu )
@@ -50,3 +53,8 @@
 
 void aica_init( void );
 void aica_reset( void );
+
+#define AICA_EVENT_TIMER 2
+#define AICA_EVENT_OTHER 5
+
+void aica_event( int event );