# HG changeset patch
# User nkeynes
# Date 1191399747 0
# Node ID fd8e96bc513e5f5dcd4bc9d752f36be1818783a9
# Parent  bff683bc522804cea7665d7f50b9ecfe434f651d
Add (probably temporary) CPU frequency scaling command-line option

--- a/src/main.c	Tue Oct 02 08:48:27 2007 +0000
+++ b/src/main.c	Wed Oct 03 08:22:27 2007 +0000
@@ -1,5 +1,5 @@
 /**
- * $Id: main.c,v 1.25 2007-09-20 08:42:40 nkeynes Exp $
+ * $Id: main.c,v 1.26 2007-10-03 08:22:27 nkeynes Exp $
  *
  * Main program, initializes dreamcast and gui, then passes control off to
  * the gtk main loop (currently). 
@@ -35,7 +35,7 @@
 
 #define S3M_PLAYER "s3mplay.bin"
 
-char *option_list = "a:s:A:V:puhbd:c:t:xD";
+char *option_list = "a:m:s:A:V:puhbd:c:t:xD";
 struct option longopts[1] = { { NULL, 0, 0, 0 } };
 char *aica_program = NULL;
 char *s3m_file = NULL;
@@ -50,6 +50,7 @@
 gboolean show_debugger = FALSE;
 uint32_t time_secs = 0;
 uint32_t time_nanos = 0;
+extern uint32_t sh4_cpu_multiplier;
 
 audio_driver_t audio_driver_list[] = { &audio_null_driver,
 				       &audio_esd_driver,
@@ -82,6 +83,10 @@
 	case 'D': /* Launch w/ debugger */
 	    show_debugger = TRUE;
 	    break;
+	case 'm': /* Set SH4 CPU clock multiplier (default 0.5) */
+	    t = strtod(optarg, NULL);
+	    sh4_cpu_multiplier = (int)(1000.0/t);
+	    break;
 	case 's': /* AICA-only w/ S3M player */
 	    aica_program = S3M_PLAYER;
 	    s3m_file = optarg;
--- a/src/sh4/timer.c	Tue Oct 02 08:48:27 2007 +0000
+++ b/src/sh4/timer.c	Wed Oct 03 08:22:27 2007 +0000
@@ -1,5 +1,5 @@
 /**
- * $Id: timer.c,v 1.7 2007-01-25 10:18:42 nkeynes Exp $
+ * $Id: timer.c,v 1.8 2007-10-03 08:22:27 nkeynes Exp $
  * 
  * SH4 Timer/Clock peripheral modules (CPG, TMU, RTC), combined together to
  * keep things simple (they intertwine a bit).
@@ -28,6 +28,8 @@
 /* This is the base clock from which all other clocks are derived */
 uint32_t sh4_input_freq = SH4_BASE_RATE;
 
+uint32_t sh4_cpu_multiplier = 2000; /* = 0.5 * frequency */
+
 uint32_t sh4_cpu_freq = SH4_BASE_RATE;
 uint32_t sh4_bus_freq = SH4_BASE_RATE;
 uint32_t sh4_peripheral_freq = SH4_BASE_RATE / 2;
@@ -53,7 +55,7 @@
     case FRQCR: /* Frequency control */
 	div = ifc_divider[(val >> 6) & 0x07];
 	sh4_cpu_freq = sh4_input_freq / div;
-	sh4_cpu_period = 2000 * div / sh4_input_freq;
+	sh4_cpu_period = sh4_cpu_multiplier * div / sh4_input_freq;
 	div = ifc_divider[(val >> 3) & 0x07];
 	sh4_bus_freq = sh4_input_freq / div;
 	sh4_bus_period = 1000 * div / sh4_input_freq;