1.1 --- a/src/aica/aica.c	Mon Jan 26 03:09:53 2009 +0000
     1.2 +++ b/src/aica/aica.c	Mon Jan 26 07:26:24 2009 +0000
     1.3 @@ -31,6 +31,10 @@
     1.4  
     1.5  MMIO_REGION_READ_DEFFN( AICA0 )
     1.6  MMIO_REGION_READ_DEFFN( AICA1 )
     1.7 +MMIO_REGION_READ_DEFSUBFNS(AICA0)
     1.8 +MMIO_REGION_READ_DEFSUBFNS(AICA1)
     1.9 +MMIO_REGION_READ_DEFSUBFNS(AICA2)
    1.10 +MMIO_REGION_READ_DEFSUBFNS(AICARTC)
    1.11  
    1.12  void aica_init( void );
    1.13  void aica_reset( void );

     2.1 --- a/src/asic.c	Mon Jan 26 03:09:53 2009 +0000
     2.2 +++ b/src/asic.c	Mon Jan 26 07:26:24 2009 +0000
     2.3 @@ -445,6 +445,8 @@
     2.4  
     2.5  }
     2.6  
     2.7 +MMIO_REGION_READ_DEFSUBFNS(ASIC)
     2.8 +
     2.9  MMIO_REGION_WRITE_FN( ASIC, reg, val )
    2.10  {
    2.11      reg &= 0xFFF;
    2.12 @@ -553,6 +555,8 @@
    2.13          return val;
    2.14      }
    2.15  }
    2.16 +MMIO_REGION_READ_DEFSUBFNS(EXTDMA)
    2.17 +
    2.18  
    2.19  MMIO_REGION_WRITE_FN( EXTDMA, reg, val )
    2.20  {

     3.1 --- a/src/mem.c	Mon Jan 26 03:09:53 2009 +0000
     3.2 +++ b/src/mem.c	Mon Jan 26 07:26:24 2009 +0000
     3.3 @@ -88,7 +88,7 @@
     3.4          unmapped_read_long, unmapped_write_long, 
     3.5          unmapped_read_long, unmapped_write_long, 
     3.6          unmapped_read_burst, unmapped_write_burst,
     3.7 -        unmapped_prefetch }; 
     3.8 +        unmapped_prefetch, unmapped_read_long }; 
     3.9  
    3.10  void *mem_alloc_pages( int n )
    3.11  {
    3.12 @@ -327,6 +327,7 @@
    3.13      mem_rgn[num_mem_rgns].mem = mem;
    3.14      mem_rgn[num_mem_rgns].fn = fn;
    3.15      fn->prefetch = unmapped_prefetch;
    3.16 +    fn->read_byte_for_write = fn->read_byte;
    3.17      num_mem_rgns++;
    3.18  
    3.19      do {

     4.1 --- a/src/mem.h	Mon Jan 26 03:09:53 2009 +0000
     4.2 +++ b/src/mem.h	Mon Jan 26 07:26:24 2009 +0000
     4.3 @@ -58,6 +58,8 @@
     4.4       * spaces are automatically forced to unmapped_prefetch by mem.c
     4.5       */
     4.6      mem_prefetch_fn_t prefetch;
     4.7 +    /* Convenience for SH4 byte read/modify/write instructions */
     4.8 +    mem_read_fn_t read_byte_for_write;
     4.9  } *mem_region_fn_t;
    4.10  
    4.11  int32_t FASTCALL unmapped_read_long( sh4addr_t addr );

     5.1 --- a/src/mmio.h	Mon Jan 26 03:09:53 2009 +0000
     5.2 +++ b/src/mmio.h	Mon Jan 26 07:26:24 2009 +0000
     5.3 @@ -112,7 +112,7 @@
     5.4  #undef MMIO_REGION_LIST_BEGIN
     5.5  #undef MMIO_REGION
     5.6  #undef MMIO_REGION_LIST_END
     5.7 -#define MMIO_REGION_BEGIN(b,id,d) struct mmio_region mmio_region_##id = { #id, d, b, {mmio_region_##id##_read, mmio_region_##id##_write,mmio_region_##id##_read, mmio_region_##id##_write,mmio_region_##id##_read, mmio_region_##id##_write,NULL, NULL, unmapped_prefetch}, 0, 0, {
     5.8 +#define MMIO_REGION_BEGIN(b,id,d) struct mmio_region mmio_region_##id = { #id, d, b, {mmio_region_##id##_read, mmio_region_##id##_write,mmio_region_##id##_read_word, mmio_region_##id##_write,mmio_region_##id##_read_byte, mmio_region_##id##_write,NULL, NULL, unmapped_prefetch, mmio_region_##id##_read_byte}, 0, 0, {
     5.9  #define LONG_PORT( o,id,f,def,d ) { #id, d, 32, o, def, f },
    5.10  #define WORD_PORT( o,id,f,def,d ) { #id, d, 16, o, def, f },
    5.11  #define BYTE_PORT( o,id,f,def,d ) { #id, d, 8, o, def, f },
    5.12 @@ -153,6 +153,7 @@
    5.13  #define MMIO_REGION_DEFFNS( id ) \
    5.14      MMIO_REGION_READ_DEFFN( id ) \
    5.15      MMIO_REGION_WRITE_DEFFN( id )
    5.16 +
    5.17  #endif
    5.18  
    5.19  #else
    5.20 @@ -162,6 +163,8 @@
    5.21  #define MMIO_REGION_BEGIN(b,id,d) \
    5.22  extern struct mmio_region mmio_region_##id; \
    5.23  int32_t FASTCALL mmio_region_##id##_read(uint32_t); \
    5.24 +int32_t FASTCALL mmio_region_##id##_read_word(uint32_t); \
    5.25 +int32_t FASTCALL mmio_region_##id##_read_byte(uint32_t); \
    5.26  void FASTCALL mmio_region_##id##_write(uint32_t, uint32_t); \
    5.27  enum mmio_region_##id##_port_t {
    5.28  #define LONG_PORT( o,id,f,def,d ) id = o,
    5.29 @@ -179,6 +182,10 @@
    5.30  #define MMIO_REGION_READ_FN( id, reg ) \
    5.31  int32_t FASTCALL mmio_region_##id##_read( uint32_t reg )
    5.32  
    5.33 +#define MMIO_REGION_READ_DEFSUBFNS( id ) \
    5.34 +int32_t FASTCALL mmio_region_##id##_read_word( uint32_t reg ) { return SIGNEXT16(mmio_region_##id##_read(reg)); } \
    5.35 +int32_t FASTCALL mmio_region_##id##_read_byte( uint32_t reg ) { return SIGNEXT8(mmio_region_##id##_read(reg)); }
    5.36 +
    5.37  
    5.38  #endif
    5.39  

     6.1 --- a/src/pvr2/pvr2.c	Mon Jan 26 03:09:53 2009 +0000
     6.2 +++ b/src/pvr2/pvr2.c	Mon Jan 26 07:26:24 2009 +0000
     6.3 @@ -831,6 +831,8 @@
     6.4          return MMIO_READ( PVR2, reg );
     6.5      }
     6.6  }
     6.7 +MMIO_REGION_READ_DEFSUBFNS(PVR2)
     6.8 +MMIO_REGION_READ_DEFSUBFNS(PVR2PAL)
     6.9  
    6.10  MMIO_REGION_WRITE_FN( PVR2PAL, reg, val )
    6.11  {

     7.1 --- a/src/sh4/cache.c	Mon Jan 26 03:09:53 2009 +0000
     7.2 +++ b/src/sh4/cache.c	Mon Jan 26 07:26:24 2009 +0000
     7.3 @@ -133,7 +133,7 @@
     7.4          ocram_page0_read_word, ocram_page0_write_word,
     7.5          ocram_page0_read_byte, ocram_page0_write_byte,
     7.6          ocram_page0_read_burst, ocram_page0_write_burst,
     7.7 -        unmapped_prefetch };
     7.8 +        unmapped_prefetch, ocram_page0_read_byte };
     7.9  
    7.10  static int32_t FASTCALL ocram_page1_read_long( sh4addr_t addr )
    7.11  {
    7.12 @@ -173,7 +173,7 @@
    7.13          ocram_page1_read_word, ocram_page1_write_word,
    7.14          ocram_page1_read_byte, ocram_page1_write_byte,
    7.15          ocram_page1_read_burst, ocram_page1_write_burst,
    7.16 -        unmapped_prefetch };
    7.17 +        unmapped_prefetch, ocram_page1_read_byte };
    7.18  
    7.19  /**************************** Cache functions ********************************/
    7.20  char ccn_cache_map[16 MB]; // 24 bits of address space
    7.21 @@ -307,7 +307,7 @@
    7.22      ccn_ocache_read_word, ccn_ocache_write_word_copyback,
    7.23      ccn_ocache_read_byte, ccn_ocache_write_byte_copyback,
    7.24      unmapped_read_burst, unmapped_write_burst,
    7.25 -    ccn_ocache_prefetch };
    7.26 +    ccn_ocache_prefetch, ccn_ocache_read_byte };
    7.27  
    7.28  
    7.29  /************************** Cache direct access ******************************/
    7.30 @@ -335,7 +335,7 @@
    7.31          unmapped_read_long, unmapped_write_long,
    7.32          unmapped_read_long, unmapped_write_long,
    7.33          unmapped_read_burst, unmapped_write_burst,
    7.34 -        unmapped_prefetch };
    7.35 +        unmapped_prefetch, unmapped_read_long };
    7.36  
    7.37  
    7.38  static int32_t FASTCALL ccn_icache_data_read( sh4addr_t addr )
    7.39 @@ -355,7 +355,7 @@
    7.40          unmapped_read_long, unmapped_write_long,
    7.41          unmapped_read_long, unmapped_write_long,
    7.42          unmapped_read_burst, unmapped_write_burst,
    7.43 -        unmapped_prefetch };
    7.44 +        unmapped_prefetch, unmapped_read_long };
    7.45  
    7.46  static int32_t FASTCALL ccn_ocache_addr_read( sh4addr_t addr )
    7.47  {
    7.48 @@ -386,7 +386,7 @@
    7.49          unmapped_read_long, unmapped_write_long,
    7.50          unmapped_read_long, unmapped_write_long,
    7.51          unmapped_read_burst, unmapped_write_burst,
    7.52 -        unmapped_prefetch };
    7.53 +        unmapped_prefetch, unmapped_read_long };
    7.54  
    7.55  
    7.56  static int32_t FASTCALL ccn_ocache_data_read( sh4addr_t addr )
    7.57 @@ -406,7 +406,7 @@
    7.58          unmapped_read_long, unmapped_write_long,
    7.59          unmapped_read_long, unmapped_write_long,
    7.60          unmapped_read_burst, unmapped_write_burst,
    7.61 -        unmapped_prefetch };
    7.62 +        unmapped_prefetch, unmapped_read_long };
    7.63  
    7.64  
    7.65  /****************** Cache control *********************/
    7.66 @@ -505,7 +505,7 @@
    7.67          ccn_uncached_read_word, ccn_uncached_write_word,
    7.68          ccn_uncached_read_byte, ccn_uncached_write_byte,
    7.69          unmapped_read_burst, unmapped_write_burst,
    7.70 -        ccn_uncached_prefetch };
    7.71 +        ccn_uncached_prefetch, ccn_uncached_read_byte };
    7.72  
    7.73  
    7.74  /********************************* Store-queue *******************************/

     8.1 --- a/src/sh4/dmac.c	Mon Jan 26 03:09:53 2009 +0000
     8.2 +++ b/src/sh4/dmac.c	Mon Jan 26 07:26:24 2009 +0000
     8.3 @@ -86,6 +86,7 @@
     8.4  {
     8.5      return MMIO_READ( DMAC, reg&0xFFF );
     8.6  }
     8.7 +MMIO_REGION_READ_DEFSUBFNS(DMAC)
     8.8  
     8.9  MMIO_REGION_WRITE_FN( DMAC, reg, val )
    8.10  {

     9.1 --- a/src/sh4/intc.c	Mon Jan 26 03:09:53 2009 +0000
     9.2 +++ b/src/sh4/intc.c	Mon Jan 26 07:26:24 2009 +0000
     9.3 @@ -101,6 +101,8 @@
     9.4      return MMIO_READ( INTC, reg & 0xFFF );
     9.5  }
     9.6  
     9.7 +MMIO_REGION_READ_DEFSUBFNS(INTC)
     9.8 +
     9.9  void INTC_reset()
    9.10  {
    9.11      int i;

    10.1 --- a/src/sh4/mmu.c	Mon Jan 26 03:09:53 2009 +0000
    10.2 +++ b/src/sh4/mmu.c	Mon Jan 26 07:26:24 2009 +0000
    10.3 @@ -82,7 +82,9 @@
    10.4  static void FASTCALL tlb_miss_read( sh4addr_t addr, void *exc );
    10.5  static int32_t FASTCALL tlb_protected_read( sh4addr_t addr, void *exc );
    10.6  static void FASTCALL tlb_protected_write( sh4addr_t addr, uint32_t val, void *exc );
    10.7 +static int32_t FASTCALL tlb_protected_read_for_write( sh4addr_t addr, void *exc );
    10.8  static void FASTCALL tlb_initial_write( sh4addr_t addr, uint32_t val, void *exc );
    10.9 +static int32_t FASTCALL tlb_initial_read_for_write( sh4addr_t addr, void *exc );
   10.10  static uint32_t get_tlb_size_mask( uint32_t flags );
   10.11  static uint32_t get_tlb_size_pages( uint32_t flags );
   10.12  
   10.13 @@ -230,6 +232,8 @@
   10.14      }
   10.15  }
   10.16  
   10.17 +MMIO_REGION_READ_DEFSUBFNS(MMU)
   10.18 +
   10.19  MMIO_REGION_WRITE_FN( MMU, reg, val )
   10.20  {
   10.21      uint32_t tmp;
   10.22 @@ -772,12 +776,14 @@
   10.23              page->write_word = (mem_write_fn_t)tlb_protected_write;
   10.24              page->write_byte = (mem_write_fn_t)tlb_protected_write;
   10.25              page->write_burst = (mem_write_burst_fn_t)tlb_protected_write;
   10.26 +            page->read_byte_for_write = (mem_read_fn_t)tlb_protected_read_for_write;
   10.27              mmu_utlb_init_vtable( ent, &mmu_utlb_pages[entry], FALSE );
   10.28          } else if( (ent->flags & TLB_DIRTY) == 0 ) {
   10.29              page->write_long = (mem_write_fn_t)tlb_initial_write;
   10.30              page->write_word = (mem_write_fn_t)tlb_initial_write;
   10.31              page->write_byte = (mem_write_fn_t)tlb_initial_write;
   10.32              page->write_burst = (mem_write_burst_fn_t)tlb_initial_write;
   10.33 +            page->read_byte_for_write = (mem_read_fn_t)tlb_initial_read_for_write;
   10.34              mmu_utlb_init_vtable( ent, &mmu_utlb_pages[entry], FALSE );
   10.35          } else {
   10.36              mmu_utlb_init_vtable( ent, &mmu_utlb_pages[entry], TRUE );
   10.37 @@ -1358,25 +1364,25 @@
   10.38          mmu_itlb_addr_read, mmu_itlb_addr_write,
   10.39          mmu_itlb_addr_read, mmu_itlb_addr_write,
   10.40          unmapped_read_burst, unmapped_write_burst,
   10.41 -        unmapped_prefetch };
   10.42 +        unmapped_prefetch, mmu_itlb_addr_read };
   10.43  struct mem_region_fn p4_region_itlb_data = {
   10.44          mmu_itlb_data_read, mmu_itlb_data_write,
   10.45          mmu_itlb_data_read, mmu_itlb_data_write,
   10.46          mmu_itlb_data_read, mmu_itlb_data_write,
   10.47          unmapped_read_burst, unmapped_write_burst,
   10.48 -        unmapped_prefetch };
   10.49 +        unmapped_prefetch, mmu_itlb_data_read };
   10.50  struct mem_region_fn p4_region_utlb_addr = {
   10.51          mmu_utlb_addr_read, (mem_write_fn_t)mmu_utlb_addr_write,
   10.52          mmu_utlb_addr_read, (mem_write_fn_t)mmu_utlb_addr_write,
   10.53          mmu_utlb_addr_read, (mem_write_fn_t)mmu_utlb_addr_write,
   10.54          unmapped_read_burst, unmapped_write_burst,
   10.55 -        unmapped_prefetch };
   10.56 +        unmapped_prefetch, mmu_utlb_addr_read };
   10.57  struct mem_region_fn p4_region_utlb_data = {
   10.58          mmu_utlb_data_read, mmu_utlb_data_write,
   10.59          mmu_utlb_data_read, mmu_utlb_data_write,
   10.60          mmu_utlb_data_read, mmu_utlb_data_write,
   10.61          unmapped_read_burst, unmapped_write_burst,
   10.62 -        unmapped_prefetch };
   10.63 +        unmapped_prefetch, mmu_utlb_data_read };
   10.64  
   10.65  /********************** Error regions **************************/
   10.66  
   10.67 @@ -1386,6 +1392,12 @@
   10.68      EXCEPTION_EXIT();
   10.69  }
   10.70  
   10.71 +static void FASTCALL address_error_read_for_write( sh4addr_t addr, void *exc ) 
   10.72 +{
   10.73 +    RAISE_MEM_ERROR(EXC_DATA_ADDR_WRITE, addr);
   10.74 +    EXCEPTION_EXIT();
   10.75 +}
   10.76 +
   10.77  static void FASTCALL address_error_read_burst( unsigned char *dest, sh4addr_t addr, void *exc ) 
   10.78  {
   10.79      RAISE_MEM_ERROR(EXC_DATA_ADDR_READ, addr);
   10.80 @@ -1405,6 +1417,13 @@
   10.81      EXCEPTION_EXIT();
   10.82  }
   10.83  
   10.84 +static void FASTCALL tlb_miss_read_for_write( sh4addr_t addr, void *exc )
   10.85 +{
   10.86 +    mmu_urc++;
   10.87 +    RAISE_TLB_ERROR(EXC_TLB_MISS_WRITE, addr);
   10.88 +    EXCEPTION_EXIT();
   10.89 +}
   10.90 +
   10.91  static void FASTCALL tlb_miss_read_burst( unsigned char *dest, sh4addr_t addr, void *exc )
   10.92  {
   10.93      mmu_urc++;
   10.94 @@ -1417,7 +1436,7 @@
   10.95      mmu_urc++;
   10.96      RAISE_TLB_ERROR(EXC_TLB_MISS_WRITE, addr);
   10.97      EXCEPTION_EXIT();
   10.98 -}    
   10.99 +}
  10.100  
  10.101  static int32_t FASTCALL tlb_protected_read( sh4addr_t addr, void *exc )
  10.102  {
  10.103 @@ -1427,6 +1446,14 @@
  10.104      return 0; 
  10.105  }
  10.106  
  10.107 +static int32_t FASTCALL tlb_protected_read_for_write( sh4addr_t addr, void *exc )
  10.108 +{
  10.109 +    mmu_urc++;
  10.110 +    RAISE_MEM_ERROR(EXC_TLB_PROT_WRITE, addr);
  10.111 +    EXCEPTION_EXIT();
  10.112 +    return 0;
  10.113 +}
  10.114 +
  10.115  static int32_t FASTCALL tlb_protected_read_burst( unsigned char *dest, sh4addr_t addr, void *exc )
  10.116  {
  10.117      mmu_urc++;
  10.118 @@ -1448,6 +1475,14 @@
  10.119      RAISE_MEM_ERROR(EXC_INIT_PAGE_WRITE, addr);
  10.120      EXCEPTION_EXIT();
  10.121  }
  10.122 +
  10.123 +static int32_t FASTCALL tlb_initial_read_for_write( sh4addr_t addr, void *exc )
  10.124 +{
  10.125 +    mmu_urc++;
  10.126 +    RAISE_MEM_ERROR(EXC_INIT_PAGE_WRITE, addr);
  10.127 +    EXCEPTION_EXIT();
  10.128 +    return 0;
  10.129 +}    
  10.130      
  10.131  static int32_t FASTCALL tlb_multi_hit_read( sh4addr_t addr, void *exc )
  10.132  {
  10.133 @@ -1476,28 +1511,28 @@
  10.134          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.135          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.136          (mem_read_burst_fn_t)address_error_read_burst, (mem_write_burst_fn_t)address_error_write,
  10.137 -        unmapped_prefetch };
  10.138 +        unmapped_prefetch, (mem_read_fn_t)address_error_read_for_write };
  10.139  
  10.140  struct mem_region_fn mem_region_tlb_miss = {
  10.141          (mem_read_fn_t)tlb_miss_read, (mem_write_fn_t)tlb_miss_write,
  10.142          (mem_read_fn_t)tlb_miss_read, (mem_write_fn_t)tlb_miss_write,
  10.143          (mem_read_fn_t)tlb_miss_read, (mem_write_fn_t)tlb_miss_write,
  10.144          (mem_read_burst_fn_t)tlb_miss_read_burst, (mem_write_burst_fn_t)tlb_miss_write,
  10.145 -        unmapped_prefetch };
  10.146 +        unmapped_prefetch, (mem_read_fn_t)tlb_miss_read_for_write };
  10.147  
  10.148  struct mem_region_fn mem_region_tlb_protected = {
  10.149          (mem_read_fn_t)tlb_protected_read, (mem_write_fn_t)tlb_protected_write,
  10.150          (mem_read_fn_t)tlb_protected_read, (mem_write_fn_t)tlb_protected_write,
  10.151          (mem_read_fn_t)tlb_protected_read, (mem_write_fn_t)tlb_protected_write,
  10.152          (mem_read_burst_fn_t)tlb_protected_read_burst, (mem_write_burst_fn_t)tlb_protected_write,
  10.153 -        unmapped_prefetch };
  10.154 +        unmapped_prefetch, (mem_read_fn_t)tlb_protected_read_for_write };
  10.155  
  10.156  struct mem_region_fn mem_region_tlb_multihit = {
  10.157          (mem_read_fn_t)tlb_multi_hit_read, (mem_write_fn_t)tlb_multi_hit_write,
  10.158          (mem_read_fn_t)tlb_multi_hit_read, (mem_write_fn_t)tlb_multi_hit_write,
  10.159          (mem_read_fn_t)tlb_multi_hit_read, (mem_write_fn_t)tlb_multi_hit_write,
  10.160          (mem_read_burst_fn_t)tlb_multi_hit_read_burst, (mem_write_burst_fn_t)tlb_multi_hit_write,
  10.161 -        (mem_prefetch_fn_t)tlb_multi_hit_read };
  10.162 +        (mem_prefetch_fn_t)tlb_multi_hit_read, (mem_read_fn_t)tlb_multi_hit_read };
  10.163          
  10.164  
  10.165  /* Store-queue regions */
  10.166 @@ -1513,54 +1548,54 @@
  10.167          unmapped_read_long, unmapped_write_long, /* TESTME: Officially only long access is supported */
  10.168          unmapped_read_long, unmapped_write_long,
  10.169          unmapped_read_burst, unmapped_write_burst,
  10.170 -        ccn_storequeue_prefetch }; 
  10.171 +        ccn_storequeue_prefetch, unmapped_read_long }; 
  10.172  
  10.173  struct mem_region_fn p4_region_storequeue_miss = { 
  10.174          ccn_storequeue_read_long, ccn_storequeue_write_long,
  10.175          unmapped_read_long, unmapped_write_long, /* TESTME: Officially only long access is supported */
  10.176          unmapped_read_long, unmapped_write_long,
  10.177          unmapped_read_burst, unmapped_write_burst,
  10.178 -        (mem_prefetch_fn_t)tlb_miss_read }; 
  10.179 +        (mem_prefetch_fn_t)tlb_miss_read, unmapped_read_long }; 
  10.180  
  10.181  struct mem_region_fn p4_region_storequeue_multihit = { 
  10.182          ccn_storequeue_read_long, ccn_storequeue_write_long,
  10.183          unmapped_read_long, unmapped_write_long, /* TESTME: Officially only long access is supported */
  10.184          unmapped_read_long, unmapped_write_long,
  10.185          unmapped_read_burst, unmapped_write_burst,
  10.186 -        (mem_prefetch_fn_t)tlb_multi_hit_read }; 
  10.187 +        (mem_prefetch_fn_t)tlb_multi_hit_read, unmapped_read_long }; 
  10.188  
  10.189  struct mem_region_fn p4_region_storequeue_protected = {
  10.190          ccn_storequeue_read_long, ccn_storequeue_write_long,
  10.191          unmapped_read_long, unmapped_write_long,
  10.192          unmapped_read_long, unmapped_write_long,
  10.193          unmapped_read_burst, unmapped_write_burst,
  10.194 -        (mem_prefetch_fn_t)tlb_protected_read };
  10.195 +        (mem_prefetch_fn_t)tlb_protected_read, unmapped_read_long };
  10.196  
  10.197  struct mem_region_fn p4_region_storequeue_sqmd = {
  10.198          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.199          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.200          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.201          (mem_read_burst_fn_t)address_error_read_burst, (mem_write_burst_fn_t)address_error_write,
  10.202 -        (mem_prefetch_fn_t)address_error_read };        
  10.203 +        (mem_prefetch_fn_t)address_error_read, (mem_read_fn_t)address_error_read_for_write };
  10.204          
  10.205  struct mem_region_fn p4_region_storequeue_sqmd_miss = { 
  10.206          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.207          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.208          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.209          (mem_read_burst_fn_t)address_error_read_burst, (mem_write_burst_fn_t)address_error_write,
  10.210 -        (mem_prefetch_fn_t)tlb_miss_read }; 
  10.211 +        (mem_prefetch_fn_t)tlb_miss_read, (mem_read_fn_t)address_error_read_for_write }; 
  10.212  
  10.213  struct mem_region_fn p4_region_storequeue_sqmd_multihit = {
  10.214          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.215          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.216          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.217          (mem_read_burst_fn_t)address_error_read_burst, (mem_write_burst_fn_t)address_error_write,
  10.218 -        (mem_prefetch_fn_t)tlb_multi_hit_read };        
  10.219 +        (mem_prefetch_fn_t)tlb_multi_hit_read, (mem_read_fn_t)address_error_read_for_write };
  10.220          
  10.221  struct mem_region_fn p4_region_storequeue_sqmd_protected = {
  10.222          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.223          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.224          (mem_read_fn_t)address_error_read, (mem_write_fn_t)address_error_write,
  10.225          (mem_read_burst_fn_t)address_error_read_burst, (mem_write_burst_fn_t)address_error_write,
  10.226 -        (mem_prefetch_fn_t)tlb_protected_read };
  10.227 +        (mem_prefetch_fn_t)tlb_protected_read, (mem_read_fn_t)address_error_read_for_write };
  10.228  

    11.1 --- a/src/sh4/mmux86.c	Mon Jan 26 03:09:53 2009 +0000
    11.2 +++ b/src/sh4/mmux86.c	Mon Jan 26 07:26:24 2009 +0000
    11.3 @@ -58,14 +58,16 @@
    11.4      }
    11.5      fn = (uint8_t **)addr_space[ppn>>12];
    11.6      
    11.7 -    for( i=0; i<9; i+= inc, fn += inc, out += inc ) {
    11.8 +    for( i=0; i<10; i+= inc, fn += inc, out += inc ) {
    11.9          *out = xlat_output;
   11.10 +        if( i != 9 ) { /* read_byte_for_write doesn't increment mmu_urc, everything else does */
   11.11  #if SIZEOF_VOID_P == 8
   11.12 -        MOV_imm64_r32((uintptr_t)&mmu_urc, R_EAX );
   11.13 -        OP(0x83); OP(0x00); OP(0x01); // ADD #1, [RAX]
   11.14 +            MOV_imm64_r32((uintptr_t)&mmu_urc, R_EAX );
   11.15 +            OP(0x83); OP(0x00); OP(0x01); // ADD #1, [RAX]
   11.16  #else 
   11.17 -        OP(0x83); MODRM_r32_disp32(0, (uintptr_t)&mmu_urc); OP(0x01); // ADD #1, mmu_urc
   11.18 +            OP(0x83); MODRM_r32_disp32(0, (uintptr_t)&mmu_urc); OP(0x01); // ADD #1, mmu_urc
   11.19  #endif
   11.20 +        }
   11.21          ADD_imm32_r32( ppn-vpn, ARG1 ); // 6
   11.22          if( ent->mask >= 0xFFFFF000 ) {
   11.23              // Maps to a single page, so jump directly there
   11.24 @@ -92,8 +94,13 @@
   11.25  
   11.26      memcpy( page, &p4_region_storequeue, sizeof(struct mem_region_fn) );
   11.27  
   11.28 -    /* TESTME: Does a PREF increment the URC counter? */
   11.29      page->fn.prefetch = (mem_prefetch_fn_t)xlat_output;
   11.30 +#if SIZEOF_VOID_P == 8
   11.31 +    MOV_imm64_r32((uintptr_t)&mmu_urc, R_EAX );
   11.32 +    OP(0x83); OP(0x00); OP(0x01); // ADD #1, [RAX]
   11.33 +#else 
   11.34 +    OP(0x83); MODRM_r32_disp32(0, (uintptr_t)&mmu_urc); OP(0x01); // ADD #1, mmu_urc
   11.35 +#endif
   11.36      ADD_imm32_r32( ppn-vpn, ARG1 );
   11.37      int rel = ((uint8_t *)ccn_storequeue_prefetch_tlb) - xlat_output;
   11.38      JMP_rel( rel );

    12.1 --- a/src/sh4/pmm.c	Mon Jan 26 03:09:53 2009 +0000
    12.2 +++ b/src/sh4/pmm.c	Mon Jan 26 07:26:24 2009 +0000
    12.3 @@ -154,3 +154,5 @@
    12.4  {
    12.5      /* Read-only */
    12.6  }
    12.7 +
    12.8 +MMIO_REGION_READ_DEFSUBFNS(PMM)

    13.1 --- a/src/sh4/scif.c	Mon Jan 26 03:09:53 2009 +0000
    13.2 +++ b/src/sh4/scif.c	Mon Jan 26 07:26:24 2009 +0000
    13.3 @@ -465,6 +465,8 @@
    13.4          return MMIO_READ( SCIF, reg );
    13.5      }
    13.6  }
    13.7 +MMIO_REGION_READ_DEFSUBFNS(SCIF)
    13.8 +
    13.9  
   13.10  MMIO_REGION_WRITE_FN( SCIF, reg, val )
   13.11  {

    14.1 --- a/src/sh4/sh4.c	Mon Jan 26 03:09:53 2009 +0000
    14.2 +++ b/src/sh4/sh4.c	Mon Jan 26 07:26:24 2009 +0000
    14.3 @@ -352,17 +352,6 @@
    14.4      return sh4r.sr;
    14.5  }
    14.6  
    14.7 -void sh4_update_exception_readtowrite( void )
    14.8 -{
    14.9 -    int exc = MMIO_READ( MMU, EXPEVT );
   14.10 -    if( exc == EXC_TLB_MISS_READ ) {
   14.11 -        MMIO_WRITE( MMU, EXPEVT, EXC_TLB_MISS_WRITE );
   14.12 -    } else if( exc == EXC_DATA_ADDR_READ ) {
   14.13 -        MMIO_WRITE( MMU, EXPEVT, EXC_DATA_ADDR_WRITE );
   14.14 -    }
   14.15 -}
   14.16 -
   14.17 -
   14.18  /**
   14.19   * Raise a CPU reset exception with the specified exception code.
   14.20   */
   14.21 @@ -445,6 +434,7 @@
   14.22      sh4_write_sr( sh4r.ssr|SR_BL|SR_MD|SR_RB );
   14.23      sh4r.pc = sh4r.vbr + 0x600;
   14.24      sh4r.new_pc = sh4r.pc + 2;
   14.25 +    sh4r.in_delay_slot = 0;
   14.26  }
   14.27  
   14.28  void FASTCALL signsat48( void )

    15.1 --- a/src/sh4/sh4core.h	Mon Jan 26 03:09:53 2009 +0000
    15.2 +++ b/src/sh4/sh4core.h	Mon Jan 26 07:26:24 2009 +0000
    15.3 @@ -242,13 +242,6 @@
    15.4  void FASTCALL sh4_accept_interrupt( void );
    15.5  
    15.6  /**
    15.7 - * Convert a TLB miss or data addr read exception to a write exception
    15.8 - * by updating EXPEVT. (used for instructions like AND.B that are
    15.9 - * documented to raise write exceptions if the target isn't readable)
   15.10 - */
   15.11 -void sh4_update_exception_readtowrite( void );
   15.12 -
   15.13 -/**
   15.14   * Complete the current instruction as part of a core exit. Prevents the 
   15.15   * system from being left in an inconsistent state when an exit is 
   15.16   * triggered during a memory write. 

    16.1 --- a/src/sh4/sh4mmio.c	Mon Jan 26 03:09:53 2009 +0000
    16.2 +++ b/src/sh4/sh4mmio.c	Mon Jan 26 07:26:24 2009 +0000
    16.3 @@ -89,6 +89,8 @@
    16.4      return val;
    16.5  }
    16.6  
    16.7 +MMIO_REGION_READ_DEFSUBFNS(BSC)
    16.8 +
    16.9  /********************************* UBC *************************************/
   16.10  
   16.11  MMIO_REGION_READ_FN( UBC, reg )
   16.12 @@ -118,8 +120,10 @@
   16.13      MMIO_WRITE( UBC, reg, val );
   16.14  }
   16.15  
   16.16 +MMIO_REGION_READ_DEFSUBFNS(UBC)
   16.17  
   16.18  /********************************** SCI *************************************/
   16.19  
   16.20  MMIO_REGION_STUBFNS( SCI )
   16.21  
   16.22 +MMIO_REGION_READ_DEFSUBFNS(SCI)

    17.1 --- a/src/sh4/sh4trans.c	Mon Jan 26 03:09:53 2009 +0000
    17.2 +++ b/src/sh4/sh4trans.c	Mon Jan 26 07:26:24 2009 +0000
    17.3 @@ -24,7 +24,20 @@
    17.4  #include "sh4/sh4core.h"
    17.5  #include "sh4/sh4trans.h"
    17.6  #include "sh4/xltcache.h"
    17.7 +#include "sh4/sh4mmio.h"
    17.8 +#include "sh4/mmu.h"
    17.9  
   17.10 +unsigned long block_count = 0;
   17.11 +
   17.12 +static void dump_state()
   17.13 +{
   17.14 +    int i;
   17.15 +    printf( "%08x: [%08x] ", sh4r.pc, mmu_urc % mmu_urb );
   17.16 +    for( i=0; i<16; i++ ) {
   17.17 +        printf( " %08x", sh4r.r[i] );
   17.18 +    }
   17.19 +    printf( "\n" );
   17.20 +}
   17.21  
   17.22  /**
   17.23   * Execute a timeslice using translated code only (ie translate/execute loop)
   17.24 @@ -65,6 +78,12 @@
   17.25              }
   17.26              code = sh4_translate_basic_block( sh4r.pc );
   17.27          }
   17.28 +//        if( IS_TLB_ENABLED() ) {
   17.29 +//            block_count++;
   17.30 +//            if( block_count == 52048225 ) {
   17.31 +//                dump_state();
   17.32 +//            }
   17.33 +//        }
   17.34          code = code();
   17.35      }
   17.36      return nanosecs;

    18.1 --- a/src/sh4/sh4x86.in	Mon Jan 26 03:09:53 2009 +0000
    18.2 +++ b/src/sh4/sh4x86.in	Mon Jan 26 07:26:24 2009 +0000
    18.3 @@ -307,6 +307,7 @@
    18.4  #endif
    18.5                  
    18.6  #define MEM_READ_BYTE( addr_reg, value_reg ) decode_address(addr_reg); _CALL_READ(addr_reg, read_byte); MEM_RESULT(value_reg)
    18.7 +#define MEM_READ_BYTE_FOR_WRITE( addr_reg, value_reg ) decode_address(addr_reg); _CALL_READ(addr_reg, read_byte_for_write); MEM_RESULT(value_reg)
    18.8  #define MEM_READ_WORD( addr_reg, value_reg ) decode_address(addr_reg); _CALL_READ(addr_reg, read_word); MEM_RESULT(value_reg)
    18.9  #define MEM_READ_LONG( addr_reg, value_reg ) decode_address(addr_reg); _CALL_READ(addr_reg, read_long); MEM_RESULT(value_reg)
   18.10  #define MEM_WRITE_BYTE( addr_reg, value_reg ) decode_address(addr_reg); _CALL_WRITE(addr_reg, value_reg, write_byte)
   18.11 @@ -468,7 +469,7 @@
   18.12      load_reg( R_EAX, 0 );
   18.13      ADD_sh4r_r32( R_GBR, R_EAX );
   18.14      MOV_r32_esp8(R_EAX, 0);
   18.15 -    MEM_READ_BYTE( R_EAX, R_EDX );
   18.16 +    MEM_READ_BYTE_FOR_WRITE( R_EAX, R_EDX );
   18.17      MOV_esp8_r32(0, R_EAX);
   18.18      AND_imm32_r32(imm, R_EDX );
   18.19      MEM_WRITE_BYTE( R_EAX, R_EDX );
   18.20 @@ -808,7 +809,7 @@
   18.21      load_reg( R_EAX, 0 );
   18.22      ADD_sh4r_r32( R_GBR, R_EAX );
   18.23      MOV_r32_esp8( R_EAX, 0 );
   18.24 -    MEM_READ_BYTE( R_EAX, R_EDX );
   18.25 +    MEM_READ_BYTE_FOR_WRITE( R_EAX, R_EDX );
   18.26      MOV_esp8_r32( 0, R_EAX );
   18.27      OR_imm32_r32(imm, R_EDX );
   18.28      MEM_WRITE_BYTE( R_EAX, R_EDX );
   18.29 @@ -1026,7 +1027,7 @@
   18.30      COUNT_INST(I_TASB);
   18.31      load_reg( R_EAX, Rn );
   18.32      MOV_r32_esp8( R_EAX, 0 );
   18.33 -    MEM_READ_BYTE( R_EAX, R_EDX );
   18.34 +    MEM_READ_BYTE_FOR_WRITE( R_EAX, R_EDX );
   18.35      TEST_r8_r8( R_DL, R_DL );
   18.36      SETE_t();
   18.37      OR_imm8_r8( 0x80, R_DL );
   18.38 @@ -1078,7 +1079,7 @@
   18.39      load_reg( R_EAX, 0 );
   18.40      ADD_sh4r_r32( R_GBR, R_EAX ); 
   18.41      MOV_r32_esp8( R_EAX, 0 );
   18.42 -    MEM_READ_BYTE(R_EAX, R_EDX);
   18.43 +    MEM_READ_BYTE_FOR_WRITE(R_EAX, R_EDX);
   18.44      MOV_esp8_r32( 0, R_EAX );
   18.45      XOR_imm32_r32( imm, R_EDX );
   18.46      MEM_WRITE_BYTE( R_EAX, R_EDX );

    19.1 --- a/src/sh4/timer.c	Mon Jan 26 03:09:53 2009 +0000
    19.2 +++ b/src/sh4/timer.c	Mon Jan 26 07:26:24 2009 +0000
    19.3 @@ -48,6 +48,7 @@
    19.4  {
    19.5      return MMIO_READ( CPG, reg&0xFFF );
    19.6  }
    19.7 +MMIO_REGION_READ_DEFSUBFNS(CPG)
    19.8  
    19.9  /* CPU + bus dividers (note officially only the first 6 values are valid) */
   19.10  int ifc_divider[8] = { 1, 2, 3, 4, 5, 8, 8, 8 };
   19.11 @@ -102,6 +103,7 @@
   19.12  {
   19.13      return MMIO_READ( RTC, reg &0xFFF );
   19.14  }
   19.15 +MMIO_REGION_READ_DEFSUBFNS(RTC)
   19.16  
   19.17  MMIO_REGION_WRITE_FN( RTC, reg, val )
   19.18  {
   19.19 @@ -261,6 +263,8 @@
   19.20      }
   19.21      return MMIO_READ( TMU, reg );
   19.22  }
   19.23 +MMIO_REGION_READ_DEFSUBFNS(TMU)
   19.24 +
   19.25  
   19.26  MMIO_REGION_WRITE_FN( TMU, reg, val )
   19.27  {