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lxdream.org :: lxdream :: r1202:01ae5cbad4c8
lxdream 0.9.1
released Jun 29
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changeset1202:01ae5cbad4c8
parent1201:5502572ce192
child1203:d8519911fb40
child1230:64a91ef571fc
authornkeynes
dateFri Dec 23 08:20:17 2011 +1000 (8 years ago)
Move the exception exit macros up to sh4core.h
src/sh4/mmu.c
src/sh4/sh4core.h
src/sh4/shadow.c
1.1 --- a/src/sh4/mmu.c Thu Dec 22 18:10:36 2011 +1000
1.2 +++ b/src/sh4/mmu.c Fri Dec 23 08:20:17 2011 +1000
1.3 @@ -27,13 +27,6 @@
1.4 #include "mem.h"
1.5 #include "mmu.h"
1.6
1.7 -#define RAISE_TLB_ERROR(code, vpn) sh4_raise_tlb_exception(code, vpn)
1.8 -#define RAISE_MEM_ERROR(code, vpn) \
1.9 - MMIO_WRITE(MMU, TEA, vpn); \
1.10 - MMIO_WRITE(MMU, PTEH, ((MMIO_READ(MMU, PTEH) & 0x000003FF) | (vpn&0xFFFFFC00))); \
1.11 - sh4_raise_exception(code);
1.12 -#define RAISE_TLB_MULTIHIT_ERROR(vpn) sh4_raise_tlb_multihit(vpn)
1.13 -
1.14 /* An entry is a 1K entry if it's one of the mmu_utlb_1k_pages entries */
1.15 #define IS_1K_PAGE_ENTRY(ent) ( ((uintptr_t)(((struct utlb_1k_entry *)ent) - &mmu_utlb_1k_pages[0])) < UTLB_ENTRY_COUNT )
1.16
1.17 @@ -1198,13 +1191,6 @@
1.18 }
1.19
1.20 /********************** TLB Direct-Access Regions ***************************/
1.21 -#ifdef HAVE_FRAME_ADDRESS
1.22 -#define EXCEPTION_EXIT() do{ *(((void * volatile *)__builtin_frame_address(0))+1) = exc; } while(0)
1.23 -#else
1.24 -#define EXCEPTION_EXIT() sh4_core_exit(CORE_EXIT_EXCEPTION)
1.25 -#endif
1.26 -
1.27 -
1.28 #define ITLB_ENTRY(addr) ((addr>>7)&0x03)
1.29
1.30 int32_t FASTCALL mmu_itlb_addr_read( sh4addr_t addr )
1.31 @@ -1326,7 +1312,7 @@
1.32
1.33 if( itlb == -2 || utlb == -2 ) {
1.34 RAISE_TLB_MULTIHIT_ERROR(addr); /* FIXME: should this only be raised if TLB is enabled? */
1.35 - EXCEPTION_EXIT();
1.36 + SH4_EXCEPTION_EXIT();
1.37 return;
1.38 }
1.39 } else {
1.40 @@ -1389,60 +1375,60 @@
1.41 static void FASTCALL address_error_read( sh4addr_t addr, void *exc )
1.42 {
1.43 RAISE_MEM_ERROR(EXC_DATA_ADDR_READ, addr);
1.44 - EXCEPTION_EXIT();
1.45 + SH4_EXCEPTION_EXIT();
1.46 }
1.47
1.48 static void FASTCALL address_error_read_for_write( sh4addr_t addr, void *exc )
1.49 {
1.50 RAISE_MEM_ERROR(EXC_DATA_ADDR_WRITE, addr);
1.51 - EXCEPTION_EXIT();
1.52 + SH4_EXCEPTION_EXIT();
1.53 }
1.54
1.55 static void FASTCALL address_error_read_burst( unsigned char *dest, sh4addr_t addr, void *exc )
1.56 {
1.57 RAISE_MEM_ERROR(EXC_DATA_ADDR_READ, addr);
1.58 - EXCEPTION_EXIT();
1.59 + SH4_EXCEPTION_EXIT();
1.60 }
1.61
1.62 static void FASTCALL address_error_write( sh4addr_t addr, uint32_t val, void *exc )
1.63 {
1.64 RAISE_MEM_ERROR(EXC_DATA_ADDR_WRITE, addr);
1.65 - EXCEPTION_EXIT();
1.66 + SH4_EXCEPTION_EXIT();
1.67 }
1.68
1.69 static void FASTCALL tlb_miss_read( sh4addr_t addr, void *exc )
1.70 {
1.71 mmu_urc++;
1.72 RAISE_TLB_ERROR(EXC_TLB_MISS_READ, addr);
1.73 - EXCEPTION_EXIT();
1.74 + SH4_EXCEPTION_EXIT();
1.75 }
1.76
1.77 static void FASTCALL tlb_miss_read_for_write( sh4addr_t addr, void *exc )
1.78 {
1.79 mmu_urc++;
1.80 RAISE_TLB_ERROR(EXC_TLB_MISS_WRITE, addr);
1.81 - EXCEPTION_EXIT();
1.82 + SH4_EXCEPTION_EXIT();
1.83 }
1.84
1.85 static void FASTCALL tlb_miss_read_burst( unsigned char *dest, sh4addr_t addr, void *exc )
1.86 {
1.87 mmu_urc++;
1.88 RAISE_TLB_ERROR(EXC_TLB_MISS_READ, addr);
1.89 - EXCEPTION_EXIT();
1.90 + SH4_EXCEPTION_EXIT();
1.91 }
1.92
1.93 static void FASTCALL tlb_miss_write( sh4addr_t addr, uint32_t val, void *exc )
1.94 {
1.95 mmu_urc++;
1.96 RAISE_TLB_ERROR(EXC_TLB_MISS_WRITE, addr);
1.97 - EXCEPTION_EXIT();
1.98 + SH4_EXCEPTION_EXIT();
1.99 }
1.100
1.101 static int32_t FASTCALL tlb_protected_read( sh4addr_t addr, void *exc )
1.102 {
1.103 mmu_urc++;
1.104 RAISE_MEM_ERROR(EXC_TLB_PROT_READ, addr);
1.105 - EXCEPTION_EXIT();
1.106 + SH4_EXCEPTION_EXIT();
1.107 return 0;
1.108 }
1.109
1.110 @@ -1450,7 +1436,7 @@
1.111 {
1.112 mmu_urc++;
1.113 RAISE_MEM_ERROR(EXC_TLB_PROT_WRITE, addr);
1.114 - EXCEPTION_EXIT();
1.115 + SH4_EXCEPTION_EXIT();
1.116 return 0;
1.117 }
1.118
1.119 @@ -1458,7 +1444,7 @@
1.120 {
1.121 mmu_urc++;
1.122 RAISE_MEM_ERROR(EXC_TLB_PROT_READ, addr);
1.123 - EXCEPTION_EXIT();
1.124 + SH4_EXCEPTION_EXIT();
1.125 return 0;
1.126 }
1.127
1.128 @@ -1466,41 +1452,41 @@
1.129 {
1.130 mmu_urc++;
1.131 RAISE_MEM_ERROR(EXC_TLB_PROT_WRITE, addr);
1.132 - EXCEPTION_EXIT();
1.133 + SH4_EXCEPTION_EXIT();
1.134 }
1.135
1.136 static void FASTCALL tlb_initial_write( sh4addr_t addr, uint32_t val, void *exc )
1.137 {
1.138 mmu_urc++;
1.139 RAISE_MEM_ERROR(EXC_INIT_PAGE_WRITE, addr);
1.140 - EXCEPTION_EXIT();
1.141 + SH4_EXCEPTION_EXIT();
1.142 }
1.143
1.144 static int32_t FASTCALL tlb_initial_read_for_write( sh4addr_t addr, void *exc )
1.145 {
1.146 mmu_urc++;
1.147 RAISE_MEM_ERROR(EXC_INIT_PAGE_WRITE, addr);
1.148 - EXCEPTION_EXIT();
1.149 + SH4_EXCEPTION_EXIT();
1.150 return 0;
1.151 }
1.152
1.153 static int32_t FASTCALL tlb_multi_hit_read( sh4addr_t addr, void *exc )
1.154 {
1.155 sh4_raise_tlb_multihit(addr);
1.156 - EXCEPTION_EXIT();
1.157 + SH4_EXCEPTION_EXIT();
1.158 return 0;
1.159 }
1.160
1.161 static int32_t FASTCALL tlb_multi_hit_read_burst( unsigned char *dest, sh4addr_t addr, void *exc )
1.162 {
1.163 sh4_raise_tlb_multihit(addr);
1.164 - EXCEPTION_EXIT();
1.165 + SH4_EXCEPTION_EXIT();
1.166 return 0;
1.167 }
1.168 static void FASTCALL tlb_multi_hit_write( sh4addr_t addr, uint32_t val, void *exc )
1.169 {
1.170 sh4_raise_tlb_multihit(addr);
1.171 - EXCEPTION_EXIT();
1.172 + SH4_EXCEPTION_EXIT();
1.173 }
1.174
1.175 /**
2.1 --- a/src/sh4/sh4core.h Thu Dec 22 18:10:36 2011 +1000
2.2 +++ b/src/sh4/sh4core.h Fri Dec 23 08:20:17 2011 +1000
2.3 @@ -242,6 +242,19 @@
2.4 void FASTCALL sh4_raise_tlb_multihit( sh4vma_t );
2.5 void FASTCALL sh4_accept_interrupt( void );
2.6
2.7 +#define RAISE_TLB_ERROR(code, vpn) sh4_raise_tlb_exception(code, vpn)
2.8 +#define RAISE_MEM_ERROR(code, vpn) \
2.9 + MMIO_WRITE(MMU, TEA, vpn); \
2.10 + MMIO_WRITE(MMU, PTEH, ((MMIO_READ(MMU, PTEH) & 0x000003FF) | (vpn&0xFFFFFC00))); \
2.11 + sh4_raise_exception(code);
2.12 +#define RAISE_TLB_MULTIHIT_ERROR(vpn) sh4_raise_tlb_multihit(vpn)
2.13 +
2.14 +#ifdef HAVE_FRAME_ADDRESS
2.15 +#define SH4_EXCEPTION_EXIT() do{ *(((void * volatile *)__builtin_frame_address(0))+1) = exc; } while(0)
2.16 +#else
2.17 +#define SH4_EXCEPTION_EXIT() sh4_core_exit(CORE_EXIT_EXCEPTION)
2.18 +#endif
2.19 +
2.20 /**
2.21 * Helper method to update the SH4 registers for an exception, without
2.22 * touching the MMU registers. Mainly for use in shadow mode.
3.1 --- a/src/sh4/shadow.c Thu Dec 22 18:10:36 2011 +1000
3.2 +++ b/src/sh4/shadow.c Fri Dec 23 08:20:17 2011 +1000
3.3 @@ -31,10 +31,8 @@
3.4 #ifdef HAVE_FRAME_ADDRESS
3.5 static FASTCALL __attribute__((noinline)) void *__first_arg(void *a, void *b) { return a; }
3.6 #define INIT_EXCEPTIONS(label) goto *__first_arg(&&fnstart,&&label); fnstart:
3.7 -#define EXCEPTION_EXIT(exc) do{ *(((void * volatile *)__builtin_frame_address(0))+1) = exc; } while(0)
3.8 #else
3.9 #define INIT_EXCEPTIONS(label)
3.10 -#define EXCEPTION_EXIT(exc) sh4_core_exit(CORE_EXIT_EXCEPTION)
3.11 #endif
3.12
3.13 typedef enum {
3.14 @@ -211,7 +209,7 @@
3.15 return rv;
3.16 except:
3.17 log_mem_op( READ_LONG, addr, rv, 1 );
3.18 - EXCEPTION_EXIT(exc);
3.19 + SH4_EXCEPTION_EXIT();
3.20 }
3.21
3.22 static FASTCALL int32_t log_read_word( sh4addr_t addr, void *exc )
3.23 @@ -222,7 +220,7 @@
3.24 return rv;
3.25 except:
3.26 log_mem_op( READ_WORD, addr, rv, 1 );
3.27 - EXCEPTION_EXIT(exc);
3.28 + SH4_EXCEPTION_EXIT();
3.29 }
3.30
3.31 static FASTCALL int32_t log_read_byte( sh4addr_t addr, void *exc )
3.32 @@ -233,7 +231,7 @@
3.33 return rv;
3.34 except:
3.35 log_mem_op( READ_BYTE, addr, rv, 1 );
3.36 - EXCEPTION_EXIT(exc);
3.37 + SH4_EXCEPTION_EXIT();
3.38 }
3.39
3.40 static FASTCALL int32_t log_read_byte_for_write( sh4addr_t addr, void *exc )
3.41 @@ -244,7 +242,7 @@
3.42 return rv;
3.43 except:
3.44 log_mem_op( READ_BYTE_FOR_WRITE, addr, rv, 1 );
3.45 - EXCEPTION_EXIT(exc);
3.46 + SH4_EXCEPTION_EXIT();
3.47 }
3.48
3.49 static FASTCALL void log_write_long( sh4addr_t addr, uint32_t val, void *exc )
3.50 @@ -257,7 +255,7 @@
3.51 except:
3.52 if( !IS_STORE_QUEUE(addr) )
3.53 log_mem_op( WRITE_LONG, addr, val, 1 );
3.54 - EXCEPTION_EXIT(exc);
3.55 + SH4_EXCEPTION_EXIT();
3.56 }
3.57
3.58 static FASTCALL void log_write_word( sh4addr_t addr, uint32_t val, void *exc )
3.59 @@ -270,7 +268,7 @@
3.60 except:
3.61 if( !IS_STORE_QUEUE(addr) )
3.62 log_mem_op( WRITE_WORD, addr, val, 1 );
3.63 - EXCEPTION_EXIT(exc);
3.64 + SH4_EXCEPTION_EXIT();
3.65 }
3.66
3.67 static FASTCALL void log_write_byte( sh4addr_t addr, uint32_t val, void *exc )
3.68 @@ -283,7 +281,7 @@
3.69 except:
3.70 if( !IS_STORE_QUEUE(addr) )
3.71 log_mem_op( WRITE_BYTE, addr, val, 1 );
3.72 - EXCEPTION_EXIT(exc);
3.73 + SH4_EXCEPTION_EXIT();
3.74 }
3.75
3.76 static FASTCALL void log_prefetch( sh4addr_t addr, void *exc )
3.77 @@ -294,7 +292,7 @@
3.78 return;
3.79 except:
3.80 log_mem_op( PREFETCH, addr, 0, 1 );
3.81 - EXCEPTION_EXIT(exc);
3.82 + SH4_EXCEPTION_EXIT();
3.83 }
3.84
3.85 static FASTCALL int32_t check_read_long( sh4addr_t addr, void *exc )
3.86 @@ -302,7 +300,7 @@
3.87 int except;
3.88 int32_t value = check_mem_op( READ_LONG, addr, 0, &except );
3.89 if( except ) {
3.90 - EXCEPTION_EXIT(exc);
3.91 + SH4_EXCEPTION_EXIT();
3.92 }
3.93 return value;
3.94 }
3.95 @@ -312,7 +310,7 @@
3.96 int except;
3.97 int32_t value = check_mem_op( READ_WORD, addr, 0, &except );
3.98 if( except ) {
3.99 - EXCEPTION_EXIT(exc);
3.100 + SH4_EXCEPTION_EXIT();
3.101 }
3.102 return value;
3.103 }
3.104 @@ -322,7 +320,7 @@
3.105 int except;
3.106 int32_t value = check_mem_op( READ_BYTE, addr, 0, &except );
3.107 if( except ) {
3.108 - EXCEPTION_EXIT(exc);
3.109 + SH4_EXCEPTION_EXIT();
3.110 }
3.111 return value;
3.112 }
3.113 @@ -332,7 +330,7 @@
3.114 int except;
3.115 int32_t value = check_mem_op( READ_BYTE_FOR_WRITE, addr, 0, &except );
3.116 if( except ) {
3.117 - EXCEPTION_EXIT(exc);
3.118 + SH4_EXCEPTION_EXIT();
3.119 }
3.120 return value;
3.121 }
3.122 @@ -343,7 +341,7 @@
3.123 int except;
3.124 check_mem_op( WRITE_LONG, addr, value, &except );
3.125 if( except ) {
3.126 - EXCEPTION_EXIT(exc);
3.127 + SH4_EXCEPTION_EXIT();
3.128 }
3.129 } else {
3.130 real_address_space[addr>>12]->write_long(addr, value);
3.131 @@ -356,7 +354,7 @@
3.132 int except;
3.133 check_mem_op( WRITE_WORD, addr, value, &except );
3.134 if( except ) {
3.135 - EXCEPTION_EXIT(exc);
3.136 + SH4_EXCEPTION_EXIT();
3.137 }
3.138 } else {
3.139 real_address_space[addr>>12]->write_word(addr, value);
3.140 @@ -369,7 +367,7 @@
3.141 int except;
3.142 check_mem_op( WRITE_BYTE, addr, value, &except );
3.143 if( except ) {
3.144 - EXCEPTION_EXIT(exc);
3.145 + SH4_EXCEPTION_EXIT();
3.146 }
3.147 } else {
3.148 real_address_space[addr>>12]->write_byte(addr, value);
3.149 @@ -381,7 +379,7 @@
3.150 int except;
3.151 check_mem_op( PREFETCH, addr, 0, &except );
3.152 if( except ) {
3.153 - EXCEPTION_EXIT(exc);
3.154 + SH4_EXCEPTION_EXIT();
3.155 }
3.156 }
3.157
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