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lxdream.org :: lxdream :: r323:067583c1a704
lxdream 0.9.1
released Jun 29
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changeset323:067583c1a704
parent322:354407942957
child324:340f0b0b7af3
authornkeynes
dateThu Jan 25 08:21:56 2007 +0000 (12 years ago)
Remove cached BSC values (wasn't being saved, and is rarely used anyway)
src/sh4/sh4mmio.c
1.1 --- a/src/sh4/sh4mmio.c Thu Jan 25 08:18:03 2007 +0000
1.2 +++ b/src/sh4/sh4mmio.c Thu Jan 25 08:21:56 2007 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: sh4mmio.c,v 1.10 2007-01-23 08:17:06 nkeynes Exp $
1.6 + * $Id: sh4mmio.c,v 1.11 2007-01-25 08:21:56 nkeynes Exp $
1.7 *
1.8 * Miscellaneous and not-really-implemented SH4 peripheral modules. Also
1.9 * responsible for including the IMPL side of the SH4 MMIO pages.
1.10 @@ -98,72 +98,59 @@
1.11
1.12 /********************************* BSC *************************************/
1.13
1.14 -uint16_t bsc_output_mask_lo = 0, bsc_output_mask_hi = 0;
1.15 -uint16_t bsc_input_mask_lo = 0, bsc_input_mask_hi = 0;
1.16 -uint32_t bsc_output = 0, bsc_input = 0x0300;
1.17 +uint32_t bsc_input = 0x0300;
1.18
1.19 -void bsc_out( int output, int mask )
1.20 +uint16_t bsc_read_pdtra()
1.21 {
1.22 - /* Go figure... The BIOS won't start without this mess though */
1.23 - if( ((output | (~mask)) & 0x03) == 3 ) {
1.24 - bsc_output |= 0x03;
1.25 + int i;
1.26 + uint32_t pctra = MMIO_READ( BSC, PCTRA );
1.27 + uint16_t output = MMIO_READ( BSC, PDTRA );
1.28 + uint16_t input_mask = 0, output_mask = 0;
1.29 + for( i=0; i<16; i++ ) {
1.30 + int bits = (pctra >> (i<<1)) & 0x03;
1.31 + if( bits == 2 ) input_mask |= (1<<i);
1.32 + else if( bits != 0 ) output_mask |= (1<<i);
1.33 + }
1.34 +
1.35 + /* ??? */
1.36 + if( ((output | (~output_mask)) & 0x03) == 3 ) {
1.37 + output |= 0x03;
1.38 } else {
1.39 - bsc_output &= ~0x03;
1.40 + output &= ~0x03;
1.41 }
1.42 +
1.43 + return (bsc_input & input_mask) | output;
1.44 }
1.45
1.46 -void mmio_region_BSC_write( uint32_t reg, uint32_t val )
1.47 +uint32_t bsc_read_pdtrb()
1.48 {
1.49 int i;
1.50 - switch( reg ) {
1.51 - case PCTRA:
1.52 - bsc_input_mask_lo = bsc_output_mask_lo = 0;
1.53 - for( i=0; i<16; i++ ) {
1.54 - int bits = (val >> (i<<1)) & 0x03;
1.55 - if( bits == 2 ) bsc_input_mask_lo |= (1<<i);
1.56 - else if( bits != 0 ) bsc_output_mask_lo |= (1<<i);
1.57 - }
1.58 - bsc_output = (bsc_output&0x000F0000) |
1.59 - (MMIO_READ( BSC, PDTRA ) & bsc_output_mask_lo);
1.60 - bsc_out( MMIO_READ( BSC, PDTRA ) | ((MMIO_READ(BSC,PDTRB)<<16)),
1.61 - bsc_output_mask_lo | (bsc_output_mask_hi<<16) );
1.62 - break;
1.63 - case PCTRB:
1.64 - bsc_input_mask_hi = bsc_output_mask_hi = 0;
1.65 - for( i=0; i<4; i++ ) {
1.66 - int bits = (val >> (i>>1)) & 0x03;
1.67 - if( bits == 2 ) bsc_input_mask_hi |= (1<<i);
1.68 - else if( bits != 0 ) bsc_output_mask_hi |= (1<<i);
1.69 - }
1.70 - bsc_output = (bsc_output&0xFFFF) |
1.71 - ((MMIO_READ( BSC, PDTRA ) & bsc_output_mask_hi)<<16);
1.72 - break;
1.73 - case PDTRA:
1.74 - bsc_output = (bsc_output&0x000F0000) |
1.75 - (val & bsc_output_mask_lo );
1.76 - bsc_out( val | ((MMIO_READ(BSC,PDTRB)<<16)),
1.77 - bsc_output_mask_lo | (bsc_output_mask_hi<<16) );
1.78 - break;
1.79 - case PDTRB:
1.80 - bsc_output = (bsc_output&0xFFFF) |
1.81 - ( (val & bsc_output_mask_hi)<<16 );
1.82 - break;
1.83 + uint32_t pctrb = MMIO_READ( BSC, PCTRB );
1.84 + uint16_t output = MMIO_READ( BSC, PDTRB );
1.85 + uint16_t input_mask = 0, output_mask = 0;
1.86 + for( i=0; i<4; i++ ) {
1.87 + int bits = (pctrb >> (i<<1)) & 0x03;
1.88 + if( bits == 2 ) input_mask |= (1<<i);
1.89 + else if( bits != 0 ) output_mask |= (1<<i);
1.90 }
1.91 - WARN( "Write to (mostly) unimplemented BSC (%03X <= %08X) [%s: %s]",
1.92 - reg, val, MMIO_REGID(BSC,reg), MMIO_REGDESC(BSC,reg) );
1.93 - MMIO_WRITE( BSC, reg, val );
1.94 +
1.95 + return ((bsc_input>>16) & input_mask) | output;
1.96 +
1.97 }
1.98
1.99 +MMIO_REGION_WRITE_STUBFN(BSC)
1.100 +
1.101 int32_t mmio_region_BSC_read( uint32_t reg )
1.102 {
1.103 int32_t val;
1.104 + int i;
1.105 switch( reg ) {
1.106 case PDTRA:
1.107 - val = (bsc_input & bsc_input_mask_lo) | (bsc_output&0xFFFF);
1.108 - break;
1.109 + val = bsc_read_pdtra();
1.110 + break;
1.111 case PDTRB:
1.112 - val = ((bsc_input>>16) & bsc_input_mask_hi) | (bsc_output>>16);
1.113 - break;
1.114 + val = bsc_read_pdtrb();
1.115 + break;
1.116 default:
1.117 val = MMIO_READ( BSC, reg );
1.118 }
.