lxdream 0.9.1revision 11:0a82ef380c45
summary |
tree |
shortlog |
changelog |
graph |
changeset |
raw | bz2 | zip | gz | changeset | 11:0a82ef380c45 |
| parent | 10:c898b37506e0 |
| child | 12:7748fcf320b9 |
| author | nkeynes |
| date | Sun Dec 11 12:00:09 2005 +0000 (18 years ago) |
Moved arm material under aica/
Hooked arm disasm up
Hooked arm disasm up
 | src/Makefile.am | view | annotate | diff | log | |
| src/Makefile.in | view | annotate | diff | log | |
| src/aica.c | view | annotate | diff | log | ||
| src/aica.h | view | annotate | diff | log | ||
| src/aica/aica.c | view | annotate | diff | log | |
| src/aica/aica.h | view | annotate | diff | log | |
| src/aica/armcore.c | view | annotate | diff | log | |
| src/aica/armcore.h | view | annotate | diff | log | |
| src/aica/armdasm.c | view | annotate | diff | log | |
| src/aica/armmem.c | view | annotate | diff | log | |
| src/cpu.h | view | annotate | diff | log | |
| src/dreamcast.c | view | annotate | diff | log | |
| src/gui/debug_win.c | view | annotate | diff | log | |
| src/gui/gui.h | view | annotate | diff | log | |
| src/main.c | view | annotate | diff | log | |
| src/mem.c | view | annotate | diff | log | |
| src/mem.h | view | annotate | diff | log | |
| src/sh4/sh4dasm.c | view | annotate | diff | log | |
| src/sh4/sh4dasm.h | view | annotate | diff | log |
1.1 --- a/src/Makefile.am Sun Dec 11 05:15:36 2005 +00001.2 +++ b/src/Makefile.am Sun Dec 11 12:00:09 2005 +00001.3 @@ -16,13 +16,14 @@1.4 gui.c gui.h mmr_win.c debug_win.c dump_win.c \1.5 mem.c mem.h mmio.h \1.6 asic.c asic.h pvr2.c pvr2.h ide.c ide.h \1.7 - video.c dreamcast.c dreamcast.h aica.c aica.h\1.8 + video.c dreamcast.c dreamcast.h \1.9 maple.c maple.h maple/controller.c maple/controller.h \1.10 sh4/intc.c sh4/intc.h sh4/sh4mem.c \1.11 sh4/sh4core.c sh4/sh4core.h sh4/sh4dasm.c sh4/sh4dasm.h \1.12 sh4/sh4mmio.c sh4/sh4mmio.h sh4/watch.c \1.13 + aica/armcore.c aica/armcore.h aica/armdasm.c aica/armmem.c \1.14 + aica/aica.c aica/aica.h \1.15 fileio.c ipbin.c1.16 -## aica/armcore.c aica/armcore.h aica/armdasm.c \1.18 dream_LDADD = @PACKAGE_LIBS@ $(INTLLIBS)
2.1 --- a/src/Makefile.in Sun Dec 11 05:15:36 2005 +00002.2 +++ b/src/Makefile.in Sun Dec 11 12:00:09 2005 +00002.3 @@ -143,11 +143,13 @@2.4 gui.c gui.h mmr_win.c debug_win.c dump_win.c \2.5 mem.c mem.h mmio.h \2.6 asic.c asic.h pvr2.c pvr2.h ide.c ide.h \2.7 - video.c dreamcast.c dreamcast.h aica.c aica.h\2.8 + video.c dreamcast.c dreamcast.h \2.9 maple.c maple.h maple/controller.c maple/controller.h \2.10 sh4/intc.c sh4/intc.h sh4/sh4mem.c \2.11 sh4/sh4core.c sh4/sh4core.h sh4/sh4dasm.c sh4/sh4dasm.h \2.12 sh4/sh4mmio.c sh4/sh4mmio.h sh4/watch.c \2.13 + aica/armcore.c aica/armcore.h aica/armdasm.c aica/armmem.c \2.14 + aica/aica.c aica/aica.h \2.15 fileio.c ipbin.c2.18 @@ -166,10 +168,11 @@2.19 callbacks.$(OBJEXT) gui.$(OBJEXT) mmr_win.$(OBJEXT) \2.20 debug_win.$(OBJEXT) dump_win.$(OBJEXT) mem.$(OBJEXT) \2.21 asic.$(OBJEXT) pvr2.$(OBJEXT) ide.$(OBJEXT) video.$(OBJEXT) \2.22 - dreamcast.$(OBJEXT) aica.$(OBJEXT) maple.$(OBJEXT) \2.23 - controller.$(OBJEXT) intc.$(OBJEXT) sh4mem.$(OBJEXT) \2.24 - sh4core.$(OBJEXT) sh4dasm.$(OBJEXT) sh4mmio.$(OBJEXT) \2.25 - watch.$(OBJEXT) fileio.$(OBJEXT) ipbin.$(OBJEXT)2.26 + dreamcast.$(OBJEXT) maple.$(OBJEXT) controller.$(OBJEXT) \2.27 + intc.$(OBJEXT) sh4mem.$(OBJEXT) sh4core.$(OBJEXT) \2.28 + sh4dasm.$(OBJEXT) sh4mmio.$(OBJEXT) watch.$(OBJEXT) \2.29 + armcore.$(OBJEXT) armdasm.$(OBJEXT) armmem.$(OBJEXT) \2.30 + aica.$(OBJEXT) fileio.$(OBJEXT) ipbin.$(OBJEXT)2.31 dream_OBJECTS = $(am_dream_OBJECTS)2.32 dream_DEPENDENCIES =2.33 dream_LDFLAGS =2.34 @@ -177,19 +180,20 @@2.35 DEFAULT_INCLUDES = -I. -I$(srcdir) -I$(top_builddir)2.36 depcomp = $(SHELL) $(top_srcdir)/depcomp2.37 am__depfiles_maybe = depfiles2.38 -@AMDEP_TRUE@DEP_FILES = ./$(DEPDIR)/aica.Po ./$(DEPDIR)/asic.Po \2.39 -@AMDEP_TRUE@ ./$(DEPDIR)/callbacks.Po ./$(DEPDIR)/controller.Po \2.40 -@AMDEP_TRUE@ ./$(DEPDIR)/debug_win.Po ./$(DEPDIR)/dreamcast.Po \2.41 -@AMDEP_TRUE@ ./$(DEPDIR)/dump_win.Po ./$(DEPDIR)/fileio.Po \2.42 -@AMDEP_TRUE@ ./$(DEPDIR)/gui.Po ./$(DEPDIR)/ide.Po \2.43 -@AMDEP_TRUE@ ./$(DEPDIR)/intc.Po ./$(DEPDIR)/interface.Po \2.44 -@AMDEP_TRUE@ ./$(DEPDIR)/ipbin.Po ./$(DEPDIR)/main.Po \2.45 -@AMDEP_TRUE@ ./$(DEPDIR)/maple.Po ./$(DEPDIR)/mem.Po \2.46 -@AMDEP_TRUE@ ./$(DEPDIR)/mmr_win.Po ./$(DEPDIR)/pvr2.Po \2.47 -@AMDEP_TRUE@ ./$(DEPDIR)/sh4core.Po ./$(DEPDIR)/sh4dasm.Po \2.48 -@AMDEP_TRUE@ ./$(DEPDIR)/sh4mem.Po ./$(DEPDIR)/sh4mmio.Po \2.49 -@AMDEP_TRUE@ ./$(DEPDIR)/support.Po ./$(DEPDIR)/video.Po \2.50 -@AMDEP_TRUE@ ./$(DEPDIR)/watch.Po2.51 +@AMDEP_TRUE@DEP_FILES = ./$(DEPDIR)/aica.Po ./$(DEPDIR)/armcore.Po \2.52 +@AMDEP_TRUE@ ./$(DEPDIR)/armdasm.Po ./$(DEPDIR)/armmem.Po \2.53 +@AMDEP_TRUE@ ./$(DEPDIR)/asic.Po ./$(DEPDIR)/callbacks.Po \2.54 +@AMDEP_TRUE@ ./$(DEPDIR)/controller.Po ./$(DEPDIR)/debug_win.Po \2.55 +@AMDEP_TRUE@ ./$(DEPDIR)/dreamcast.Po ./$(DEPDIR)/dump_win.Po \2.56 +@AMDEP_TRUE@ ./$(DEPDIR)/fileio.Po ./$(DEPDIR)/gui.Po \2.57 +@AMDEP_TRUE@ ./$(DEPDIR)/ide.Po ./$(DEPDIR)/intc.Po \2.58 +@AMDEP_TRUE@ ./$(DEPDIR)/interface.Po ./$(DEPDIR)/ipbin.Po \2.59 +@AMDEP_TRUE@ ./$(DEPDIR)/main.Po ./$(DEPDIR)/maple.Po \2.60 +@AMDEP_TRUE@ ./$(DEPDIR)/mem.Po ./$(DEPDIR)/mmr_win.Po \2.61 +@AMDEP_TRUE@ ./$(DEPDIR)/pvr2.Po ./$(DEPDIR)/sh4core.Po \2.62 +@AMDEP_TRUE@ ./$(DEPDIR)/sh4dasm.Po ./$(DEPDIR)/sh4mem.Po \2.63 +@AMDEP_TRUE@ ./$(DEPDIR)/sh4mmio.Po ./$(DEPDIR)/support.Po \2.64 +@AMDEP_TRUE@ ./$(DEPDIR)/video.Po ./$(DEPDIR)/watch.Po2.65 COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \2.66 $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)2.67 CCLD = $(CC)2.68 @@ -242,6 +246,9 @@2.69 -rm -f *.tab.c2.71 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/aica.Po@am__quote@2.72 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/armcore.Po@am__quote@2.73 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/armdasm.Po@am__quote@2.74 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/armmem.Po@am__quote@2.75 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/asic.Po@am__quote@2.76 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/callbacks.Po@am__quote@2.77 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/controller.Po@am__quote@2.78 @@ -442,6 +449,94 @@2.79 @AMDEP_TRUE@@am__fastdepCC_FALSE@ depfile='$(DEPDIR)/watch.Po' tmpdepfile='$(DEPDIR)/watch.TPo' @AMDEPBACKSLASH@2.80 @AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@2.81 @am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o watch.obj `if test -f 'sh4/watch.c'; then $(CYGPATH_W) 'sh4/watch.c'; else $(CYGPATH_W) '$(srcdir)/sh4/watch.c'; fi`2.82 +2.83 +armcore.o: aica/armcore.c2.84 +@am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT armcore.o -MD -MP -MF "$(DEPDIR)/armcore.Tpo" \2.85 +@am__fastdepCC_TRUE@ -c -o armcore.o `test -f 'aica/armcore.c' || echo '$(srcdir)/'`aica/armcore.c; \2.86 +@am__fastdepCC_TRUE@ then mv -f "$(DEPDIR)/armcore.Tpo" "$(DEPDIR)/armcore.Po"; \2.87 +@am__fastdepCC_TRUE@ else rm -f "$(DEPDIR)/armcore.Tpo"; exit 1; \2.88 +@am__fastdepCC_TRUE@ fi2.89 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='aica/armcore.c' object='armcore.o' libtool=no @AMDEPBACKSLASH@2.90 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ depfile='$(DEPDIR)/armcore.Po' tmpdepfile='$(DEPDIR)/armcore.TPo' @AMDEPBACKSLASH@2.91 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@2.92 +@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o armcore.o `test -f 'aica/armcore.c' || echo '$(srcdir)/'`aica/armcore.c2.93 +2.94 +armcore.obj: aica/armcore.c2.95 +@am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT armcore.obj -MD -MP -MF "$(DEPDIR)/armcore.Tpo" \2.96 +@am__fastdepCC_TRUE@ -c -o armcore.obj `if test -f 'aica/armcore.c'; then $(CYGPATH_W) 'aica/armcore.c'; else $(CYGPATH_W) '$(srcdir)/aica/armcore.c'; fi`; \2.97 +@am__fastdepCC_TRUE@ then mv -f "$(DEPDIR)/armcore.Tpo" "$(DEPDIR)/armcore.Po"; \2.98 +@am__fastdepCC_TRUE@ else rm -f "$(DEPDIR)/armcore.Tpo"; exit 1; \2.99 +@am__fastdepCC_TRUE@ fi2.100 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='aica/armcore.c' object='armcore.obj' libtool=no @AMDEPBACKSLASH@2.101 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ depfile='$(DEPDIR)/armcore.Po' tmpdepfile='$(DEPDIR)/armcore.TPo' @AMDEPBACKSLASH@2.102 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@2.103 +@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o armcore.obj `if test -f 'aica/armcore.c'; then $(CYGPATH_W) 'aica/armcore.c'; else $(CYGPATH_W) '$(srcdir)/aica/armcore.c'; fi`2.104 +2.105 +armdasm.o: aica/armdasm.c2.106 +@am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT armdasm.o -MD -MP -MF "$(DEPDIR)/armdasm.Tpo" \2.107 +@am__fastdepCC_TRUE@ -c -o armdasm.o `test -f 'aica/armdasm.c' || echo '$(srcdir)/'`aica/armdasm.c; \2.108 +@am__fastdepCC_TRUE@ then mv -f "$(DEPDIR)/armdasm.Tpo" "$(DEPDIR)/armdasm.Po"; \2.109 +@am__fastdepCC_TRUE@ else rm -f "$(DEPDIR)/armdasm.Tpo"; exit 1; \2.110 +@am__fastdepCC_TRUE@ fi2.111 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='aica/armdasm.c' object='armdasm.o' libtool=no @AMDEPBACKSLASH@2.112 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ depfile='$(DEPDIR)/armdasm.Po' tmpdepfile='$(DEPDIR)/armdasm.TPo' @AMDEPBACKSLASH@2.113 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@2.114 +@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o armdasm.o `test -f 'aica/armdasm.c' || echo '$(srcdir)/'`aica/armdasm.c2.115 +2.116 +armdasm.obj: aica/armdasm.c2.117 +@am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT armdasm.obj -MD -MP -MF "$(DEPDIR)/armdasm.Tpo" \2.118 +@am__fastdepCC_TRUE@ -c -o armdasm.obj `if test -f 'aica/armdasm.c'; then $(CYGPATH_W) 'aica/armdasm.c'; else $(CYGPATH_W) '$(srcdir)/aica/armdasm.c'; fi`; \2.119 +@am__fastdepCC_TRUE@ then mv -f "$(DEPDIR)/armdasm.Tpo" "$(DEPDIR)/armdasm.Po"; \2.120 +@am__fastdepCC_TRUE@ else rm -f "$(DEPDIR)/armdasm.Tpo"; exit 1; \2.121 +@am__fastdepCC_TRUE@ fi2.122 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='aica/armdasm.c' object='armdasm.obj' libtool=no @AMDEPBACKSLASH@2.123 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ depfile='$(DEPDIR)/armdasm.Po' tmpdepfile='$(DEPDIR)/armdasm.TPo' @AMDEPBACKSLASH@2.124 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@2.125 +@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o armdasm.obj `if test -f 'aica/armdasm.c'; then $(CYGPATH_W) 'aica/armdasm.c'; else $(CYGPATH_W) '$(srcdir)/aica/armdasm.c'; fi`2.126 +2.127 +armmem.o: aica/armmem.c2.128 +@am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT armmem.o -MD -MP -MF "$(DEPDIR)/armmem.Tpo" \2.129 +@am__fastdepCC_TRUE@ -c -o armmem.o `test -f 'aica/armmem.c' || echo '$(srcdir)/'`aica/armmem.c; \2.130 +@am__fastdepCC_TRUE@ then mv -f "$(DEPDIR)/armmem.Tpo" "$(DEPDIR)/armmem.Po"; \2.131 +@am__fastdepCC_TRUE@ else rm -f "$(DEPDIR)/armmem.Tpo"; exit 1; \2.132 +@am__fastdepCC_TRUE@ fi2.133 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='aica/armmem.c' object='armmem.o' libtool=no @AMDEPBACKSLASH@2.134 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ depfile='$(DEPDIR)/armmem.Po' tmpdepfile='$(DEPDIR)/armmem.TPo' @AMDEPBACKSLASH@2.135 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@2.136 +@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o armmem.o `test -f 'aica/armmem.c' || echo '$(srcdir)/'`aica/armmem.c2.137 +2.138 +armmem.obj: aica/armmem.c2.139 +@am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT armmem.obj -MD -MP -MF "$(DEPDIR)/armmem.Tpo" \2.140 +@am__fastdepCC_TRUE@ -c -o armmem.obj `if test -f 'aica/armmem.c'; then $(CYGPATH_W) 'aica/armmem.c'; else $(CYGPATH_W) '$(srcdir)/aica/armmem.c'; fi`; \2.141 +@am__fastdepCC_TRUE@ then mv -f "$(DEPDIR)/armmem.Tpo" "$(DEPDIR)/armmem.Po"; \2.142 +@am__fastdepCC_TRUE@ else rm -f "$(DEPDIR)/armmem.Tpo"; exit 1; \2.143 +@am__fastdepCC_TRUE@ fi2.144 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='aica/armmem.c' object='armmem.obj' libtool=no @AMDEPBACKSLASH@2.145 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ depfile='$(DEPDIR)/armmem.Po' tmpdepfile='$(DEPDIR)/armmem.TPo' @AMDEPBACKSLASH@2.146 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@2.147 +@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o armmem.obj `if test -f 'aica/armmem.c'; then $(CYGPATH_W) 'aica/armmem.c'; else $(CYGPATH_W) '$(srcdir)/aica/armmem.c'; fi`2.148 +2.149 +aica.o: aica/aica.c2.150 +@am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT aica.o -MD -MP -MF "$(DEPDIR)/aica.Tpo" \2.151 +@am__fastdepCC_TRUE@ -c -o aica.o `test -f 'aica/aica.c' || echo '$(srcdir)/'`aica/aica.c; \2.152 +@am__fastdepCC_TRUE@ then mv -f "$(DEPDIR)/aica.Tpo" "$(DEPDIR)/aica.Po"; \2.153 +@am__fastdepCC_TRUE@ else rm -f "$(DEPDIR)/aica.Tpo"; exit 1; \2.154 +@am__fastdepCC_TRUE@ fi2.155 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='aica/aica.c' object='aica.o' libtool=no @AMDEPBACKSLASH@2.156 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ depfile='$(DEPDIR)/aica.Po' tmpdepfile='$(DEPDIR)/aica.TPo' @AMDEPBACKSLASH@2.157 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@2.158 +@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o aica.o `test -f 'aica/aica.c' || echo '$(srcdir)/'`aica/aica.c2.159 +2.160 +aica.obj: aica/aica.c2.161 +@am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT aica.obj -MD -MP -MF "$(DEPDIR)/aica.Tpo" \2.162 +@am__fastdepCC_TRUE@ -c -o aica.obj `if test -f 'aica/aica.c'; then $(CYGPATH_W) 'aica/aica.c'; else $(CYGPATH_W) '$(srcdir)/aica/aica.c'; fi`; \2.163 +@am__fastdepCC_TRUE@ then mv -f "$(DEPDIR)/aica.Tpo" "$(DEPDIR)/aica.Po"; \2.164 +@am__fastdepCC_TRUE@ else rm -f "$(DEPDIR)/aica.Tpo"; exit 1; \2.165 +@am__fastdepCC_TRUE@ fi2.166 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='aica/aica.c' object='aica.obj' libtool=no @AMDEPBACKSLASH@2.167 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ depfile='$(DEPDIR)/aica.Po' tmpdepfile='$(DEPDIR)/aica.TPo' @AMDEPBACKSLASH@2.168 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@2.169 +@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o aica.obj `if test -f 'aica/aica.c'; then $(CYGPATH_W) 'aica/aica.c'; else $(CYGPATH_W) '$(srcdir)/aica/aica.c'; fi`2.170 uninstall-info-am:2.172 ETAGS = etags
3.1 --- a/src/aica.c Sun Dec 11 05:15:36 2005 +00003.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +00003.3 @@ -1,21 +0,0 @@3.4 -#include "dream.h"3.5 -#include "aica.h"3.6 -#define MMIO_IMPL3.7 -#include "aica.h"3.8 -3.9 -MMIO_REGION_DEFFNS( AICA0 )3.10 -MMIO_REGION_DEFFNS( AICA1 )3.11 -MMIO_REGION_DEFFNS( AICA2 )3.12 -3.13 -void aica_init( void )3.14 -{3.15 - register_io_regions( mmio_list_spu );3.16 - MMIO_NOTRACE(AICA0);3.17 - MMIO_NOTRACE(AICA1);3.18 -}3.19 -3.20 -void aica_reset( void )3.21 -{3.22 -3.23 -}3.24 -
4.1 --- a/src/aica.h Sun Dec 11 05:15:36 2005 +00004.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +00004.3 @@ -1,25 +0,0 @@4.4 -#include "mmio.h"4.5 -4.6 -MMIO_REGION_BEGIN( 0x00700000, AICA0, "AICA Sound System 0-31" )4.7 -LONG_PORT( 0x000, AICACH0, PORT_MRW, UNDEFINED, "Channel 0" )4.8 -MMIO_REGION_END4.9 -4.10 -MMIO_REGION_BEGIN( 0x00701000, AICA1, "AICA Sound System 32-63" )4.11 -LONG_PORT( 0x000, AICACH32, PORT_MRW, UNDEFINED, "Channel 32" )4.12 -MMIO_REGION_END4.13 -4.14 -MMIO_REGION_BEGIN( 0x00702000, AICA2, "AICA Sound System Control" )4.15 -LONG_PORT( 0x040, VOLLEFT, PORT_MRW, 0, "Volume left" )4.16 -LONG_PORT( 0x044, VOLRIGHT, PORT_MRW, 0, "Volume right" )4.17 -LONG_PORT( 0x800, AICA_CTRL, PORT_MRW, UNDEFINED, "AICA control" )4.18 -LONG_PORT( 0xC00, AICA_RESET,PORT_MRW, 0, "AICA reset" )4.19 -MMIO_REGION_END4.20 -4.21 -MMIO_REGION_LIST_BEGIN( spu )4.22 - MMIO_REGION( AICA0 )4.23 - MMIO_REGION( AICA1 )4.24 - MMIO_REGION( AICA2 )4.25 -MMIO_REGION_LIST_END4.26 -4.27 -void aica_init( void );4.28 -void aica_reset( void );
5.1 --- /dev/null Thu Jan 01 00:00:00 1970 +00005.2 +++ b/src/aica/aica.c Sun Dec 11 12:00:09 2005 +00005.3 @@ -0,0 +1,82 @@5.4 +/**5.5 + * $Id: aica.c,v 1.1 2005-12-11 12:00:09 nkeynes Exp $5.6 + *5.7 + * This is the core sound system (ie the bit which does the actual work)5.8 + *5.9 + * Copyright (c) 2005 Nathan Keynes.5.10 + *5.11 + * This program is free software; you can redistribute it and/or modify5.12 + * it under the terms of the GNU General Public License as published by5.13 + * the Free Software Foundation; either version 2 of the License, or5.14 + * (at your option) any later version.5.15 + *5.16 + * This program is distributed in the hope that it will be useful,5.17 + * but WITHOUT ANY WARRANTY; without even the implied warranty of5.18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the5.19 + * GNU General Public License for more details.5.20 + */5.21 +5.22 +#include "dream.h"5.23 +#include "aica.h"5.24 +#define MMIO_IMPL5.25 +#include "aica.h"5.26 +5.27 +MMIO_REGION_READ_DEFFN( AICA0 )5.28 +MMIO_REGION_READ_DEFFN( AICA1 )5.29 +MMIO_REGION_READ_DEFFN( AICA2 )5.30 +5.31 +/**5.32 + * Initialize the AICA subsystem. Note requires that5.33 + */5.34 +void aica_init( void )5.35 +{5.36 + register_io_regions( mmio_list_spu );5.37 + MMIO_NOTRACE(AICA0);5.38 + MMIO_NOTRACE(AICA1);5.39 + arm_mem_init();5.40 +}5.41 +5.42 +void aica_reset( void )5.43 +{5.44 +5.45 +}5.46 +5.47 +/** Channel register structure:5.48 + * 005.49 + * 045.50 + * 08 4 Loop start address5.51 + * 0C 4 Loop end address5.52 + * 10 4 Volume envelope5.53 + * 145.54 + * 18 4 Frequency (floating point5.55 + * 1C5.56 + * 205.57 + * 24 1 Pan5.58 + * 25 1 ??5.59 + * 265.60 + * 275.61 + * 28 1 ??5.62 + * 29 1 Volume5.63 + * 2C5.64 + * 305.65 + *5.66 +5.67 +/* Write to channels 0-31 */5.68 +void mmio_region_AICA0_write( uint32_t reg, uint32_t val )5.69 +{5.70 + // aica_write_channel( reg >> 7, reg % 128, val );5.71 +5.72 +}5.73 +5.74 +/* Write to channels 32-64 */5.75 +void mmio_region_AICA1_write( uint32_t reg, uint32_t val )5.76 +{5.77 + // aica_write_channel( (reg >> 7) + 32, reg % 128, val );5.78 +5.79 +}5.80 +5.81 +/* General registers */5.82 +void mmio_region_AICA2_write( uint32_t reg, uint32_t val )5.83 +{5.84 +5.85 +}
6.1 --- /dev/null Thu Jan 01 00:00:00 1970 +00006.2 +++ b/src/aica/aica.h Sun Dec 11 12:00:09 2005 +00006.3 @@ -0,0 +1,45 @@6.4 +/**6.5 + * $Id: aica.h,v 1.1 2005-12-11 12:00:09 nkeynes Exp $6.6 + *6.7 + * MMIO definitions for the AICA sound chip. Note that the regions defined6.8 + * here are relative to the SH4 memory map (0x00700000 based), rather than6.9 + * the ARM addresses (0x00800000 based).6.10 + *6.11 + * Copyright (c) 2005 Nathan Keynes.6.12 + *6.13 + * This program is free software; you can redistribute it and/or modify6.14 + * it under the terms of the GNU General Public License as published by6.15 + * the Free Software Foundation; either version 2 of the License, or6.16 + * (at your option) any later version.6.17 + *6.18 + * This program is distributed in the hope that it will be useful,6.19 + * but WITHOUT ANY WARRANTY; without even the implied warranty of6.20 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the6.21 + * GNU General Public License for more details.6.22 + */6.23 +6.24 +#include "mmio.h"6.25 +6.26 +MMIO_REGION_BEGIN( 0x00700000, AICA0, "AICA Sound System 0-31" )6.27 +LONG_PORT( 0x000, AICACH0, PORT_MRW, UNDEFINED, "Channel 0" )6.28 +MMIO_REGION_END6.29 +6.30 +MMIO_REGION_BEGIN( 0x00701000, AICA1, "AICA Sound System 32-63" )6.31 +LONG_PORT( 0x000, AICACH32, PORT_MRW, UNDEFINED, "Channel 32" )6.32 +MMIO_REGION_END6.33 +6.34 +MMIO_REGION_BEGIN( 0x00702000, AICA2, "AICA Sound System Control" )6.35 +LONG_PORT( 0x040, VOLLEFT, PORT_MRW, 0, "Volume left" )6.36 +LONG_PORT( 0x044, VOLRIGHT, PORT_MRW, 0, "Volume right" )6.37 +LONG_PORT( 0x800, AICA_CTRL, PORT_MRW, UNDEFINED, "AICA control" )6.38 +LONG_PORT( 0xC00, AICA_RESET,PORT_MRW, 0, "AICA reset" )6.39 +MMIO_REGION_END6.40 +6.41 +MMIO_REGION_LIST_BEGIN( spu )6.42 + MMIO_REGION( AICA0 )6.43 + MMIO_REGION( AICA1 )6.44 + MMIO_REGION( AICA2 )6.45 +MMIO_REGION_LIST_END6.46 +6.47 +void aica_init( void );6.48 +void aica_reset( void );
7.1 --- a/src/aica/armcore.c Sun Dec 11 05:15:36 2005 +00007.2 +++ b/src/aica/armcore.c Sun Dec 11 12:00:09 2005 +00007.3 @@ -6,12 +6,12 @@7.4 /* NB: The arm has a different memory map, but for the meantime... */7.5 /* Page references are as per ARM DDI 0100E (June 2000) */7.7 -#define MEM_READ_BYTE( addr ) mem_read_byte(addr)7.8 -#define MEM_READ_WORD( addr ) mem_read_word(addr)7.9 -#define MEM_READ_LONG( addr ) mem_read_long(addr)7.10 -#define MEM_WRITE_BYTE( addr, val ) mem_write_byte(addr, val)7.11 -#define MEM_WRITE_WORD( addr, val ) mem_write_word(addr, val)7.12 -#define MEM_WRITE_LONG( addr, val ) mem_write_long(addr, val)7.13 +#define MEM_READ_BYTE( addr ) arm_read_byte(addr)7.14 +#define MEM_READ_WORD( addr ) arm_read_word(addr)7.15 +#define MEM_READ_LONG( addr ) arm_read_long(addr)7.16 +#define MEM_WRITE_BYTE( addr, val ) arm_write_byte(addr, val)7.17 +#define MEM_WRITE_WORD( addr, val ) arm_write_word(addr, val)7.18 +#define MEM_WRITE_LONG( addr, val ) arm_write_long(addr, val)7.21 #define IS_NOTBORROW( result, op1, op2 ) (op2 > op1 ? 0 : 1)7.22 @@ -51,6 +51,10 @@7.23 #define UNDEF(ir) do{ ERROR( "Raising exception on undefined instruction at %08x, opcode = %04x", PC, ir ); return; } while(0)7.24 #define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", PC, ir ); return; }while(0)7.26 +void arm_restore_cpsr()7.27 +{7.28 +7.29 +}7.31 static uint32_t arm_get_shift_operand( uint32_t ir )7.32 {
8.1 --- a/src/aica/armcore.h Sun Dec 11 05:15:36 2005 +00008.2 +++ b/src/aica/armcore.h Sun Dec 11 12:00:09 2005 +00008.3 @@ -8,23 +8,24 @@8.4 #define ROTATE_RIGHT_LONG(operand,shift) ((((uint32_t)operand) >> shift) | ((operand<<(32-shift))) )8.6 struct arm_registers {8.7 - uint32_t r[16]; /* Current register bank */8.8 -8.9 - uint32_t cpsr;8.10 - uint32_t spsr;8.11 -8.12 - /* Various banked versions of the registers. */8.13 - uint32_t fiq_r[7]; /* FIQ bank 8..14 */8.14 - uint32_t irq_r[2]; /* IRQ bank 13..14 */8.15 - uint32_t und_r[2]; /* UND bank 13..14 */8.16 - uint32_t abt_r[2]; /* ABT bank 13..14 */8.17 - uint32_t svc_r[2]; /* SVC bank 13..14 */8.18 - uint32_t user_r[7]; /* User/System bank 8..14 */8.19 -8.20 - uint32_t c,n,z,v,t;8.21 -8.22 - /* "fake" registers */8.23 - uint32_t shift_c; /* used for temporary storage of shifter results */8.24 + uint32_t r[16]; /* Current register bank */8.25 +8.26 + uint32_t cpsr;8.27 + uint32_t spsr;8.28 +8.29 + /* Various banked versions of the registers. */8.30 + uint32_t fiq_r[7]; /* FIQ bank 8..14 */8.31 + uint32_t irq_r[2]; /* IRQ bank 13..14 */8.32 + uint32_t und_r[2]; /* UND bank 13..14 */8.33 + uint32_t abt_r[2]; /* ABT bank 13..14 */8.34 + uint32_t svc_r[2]; /* SVC bank 13..14 */8.35 + uint32_t user_r[7]; /* User/System bank 8..14 */8.36 +8.37 + uint32_t c,n,z,v,t;8.38 +8.39 + /* "fake" registers */8.40 + uint32_t shift_c; /* used for temporary storage of shifter results */8.41 + uint32_t icount; /* Instruction counter */8.42 };8.44 #define CPSR_N 0x80000000 /* Negative flag */8.45 @@ -48,4 +49,13 @@8.47 #define CARRY_FLAG (armr.cpsr&CPSR_C)8.49 +/* ARM Memory */8.50 +int32_t arm_read_long( uint32_t addr );8.51 +int32_t arm_read_word( uint32_t addr );8.52 +int32_t arm_read_byte( uint32_t addr );8.53 +void arm_write_long( uint32_t addr, uint32_t val );8.54 +void arm_write_word( uint32_t addr, uint32_t val );8.55 +void arm_write_byte( uint32_t addr, uint32_t val );8.56 +int32_t arm_read_phys_word( uint32_t addr );8.57 +8.58 #endif /* !dream_armcore_H */
9.1 --- a/src/aica/armdasm.c Sun Dec 11 05:15:36 2005 +00009.2 +++ b/src/aica/armdasm.c Sun Dec 11 12:00:09 2005 +00009.3 @@ -6,6 +6,7 @@9.4 */9.6 #include "aica/armcore.h"9.7 +#include "aica/armdasm.h"9.8 #include <stdlib.h>9.10 #define COND(ir) (ir>>28)9.11 @@ -32,6 +33,30 @@9.12 #define FSXC(ir) msrFieldMask[RN(ir)]9.13 #define ROTIMM12(ir) ROTATE_RIGHT_LONG(IMM8(ir),IMMROT(ir))9.15 +9.16 +const struct reg_desc_struct arm_reg_map[] =9.17 + { {"R0", REG_INT, &armr.r[0]}, {"R1", REG_INT, &armr.r[1]},9.18 + {"R2", REG_INT, &armr.r[2]}, {"R3", REG_INT, &armr.r[3]},9.19 + {"R4", REG_INT, &armr.r[4]}, {"R5", REG_INT, &armr.r[5]},9.20 + {"R6", REG_INT, &armr.r[6]}, {"R7", REG_INT, &armr.r[7]},9.21 + {"R8", REG_INT, &armr.r[8]}, {"R9", REG_INT, &armr.r[9]},9.22 + {"R10",REG_INT, &armr.r[10]}, {"R11",REG_INT, &armr.r[11]},9.23 + {"R12",REG_INT, &armr.r[12]}, {"R13",REG_INT, &armr.r[13]},9.24 + {"R14",REG_INT, &armr.r[14]}, {"R15",REG_INT, &armr.r[15]},9.25 + {"CPSR", REG_INT, &armr.cpsr}, {"SPSR", REG_INT, &armr.spsr},9.26 + {NULL, 0, NULL} };9.27 +9.28 +9.29 +const struct cpu_desc_struct arm_cpu_desc = { "ARM7", arm_disasm_instruction, 4,9.30 + (char *)&armr, sizeof(armr), arm_reg_map,9.31 + &armr.r[15], &armr.icount };9.32 +const struct cpu_desc_struct armt_cpu_desc = { "ARM7T", armt_disasm_instruction, 2,9.33 + (char*)&armr, sizeof(armr), arm_reg_map,9.34 + &armr.r[15], &armr.icount };9.35 +9.36 +9.37 +9.38 +9.39 char *conditionNames[] = { "EQ", "NE", "CS", "CC", "MI", "PL", "VS", "VC",9.40 "HI", "LS", "GE", "LT", "GT", "LE", " " /*AL*/, "NV" };9.42 @@ -127,12 +152,15 @@9.43 }9.44 }9.46 -int arm_disasm_instruction( uint32_t pc, char *buf, int len )9.47 +uint32_t arm_disasm_instruction( uint32_t pc, char *buf, int len, char *opcode )9.48 {9.49 - char operand[32];9.50 - uint32_t ir = arm_mem_read_long(pc);9.51 - int i,j;9.52 + char operand[32];9.53 + uint32_t ir = arm_read_long(pc);9.54 + int i,j;9.56 + sprintf( opcode, "%02X %02X %02X %02X", ir&0xFF, (ir>>8) & 0xFF,9.57 + (ir>>16)&0xFF, (ir>>24) );9.58 +9.59 if( COND(ir) == 0x0F ) {9.60 UNIMP(ir);9.61 return pc+4;9.62 @@ -421,3 +449,12 @@9.64 return pc+4;9.65 }9.66 +9.67 +9.68 +uint32_t armt_disasm_instruction( uint32_t pc, char *buf, int len, char *opcode )9.69 +{9.70 + uint32_t ir = arm_read_word(pc);9.71 + sprintf( opcode, "%02X %02X", ir&0xFF, (ir>>8) );9.72 + UNIMP(ir);9.73 + return pc+2;9.74 +}
10.1 --- a/src/aica/armmem.c Sun Dec 11 05:15:36 2005 +000010.2 +++ b/src/aica/armmem.c Sun Dec 11 12:00:09 2005 +000010.3 @@ -1,16 +1,57 @@10.4 +#include <stdlib.h>10.5 +#include "dream.h"10.6 #include "mem.h"10.8 +char *arm_mem = NULL;10.9 +10.10 void arm_mem_init() {10.11 -10.12 + arm_mem = mem_get_region_by_name( MEM_REGION_AUDIO );10.13 +10.14 }10.16 -uint32_t arm_mem_read_long( uint32_t addr ) {10.17 +int32_t arm_read_long( uint32_t addr ) {10.18 + if( addr < 0x00200000 ) {10.19 + return *(int32_t *)(arm_mem + addr);10.20 + /* Main sound ram */10.21 + } else if( addr >= 0x00800000 && addr <= 0x00803000 ) {10.22 + /* Sound registers / scratch ram */10.23 + } else {10.24 + /* Undefined memory */10.25 + ERROR( "Attempted long read to undefined page: %08X",10.26 + addr );10.27 + return 0;10.28 + }10.29 }10.31 -uint32_t arm_mem_read_byte( uint32_t addr ) {10.32 +int16_t arm_read_word( uint32_t addr ) {10.33 + if( addr < 0x00200000 ) {10.34 + return *(int16_t *)(arm_mem + addr);10.35 + /* Main sound ram */10.36 + } else {10.37 + /* Undefined memory */10.38 + ERROR( "Attempted word read to undefined page: %08X",10.39 + addr );10.40 + return 0;10.41 + }10.42 +10.43 }10.45 -uint32_t arm_mem_read_long_user( uint32_t addr ) {10.46 +int8_t arm_read_byte( uint32_t addr ) {10.47 + if( addr < 0x00200000 ) {10.48 + return *(int8_t *)(arm_mem + addr);10.49 + /* Main sound ram */10.50 + } else {10.51 + /* Undefined memory */10.52 + ERROR( "Attempted byte read to undefined page: %08X",10.53 + addr );10.54 + return 0;10.55 + }10.56 }10.58 -uint32_t arm_mem_read_byte_user( uint32_t addr ) {10.59 +uint32_t arm_read_long_user( uint32_t addr ) {10.60 +10.61 +}10.62 +10.63 +uint32_t arm_read_byte_user( uint32_t addr ) {10.64 +10.65 +}
11.1 --- a/src/cpu.h Sun Dec 11 05:15:36 2005 +000011.2 +++ b/src/cpu.h Sun Dec 11 12:00:09 2005 +000011.3 @@ -16,7 +16,9 @@11.4 * @param buflen Maximum length of buffer11.5 * @return next address to disassemble11.6 */11.7 -typedef uint32_t (*disasm_func_t)(uint32_t pc, char *buffer, int buflen );11.8 +typedef uint32_t (*disasm_func_t)(uint32_t pc, char *buffer, int buflen, char *opcode );11.9 +11.10 +typedef int (*is_valid_page_t)(uint32_t pc);11.12 #define REG_INT 011.13 #define REG_FLT 111.14 @@ -41,6 +43,7 @@11.15 uint32_t *pc; /* Pointer to PC register */11.16 uint32_t *icount; /* Pointer to instruction counter */11.17 /* Memory map? */11.18 + is_valid_page_t valid_page_func; /* Test for valid memory page */11.19 } *cpu_desc_t;11.21 #ifdef __cplusplus
12.1 --- a/src/dreamcast.c Sun Dec 11 05:15:36 2005 +000012.2 +++ b/src/dreamcast.c Sun Dec 11 12:00:09 2005 +000012.3 @@ -1,6 +1,6 @@12.4 #include "dream.h"12.5 #include "mem.h"12.6 -#include "aica.h"12.7 +#include "aica/aica.h"12.8 #include "asic.h"12.9 #include "ide.h"12.10 #include "dreamcast.h"12.11 @@ -9,18 +9,19 @@12.12 void dreamcast_init( void )12.13 {12.14 mem_init();12.15 + mem_create_ram_region( 0x0C000000, 16 MB, MEM_REGION_MAIN );12.16 + mem_create_ram_region( 0x05000000, 8 MB, MEM_REGION_VIDEO );12.17 + mem_create_ram_region( 0x00800000, 2 MB, MEM_REGION_AUDIO );12.18 + mem_create_ram_region( 0x00703000, 8 KB, MEM_REGION_AUDIO_SCRATCH ); /*???*/12.19 + mem_load_rom( "dcboot.rom", 0x00000000, 0x00200000, 0x89f2b1a1 );12.20 + mem_load_rom( "dcflash.rom",0x00200000, 0x00020000, 0x357c3568 );12.21 +12.22 sh4_init();12.23 asic_init();12.24 pvr2_init();12.25 aica_init();12.26 ide_reset();12.28 - mem_create_ram_region( 0x0C000000, 16 MB, MEM_REGION_MAIN );12.29 - mem_create_ram_region( 0x05000000, 8 MB, MEM_REGION_VIDEO );12.30 - mem_create_ram_region( 0x00800000, 2 MB, MEM_REGION_AUDIO );12.31 - mem_create_ram_region( 0x00703000, 8 KB, MEM_REGION_AUDIO_SCRATCH ); /*???*/12.32 - mem_load_rom( "dcboot.rom", 0x00000000, 0x00200000, 0x89f2b1a1 );12.33 - mem_load_rom( "dcflash.rom",0x00200000, 0x00020000, 0x357c3568 );12.34 }12.36 void dreamcast_reset( void )
13.1 --- a/src/gui/debug_win.c Sun Dec 11 05:15:36 2005 +000013.2 +++ b/src/gui/debug_win.c Sun Dec 11 12:00:09 2005 +000013.3 @@ -1,5 +1,5 @@13.4 /**13.5 - * $Id: debug_win.c,v 1.4 2005-12-11 05:15:36 nkeynes Exp $13.6 + * $Id: debug_win.c,v 1.5 2005-12-11 12:00:03 nkeynes Exp $13.7 * This file is responsible for the main debugger gui frame.13.8 *13.9 * Copyright (c) 2005 Nathan Keynes.13.10 @@ -30,6 +30,7 @@13.11 int disasm_to;13.12 int disasm_pc;13.13 struct cpu_desc_struct *cpu;13.14 + struct cpu_desc_struct **cpu_list;13.15 GtkCList *msgs_list;13.16 GtkCList *regs_list;13.17 GtkCList *disasm_list;13.18 @@ -39,31 +40,20 @@13.19 char saved_regs[0];13.20 };13.22 -debug_info_t init_debug_win(GtkWidget *win, struct cpu_desc_struct *cpu )13.23 +debug_info_t init_debug_win(GtkWidget *win, struct cpu_desc_struct **cpu_list )13.24 {13.25 - int i;13.26 - char buf[20];13.27 - char *arr[2];13.28 GnomeAppBar *appbar;13.30 - debug_info_t data = g_malloc0( sizeof(struct debug_info_struct) + cpu->regs_size );13.31 + debug_info_t data = g_malloc0( sizeof(struct debug_info_struct) + cpu_list[0]->regs_size );13.32 data->disasm_from = -1;13.33 data->disasm_to = -1;13.34 data->disasm_pc = -1;13.35 - data->cpu = cpu;13.36 + data->cpu = cpu_list[0];13.37 + data->cpu_list = cpu_list;13.39 data->regs_list= gtk_object_get_data(GTK_OBJECT(win), "reg_list");13.40 - arr[1] = buf;13.41 - for( i=0; data->cpu->regs_info[i].name != NULL; i++ ) {13.42 - arr[0] = data->cpu->regs_info[i].name;13.43 - if( data->cpu->regs_info->type == REG_INT )13.44 - sprintf( buf, "%08X", *((uint32_t *)data->cpu->regs_info->value) );13.45 - else13.46 - sprintf( buf, "%f", *((float *)data->cpu->regs_info->value) );13.47 - gtk_clist_append( data->regs_list, arr );13.48 - }13.49 gtk_widget_modify_font( GTK_WIDGET(data->regs_list), fixed_list_font );13.50 -13.51 + init_register_list( data );13.52 data->msgs_list = gtk_object_get_data(GTK_OBJECT(win), "output_list");13.53 data->disasm_list = gtk_object_get_data(GTK_OBJECT(win), "disasm_list");13.54 gtk_clist_set_column_width( data->disasm_list, 1, 16 );13.55 @@ -77,6 +67,24 @@13.56 return data;13.57 }13.59 +void init_register_list( debug_info_t data )13.60 +{13.61 + int i;13.62 + char buf[20];13.63 + char *arr[2];13.64 +13.65 + gtk_clist_clear( data->regs_list );13.66 + arr[1] = buf;13.67 + for( i=0; data->cpu->regs_info[i].name != NULL; i++ ) {13.68 + arr[0] = data->cpu->regs_info[i].name;13.69 + if( data->cpu->regs_info->type == REG_INT )13.70 + sprintf( buf, "%08X", *((uint32_t *)data->cpu->regs_info[i].value) );13.71 + else13.72 + sprintf( buf, "%f", *((float *)data->cpu->regs_info[i].value) );13.73 + gtk_clist_append( data->regs_list, arr );13.74 + }13.75 +}13.76 +13.77 /*13.78 * Check for changed registers and update the display13.79 */13.80 @@ -120,11 +128,11 @@13.82 void set_disassembly_region( debug_info_t data, unsigned int page )13.83 {13.84 - uint32_t i, posn;13.85 + uint32_t i, posn, next;13.86 uint16_t op;13.87 char buf[80];13.88 char addr[10];13.89 - char opcode[6] = "";13.90 + char opcode[16] = "";13.91 char *arr[4] = { addr, " ", opcode, buf };13.92 unsigned int from = page & 0xFFFFF000;13.93 unsigned int to = from + 4096;13.94 @@ -139,11 +147,10 @@13.95 gtk_clist_append( data->disasm_list, arr );13.96 gtk_clist_set_foreground( data->disasm_list, 0, &clrError );13.97 } else {13.98 - for( i=from; i<to; ) {13.99 - i = data->cpu->disasm_func( i, buf, sizeof(buf) );13.100 + for( i=from; i<to; i = next ) {13.101 + next = data->cpu->disasm_func( i, buf, sizeof(buf), opcode );13.102 sprintf( addr, "%08X", i );13.103 op = sh4_read_phys_word(i);13.104 - sprintf( opcode, "%02X %02X", op&0xFF, op>>8 );13.105 posn = gtk_clist_append( data->disasm_list, arr );13.106 if( buf[0] == '?' )13.107 gtk_clist_set_foreground( data->disasm_list, posn, &clrWarn );13.108 @@ -198,8 +205,17 @@13.110 void set_disassembly_cpu( debug_info_t data, char *cpu )13.111 {13.112 -13.113 -13.114 + int i;13.115 + for( i=0; data->cpu_list[i] != NULL; i++ ) {13.116 + if( strcmp( data->cpu_list[i]->name, cpu ) == 0 ) {13.117 + if( data->cpu != data->cpu_list[i] ) {13.118 + data->cpu = data->cpu_list[i];13.119 + set_disassembly_region( data, data->disasm_from );13.120 + init_register_list( data );13.121 + }13.122 + return;13.123 + }13.124 + }13.125 }13.127 uint32_t row_to_address( debug_info_t data, int row ) {
14.1 --- a/src/gui/gui.h Sun Dec 11 05:15:36 2005 +000014.2 +++ b/src/gui/gui.h Sun Dec 11 12:00:09 2005 +000014.3 @@ -21,7 +21,7 @@14.4 typedef struct debug_info_struct *debug_info_t;14.5 extern debug_info_t main_debug;14.7 -debug_info_t init_debug_win(GtkWidget *, cpu_desc_t cpu );14.8 +debug_info_t init_debug_win(GtkWidget *, cpu_desc_t *cpu );14.9 debug_info_t get_debug_info(GtkWidget *widget);14.10 void open_file_dialog( void );14.11 void update_mmr_win( void );
15.1 --- a/src/main.c Sun Dec 11 05:15:36 2005 +000015.2 +++ b/src/main.c Sun Dec 11 12:00:09 2005 +000015.3 @@ -13,10 +13,13 @@15.4 #include "gui.h"15.5 #include "sh4core.h"15.6 #include "sh4dasm.h"15.7 +#include "aica/armdasm.h"15.8 #include "mem.h"15.10 debug_info_t main_debug;15.12 +const cpu_desc_t cpu_descs[4] = { &sh4_cpu_desc, &arm_cpu_desc, &armt_cpu_desc, NULL };15.13 +15.14 int15.15 main (int argc, char *argv[])15.16 {15.17 @@ -29,7 +32,7 @@15.18 gnome_init ("dreamon", VERSION, argc, argv);15.19 init_gui();15.20 debug_win = create_debug_win ();15.21 - main_debug = init_debug_win(debug_win, &sh4_cpu_desc);15.22 + main_debug = init_debug_win(debug_win, cpu_descs);15.23 video_open();15.24 dreamcast_init();15.25 init_mmr_win(); /* Note: must be done after sh4_init */
16.1 --- a/src/mem.c Sun Dec 11 05:15:36 2005 +000016.2 +++ b/src/mem.c Sun Dec 11 12:00:09 2005 +000016.3 @@ -1,5 +1,5 @@16.4 /**16.5 - * $Id: mem.c,v 1.1 2005-12-11 05:15:36 nkeynes Exp $16.6 + * $Id: mem.c,v 1.2 2005-12-11 12:00:03 nkeynes Exp $16.7 * mem.c is responsible for creating and maintaining the overall system memory16.8 * map, as visible from the SH4 processor.16.9 *16.10 @@ -201,3 +201,4 @@16.11 return page+(addr&0xFFF);16.12 }16.13 }16.14 +
17.1 --- a/src/mem.h Sun Dec 11 05:15:36 2005 +000017.2 +++ b/src/mem.h Sun Dec 11 12:00:09 2005 +000017.3 @@ -26,14 +26,6 @@17.4 #define MB * (1024 * 1024)17.5 #define KB * 102417.7 -int32_t sh4_read_long( uint32_t addr );17.8 -int32_t sh4_read_word( uint32_t addr );17.9 -int32_t sh4_read_byte( uint32_t addr );17.10 -void sh4_write_long( uint32_t addr, uint32_t val );17.11 -void sh4_write_word( uint32_t addr, uint32_t val );17.12 -void sh4_write_byte( uint32_t addr, uint32_t val );17.13 -int32_t sh4_read_phys_word( uint32_t addr );17.14 -17.15 void *mem_create_ram_region( uint32_t base, uint32_t size, char *name );17.16 void *mem_load_rom( char *name, uint32_t base, uint32_t size, uint32_t crc );17.17 char *mem_get_region( uint32_t addr );
18.1 --- a/src/sh4/sh4dasm.c Sun Dec 11 05:15:36 2005 +000018.2 +++ b/src/sh4/sh4dasm.c Sun Dec 11 12:00:09 2005 +000018.3 @@ -5,7 +5,7 @@18.4 #define UNIMP(ir) snprintf( buf, len, "??? " )18.7 -struct reg_desc_struct sh4_reg_map[] =18.8 +const struct reg_desc_struct sh4_reg_map[] =18.9 { {"R0", REG_INT, &sh4r.r[0]}, {"R1", REG_INT, &sh4r.r[1]},18.10 {"R2", REG_INT, &sh4r.r[2]}, {"R3", REG_INT, &sh4r.r[3]},18.11 {"R4", REG_INT, &sh4r.r[4]}, {"R5", REG_INT, &sh4r.r[5]},18.12 @@ -24,11 +24,11 @@18.13 {NULL, 0, NULL} };18.16 -struct cpu_desc_struct sh4_cpu_desc = { "SH4", sh4_disasm_instruction, 2,18.17 +const struct cpu_desc_struct sh4_cpu_desc = { "SH4", sh4_disasm_instruction, 2,18.18 (char *)&sh4r, sizeof(sh4r), sh4_reg_map,18.19 &sh4r.pc, &sh4r.icount };18.21 -uint32_t sh4_disasm_instruction( uint32_t pc, char *buf, int len )18.22 +uint32_t sh4_disasm_instruction( uint32_t pc, char *buf, int len, char *opcode )18.23 {18.24 uint16_t ir = sh4_read_word(pc);18.26 @@ -44,6 +44,8 @@18.27 #define FVN(ir) ((ir&0x0C00)>>10)18.28 #define FVM(ir) ((ir&0x0300)>>8)18.30 + sprintf( opcode, "%02X %02X", ir&0xFF, ir>>8 );18.31 +18.32 switch( (ir&0xF000)>>12 ) {18.33 case 0: /* 0000nnnnmmmmxxxx */18.34 switch( ir&0x000F ) {18.35 @@ -362,12 +364,12 @@18.36 {18.37 int pc;18.38 char buf[80];18.39 + char opcode[16];18.41 for( pc = from; pc < to; pc+=2 ) {18.42 - uint16_t op = sh4_read_word( pc );18.43 buf[0] = '\0';18.44 sh4_disasm_instruction( pc,18.45 - buf, sizeof(buf) );18.46 - fprintf( f, " %08x: %04x %s\n", pc + load_addr, op, buf );18.47 + buf, sizeof(buf), opcode );18.48 + fprintf( f, " %08x: %s %s\n", pc + load_addr, opcode, buf );18.49 }18.50 }
19.1 --- a/src/sh4/sh4dasm.h Sun Dec 11 05:15:36 2005 +000019.2 +++ b/src/sh4/sh4dasm.h Sun Dec 11 12:00:09 2005 +000019.3 @@ -9,10 +9,10 @@19.5 #include <stdio.h>19.7 -uint32_t sh4_disasm_instruction( uint32_t pc, char *buf, int len );19.8 +uint32_t sh4_disasm_instruction( uint32_t pc, char *buf, int len, char * );19.9 void sh4_disasm_region( FILE *f, int from, int to, int load_addr );19.11 -extern struct cpu_desc_struct sh4_cpu_desc;19.12 +extern const struct cpu_desc_struct sh4_cpu_desc;19.14 #ifdef __cplusplus19.15 }
.