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lxdream.org :: lxdream :: r886:2bc6d2329cce
lxdream 0.9.1
released Jun 29
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changeset886:2bc6d2329cce
parent885:a7de5e3d5be4
child887:8b3ee741c9d7
authornkeynes
dateMon Oct 20 05:08:31 2008 +0000 (11 years ago)
Fix texcache_init failing to clear texture_addr to -1
Replace direct references to PVR2 registers with a texcache_set_config() function called from glrender.c.
This also now actually does invalidation when palette mode or stride changes as well.
src/pvr2/glrender.c
src/pvr2/pvr2.h
src/pvr2/texcache.c
1.1 --- a/src/pvr2/glrender.c Mon Oct 20 05:01:39 2008 +0000
1.2 +++ b/src/pvr2/glrender.c Mon Oct 20 05:08:31 2008 +0000
1.3 @@ -60,6 +60,10 @@
1.4 void pvr2_scene_load_textures()
1.5 {
1.6 int i;
1.7 +
1.8 + texcache_set_config( MMIO_READ( PVR2, RENDER_PALETTE ) & 0x03,
1.9 + (MMIO_READ( PVR2, RENDER_TEXSIZE ) & 0x003F) << 5 );
1.10 +
1.11 for( i=0; i < pvr2_scene.poly_count; i++ ) {
1.12 struct polygon_struct *poly = &pvr2_scene.poly_array[i];
1.13 if( POLY1_TEXTURED(poly->context[0]) ) {
2.1 --- a/src/pvr2/pvr2.h Mon Oct 20 05:01:39 2008 +0000
2.2 +++ b/src/pvr2/pvr2.h Mon Oct 20 05:08:31 2008 +0000
2.3 @@ -330,6 +330,12 @@
2.4 void texcache_invalidate_page( uint32_t texture_addr );
2.5
2.6 /**
2.7 + * Set the global texture parameters for the scene (possibly invalidating
2.8 + * some existing textures)
2.9 + */
2.10 +void texcache_set_config( uint32_t palette_mode, uint32_t stride_width );
2.11 +
2.12 +/**
2.13 * Return a texture ID for the texture specified at the supplied address
2.14 * and given parameters (the same sequence of bytes could in theory have
2.15 * multiple interpretations). We use the texture address as the primary
3.1 --- a/src/pvr2/texcache.c Mon Oct 20 05:01:39 2008 +0000
3.2 +++ b/src/pvr2/texcache.c Mon Oct 20 05:08:31 2008 +0000
3.3 @@ -57,6 +57,8 @@
3.4 static texcache_entry_index texcache_page_lookup[PVR2_RAM_PAGES];
3.5 static uint32_t texcache_ref_counter;
3.6 static struct texcache_entry texcache_active_list[MAX_TEXTURES];
3.7 +static uint32_t texcache_palette_mode;
3.8 +static uint32_t texcache_stride_width;
3.9
3.10 /**
3.11 * Initialize the texture cache.
3.12 @@ -75,6 +77,8 @@
3.13 }
3.14 texcache_free_ptr = 0;
3.15 texcache_ref_counter = 0;
3.16 + texcache_palette_mode = 0;
3.17 + texcache_stride_width = 0;
3.18 }
3.19
3.20 /**
3.21 @@ -112,6 +116,7 @@
3.22 for( i=0; i<MAX_TEXTURES; i++ ) {
3.23 texcache_free_list[i] = i;
3.24 texcache_active_list[i].next = EMPTY_ENTRY;
3.25 + texcache_active_list[i].texture_addr = -1;
3.26 if( texcache_active_list[i].buffer != NULL ) {
3.27 texcache_release_render_buffer(texcache_active_list[i].buffer);
3.28 texcache_active_list[i].buffer = NULL;
3.29 @@ -232,6 +237,33 @@
3.30 }
3.31 }
3.32 }
3.33 +/**
3.34 + * Mark all stride textures as needing a re-read (ie when the stride width
3.35 + * is changed).
3.36 + */
3.37 +void texcache_invalidate_stride( )
3.38 +{
3.39 + int i;
3.40 + for( i=0; i<MAX_TEXTURES; i++ ) {
3.41 + if( texcache_active_list[i].texture_addr != -1 &&
3.42 + PVR2_TEX_IS_STRIDE(texcache_active_list[i].mode) ) {
3.43 + texcache_evict( i );
3.44 + texcache_free_ptr--;
3.45 + texcache_free_list[texcache_free_ptr] = i;
3.46 + }
3.47 + }
3.48 +}
3.49 +
3.50 +void texcache_set_config( uint32_t palette_mode, uint32_t stride )
3.51 +{
3.52 + if( palette_mode != texcache_palette_mode )
3.53 + texcache_invalidate_palette();
3.54 + if( stride != texcache_stride_width )
3.55 + texcache_invalidate_stride();
3.56 +
3.57 + texcache_palette_mode = palette_mode;
3.58 + texcache_stride_width = stride;
3.59 +}
3.60
3.61 static void decode_pal8_to_32( uint32_t *out, uint8_t *in, int inbytes, uint32_t *pal )
3.62 {
3.63 @@ -374,7 +406,7 @@
3.64 /* For indexed-colour modes, we need to lookup the palette control
3.65 * word to determine the de-indexed texture format.
3.66 */
3.67 - switch( MMIO_READ( PVR2, RENDER_PALETTE ) & 0x03 ) {
3.68 + switch( texcache_palette_mode ) {
3.69 case 0: /* ARGB1555 */
3.70 format = GL_BGRA;
3.71 type = GL_UNSIGNED_SHORT_1_5_5_5_REV;
3.72 @@ -428,14 +460,13 @@
3.73 if( PVR2_TEX_IS_STRIDE(mode) && tex_format != PVR2_TEX_FORMAT_IDX4 &&
3.74 tex_format != PVR2_TEX_FORMAT_IDX8 ) {
3.75 /* Stride textures cannot be mip-mapped, compressed, indexed or twiddled */
3.76 - uint32_t stride = (MMIO_READ( PVR2, RENDER_TEXSIZE ) & 0x003F) << 5;
3.77 unsigned char data[(width*height) << bpp_shift];
3.78 if( tex_format == PVR2_TEX_FORMAT_YUV422 ) {
3.79 unsigned char tmp[(width*height)<<1];
3.80 - pvr2_vram64_read_stride( tmp, width<<1, texture_addr, stride<<1, height );
3.81 + pvr2_vram64_read_stride( tmp, width<<1, texture_addr, texcache_stride_width<<1, height );
3.82 yuv_decode( (uint32_t *)data, (uint32_t *)tmp, width, height );
3.83 } else {
3.84 - pvr2_vram64_read_stride( data, width<<bpp_shift, texture_addr, stride<<bpp_shift, height );
3.85 + pvr2_vram64_read_stride( data, width<<bpp_shift, texture_addr, texcache_stride_width<<bpp_shift, height );
3.86 }
3.87 glTexImage2D( GL_TEXTURE_2D, 0, intFormat, width, height, 0, format, type, data );
3.88 glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, filter);
3.89 @@ -581,6 +612,7 @@
3.90 }
3.91
3.92 /* Construct new entry */
3.93 + assert( texcache_active_list[slot].texture_addr == -1 );
3.94 texcache_active_list[slot].texture_addr = texture_addr;
3.95 texcache_active_list[slot].width = width;
3.96 texcache_active_list[slot].height = height;
3.97 @@ -599,7 +631,6 @@
3.98 assert( next != slot );
3.99
3.100 }
3.101 - assert( next != slot );
3.102 texcache_active_list[slot].next = next;
3.103 texcache_page_lookup[texture_page] = slot;
3.104 return slot;
.