1.1 --- a/src/sh4/sh4core.c	Mon Jan 22 21:26:39 2007 +0000
     1.2 +++ b/src/sh4/sh4core.c	Tue Jan 23 08:17:06 2007 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: sh4core.c,v 1.39 2007-01-17 21:27:20 nkeynes Exp $
     1.6 + * $Id: sh4core.c,v 1.40 2007-01-23 08:17:06 nkeynes Exp $
     1.7   * 
     1.8   * SH4 emulation core, and parent module for all the SH4 peripheral
     1.9   * modules.
    1.10 @@ -69,7 +69,7 @@
    1.11  void sh4_init(void)
    1.12  {
    1.13      register_io_regions( mmio_list_sh4mmio );
    1.14 -    mmu_init();
    1.15 +    MMU_init();
    1.16      sh4_reset();
    1.17  }
    1.18  
    1.19 @@ -93,6 +93,7 @@
    1.20      /* Peripheral modules */
    1.21      CPG_reset();
    1.22      INTC_reset();
    1.23 +    MMU_reset();
    1.24      TMU_reset();
    1.25      SCIF_reset();
    1.26  }
    1.27 @@ -216,6 +217,7 @@
    1.28  void sh4_save_state( FILE *f )
    1.29  {
    1.30      fwrite( &sh4r, sizeof(sh4r), 1, f );
    1.31 +    MMU_save_state( f );
    1.32      INTC_save_state( f );
    1.33      TMU_save_state( f );
    1.34      SCIF_save_state( f );
    1.35 @@ -224,6 +226,7 @@
    1.36  int sh4_load_state( FILE * f )
    1.37  {
    1.38      fread( &sh4r, sizeof(sh4r), 1, f );
    1.39 +    MMU_load_state( f );
    1.40      INTC_load_state( f );
    1.41      TMU_load_state( f );
    1.42      return SCIF_load_state( f );

     2.1 --- a/src/sh4/sh4core.h	Mon Jan 22 21:26:39 2007 +0000
     2.2 +++ b/src/sh4/sh4core.h	Tue Jan 23 08:17:06 2007 +0000
     2.3 @@ -1,5 +1,5 @@
     2.4  /**
     2.5 - * $Id: sh4core.h,v 1.17 2007-01-17 21:27:20 nkeynes Exp $
     2.6 + * $Id: sh4core.h,v 1.18 2007-01-23 08:17:06 nkeynes Exp $
     2.7   * 
     2.8   * This file defines the internal functions exported/used by the SH4 core, 
     2.9   * except for disassembly functions defined in sh4dasm.h
    2.10 @@ -128,6 +128,10 @@
    2.11  void INTC_reset( void );
    2.12  void INTC_save_state( FILE *f );
    2.13  int INTC_load_state( FILE *f );
    2.14 +void MMU_init( void );
    2.15 +void MMU_reset( void );
    2.16 +void MMU_save_state( FILE *f );
    2.17 +int MMU_load_state( FILE *f );
    2.18  
    2.19  #define SIGNEXT4(n) ((((int32_t)(n))<<28)>>28)
    2.20  #define SIGNEXT8(n) ((int32_t)((int8_t)(n)))

     3.1 --- a/src/sh4/sh4mmio.c	Mon Jan 22 21:26:39 2007 +0000
     3.2 +++ b/src/sh4/sh4mmio.c	Tue Jan 23 08:17:06 2007 +0000
     3.3 @@ -1,5 +1,5 @@
     3.4  /**
     3.5 - * $Id: sh4mmio.c,v 1.9 2006-06-18 12:01:53 nkeynes Exp $
     3.6 + * $Id: sh4mmio.c,v 1.10 2007-01-23 08:17:06 nkeynes Exp $
     3.7   * 
     3.8   * Miscellaneous and not-really-implemented SH4 peripheral modules. Also
     3.9   * responsible for including the IMPL side of the SH4 MMIO pages.
    3.10 @@ -49,11 +49,33 @@
    3.11  }
    3.12  
    3.13  
    3.14 -void mmu_init() 
    3.15 +void MMU_init() 
    3.16  {
    3.17      cache = mem_alloc_pages(2);
    3.18  }
    3.19  
    3.20 +void MMU_reset()
    3.21 +{
    3.22 +    mmio_region_MMU_write( CCR, 0 );
    3.23 +}
    3.24 +
    3.25 +void MMU_save_state( FILE *f )
    3.26 +{
    3.27 +    fwrite( cache, 4096, 2, f );
    3.28 +}
    3.29 +
    3.30 +int MMU_load_state( FILE *f )
    3.31 +{
    3.32 +    /* Setup the cache mode according to the saved register value
    3.33 +     * (mem_load runs before this point to load all MMIO data)
    3.34 +     */
    3.35 +    mmio_region_MMU_write( CCR, MMIO_READ(MMU, CCR) );
    3.36 +    if( fread( cache, 4096, 2, f ) != 2 ) {
    3.37 +	return 1;
    3.38 +    }
    3.39 +    return 0;
    3.40 +}
    3.41 +
    3.42  void mmu_set_cache_mode( int mode )
    3.43  {
    3.44      uint32_t i;