1.1 --- a/test/Makefile	Tue Feb 13 08:28:50 2007 +0000
     1.2 +++ b/test/Makefile	Tue Feb 13 08:34:27 2007 +0000
     1.3 @@ -74,6 +74,7 @@
     1.4  testsh4: crt0.so sh4/testsh4.so timer.so interrupt.so \
     1.5  	 sh4/add.so sh4/addc.so sh4/addv.so sh4/and.so sh4/andi.so \
     1.6  	 sh4/bf.so sh4/bt.so sh4/cmp.so \
     1.7 +	 sh4/float.so sh4/ftrc.so \
     1.8  	 sh4/excslot.so sh4/undef.so
     1.9  	$(SH4CC) $(SH4LDFLAGS) $^ -o $@ $(SH4LIBS)
    1.10  	$(SH4OBJCOPY) testsh4 testsh4.bin

     2.1 --- a/test/sh4/excslot.s	Tue Feb 13 08:28:50 2007 +0000
     2.2 +++ b/test/sh4/excslot.s	Tue Feb 13 08:34:27 2007 +0000
     2.3 @@ -174,15 +174,15 @@
     2.4  ! in a delay slot (otherwise it's GENERAL_ILLEGAL)
     2.5  
     2.6  test_slot_18:   ! LDC Rn, SPC in user mode
     2.7 -	add #1, r12
     2.8 -	expect_exc 0x000001A0
     2.9 -	stc spc, r4
    2.10 -	usermode
    2.11 -test_slot_18_pc:
    2.12 -	bsr test_slot_fail
    2.13 -	ldc r4, spc
    2.14 -	systemmode
    2.15 -	assert_exc_caught test_slot_str_k test_slot_18_pc
    2.16 +!	add #1, r12
    2.17 +!	expect_exc 0x000001A0
    2.18 +!	stc spc, r4
    2.19 +!	usermode
    2.20 +!test_slot_18_pc:
    2.21 +!	bsr test_slot_fail
    2.22 +!	ldc r4, spc
    2.23 +!	systemmode
    2.24 +!	assert_exc_caught test_slot_str_k test_slot_18_pc
    2.25  	
    2.26  		
    2.27  test_slot_end:

     3.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     3.2 +++ b/test/sh4/float.s	Tue Feb 13 08:34:27 2007 +0000
     3.3 @@ -0,0 +1,209 @@
     3.4 +.section .text
     3.5 +.include "sh4/inc.s"
     3.6 +!
     3.7 +! Test float
     3.8 +
     3.9 +.global _test_float
    3.10 +_test_float:	
    3.11 +	start_test
    3.12 +
    3.13 +	xor r0,r0
    3.14 +	lds r0, fpscr
    3.15 +	
    3.16 +test_float_1:  ! Load 1.0 single precision
    3.17 +	add #1, r12
    3.18 +	add #1, r0
    3.19 +	fldi0 fr0
    3.20 +	fldi0 fr1
    3.21 +	lds r0, fpul
    3.22 +	float fpul, fr0
    3.23 +	sts fpul, r1
    3.24 +	cmp/eq r0, r1
    3.25 +	bf test_float_1_fail
    3.26 +	flds fr0, fpul
    3.27 +	sts fpul, r0
    3.28 +	mov.l test_float_1_result, r1
    3.29 +	cmp/eq r0,r1
    3.30 +	bf test_float_1_fail
    3.31 +	flds fr1, fpul
    3.32 +	sts fpul, r0
    3.33 +	tst r0, r0
    3.34 +	bt test_float_2
    3.35 +test_float_1_fail:	
    3.36 +	fail test_float_str_k
    3.37 +	bra test_float_2
    3.38 +	nop
    3.39 +
    3.40 +.align 4
    3.41 +test_float_1_result:
    3.42 +	.long 0x3F800000
    3.43 +
    3.44 +test_float_2:	! Load -1.0 double precision
    3.45 +	add #1, r12
    3.46 +	fldi0 fr0
    3.47 +	fldi1 fr1
    3.48 +	setpr
    3.49 +	xor r0,r0
    3.50 +	add #-1, r0
    3.51 +	lds r0, fpul
    3.52 +	float fpul, fr0
    3.53 +	sts fpul, r1
    3.54 +	cmp/eq r0, r1
    3.55 +	bf test_float_2_fail
    3.56 +	flds fr0, fpul
    3.57 +	sts fpul, r0
    3.58 +	flds fr1, fpul
    3.59 +	sts fpul, r2
    3.60 +	mov.l test_float_2_result_a, r1
    3.61 +	mov.l test_float_2_result_b, r3
    3.62 +	cmp/eq r0,r1
    3.63 +	bf test_float_2_fail
    3.64 +	cmp/eq r2,r3
    3.65 +	bt test_float_3
    3.66 +test_float_2_fail:	
    3.67 +	fail test_float_str_k
    3.68 +	bra test_float_3
    3.69 +	nop
    3.70 +
    3.71 +test_float_2_result_a:
    3.72 +	.long 0xBFF00000
    3.73 +test_float_2_result_b:
    3.74 +	.long 0x00000000
    3.75 +
    3.76 +test_float_3:   ! pr=0, sz=1
    3.77 +	add #1, r12
    3.78 +	clrpr
    3.79 +	fldi0 fr0
    3.80 +	fldi0 fr1
    3.81 +	fschg
    3.82 +	mov.l test_float_3_input, r0
    3.83 +	lds r0, fpul
    3.84 +	float fpul, fr0
    3.85 +	sts fpul, r1
    3.86 +	cmp/eq r0, r1
    3.87 +	bf test_float_3_fail
    3.88 +	flds fr0, fpul
    3.89 +	sts fpul, r0
    3.90 +	mov.l test_float_3_result, r1
    3.91 +	cmp/eq r0, r1
    3.92 +	bf test_float_3_fail
    3.93 +	flds fr1, fpul
    3.94 +	sts fpul, r0
    3.95 +	tst r0, r0
    3.96 +	bt test_float_4
    3.97 +test_float_3_fail:	
    3.98 +	fail test_float_str_k
    3.99 +	bra test_float_4
   3.100 +	nop
   3.101 +	
   3.102 +test_float_3_input:
   3.103 +	.long 0xCCCCCCCC
   3.104 +test_float_3_result:
   3.105 +	.long 0xCE4CCCCD
   3.106 +
   3.107 +test_float_4:	! pr=1, sz=1
   3.108 +	add #1, r12
   3.109 +	fldi0 fr0
   3.110 +	fldi1 fr1
   3.111 +	setpr
   3.112 +	mov.l test_float_4_input, r0
   3.113 +	lds r0, fpul
   3.114 +	float fpul, fr0
   3.115 +	sts fpul, r1
   3.116 +	cmp/eq r0, r1
   3.117 +	bf test_float_4_fail
   3.118 +	flds fr0, fpul
   3.119 +	sts fpul, r0
   3.120 +	flds fr1, fpul
   3.121 +	sts fpul, r2
   3.122 +	mov.l test_float_4_result_a, r1
   3.123 +	mov.l test_float_4_result_b, r3
   3.124 +	cmp/eq r0,r1
   3.125 +	bf test_float_4_fail
   3.126 +	cmp/eq r2,r3
   3.127 +	bt test_float_5
   3.128 +test_float_4_fail:	
   3.129 +	fail test_float_str_k
   3.130 +	bra test_float_5
   3.131 +	nop
   3.132 +
   3.133 +test_float_4_input:
   3.134 +	.long 0x7FFFFFFF
   3.135 +test_float_4_result_a:
   3.136 +	.long 0x41DFFFFF
   3.137 +test_float_4_result_b:
   3.138 +	.long 0xFFC00000
   3.139 +
   3.140 +
   3.141 +test_float_5:	! test w/ max +int, sz=0, pr=0, fr=1
   3.142 +	add #1, r12
   3.143 +	xor r0,r0
   3.144 +	lds r0, fpscr
   3.145 +	fldi0 fr0
   3.146 +	fldi0 fr1
   3.147 +	frchg
   3.148 +	fldi0 fr0
   3.149 +	fldi0 fr1
   3.150 +	mov.l test_float_5_input, r0
   3.151 +	lds r0, fpul
   3.152 +	float fpul, fr0
   3.153 +	sts fpul, r1
   3.154 +	cmp/eq r0, r1
   3.155 +	bf test_float_5_fail
   3.156 +	flds fr0, fpul
   3.157 +	sts fpul, r0
   3.158 +	mov.l test_float_5_result, r1
   3.159 +	cmp/eq r0, r1
   3.160 +	bf test_float_5_fail
   3.161 +	flds fr1, fpul
   3.162 +	sts fpul, r0
   3.163 +	tst r0, r0
   3.164 +	bf test_float_5_fail
   3.165 +	lds r0, fpscr
   3.166 +	flds fr0, fpul
   3.167 +	sts fpul, r0
   3.168 +	tst r0, r0
   3.169 +	bt test_float_6
   3.170 +test_float_5_fail:
   3.171 +	fail test_float_str_k
   3.172 +	bra test_float_6
   3.173 +	nop
   3.174 +	
   3.175 +test_float_5_input:
   3.176 +	.long 0x7FFFFFFF
   3.177 +test_float_5_result:
   3.178 +	.long 0x4F000000
   3.179 +
   3.180 +test_float_6: ! Test max -int
   3.181 +	add #1, r12
   3.182 +	mov.l test_float_6_input, r0
   3.183 +	lds r0, fpul
   3.184 +	float fpul, fr5
   3.185 +	sts fpul, r1
   3.186 +	cmp/eq r0, r1
   3.187 +	bf test_float_6_fail
   3.188 +	flds fr5, fpul
   3.189 +	sts fpul, r2
   3.190 +	mov.l test_float_6_result, r1
   3.191 +	cmp/eq r1, r2
   3.192 +	bt test_float_end
   3.193 +
   3.194 +test_float_6_fail:
   3.195 +	fail test_float_str_k
   3.196 +	bra test_float_end
   3.197 +	nop
   3.198 +	
   3.199 +test_float_6_input:
   3.200 +	.long 0x80000000
   3.201 +test_float_6_result:
   3.202 +	.long 0xCF000000
   3.203 +	
   3.204 +test_float_end:
   3.205 +	end_test test_float_str_k
   3.206 +	
   3.207 +test_float_str:
   3.208 +	.string "FLOAT"
   3.209 +	
   3.210 +.align 4
   3.211 +test_float_str_k:
   3.212 +	.long test_float_str
   3.213 \ No newline at end of file

     4.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     4.2 +++ b/test/sh4/ftrc.s	Tue Feb 13 08:34:27 2007 +0000
     4.3 @@ -0,0 +1,217 @@
     4.4 +	.section .text
     4.5 +.include "sh4/inc.s"
     4.6 +!
     4.7 +! Test ftrc
     4.8 +
     4.9 +.global _test_ftrc
    4.10 +_test_ftrc:	
    4.11 +	start_test
    4.12 +
    4.13 +	xor r0,r0
    4.14 +	lds r0, fpscr
    4.15 +	
    4.16 +test_ftrc_1:  ! Load 1.0 single precision
    4.17 +	add #1, r12
    4.18 +	mov.l test_ftrc_1_input, r0
    4.19 +	lds r0, fpul
    4.20 +	fsts fpul, fr0
    4.21 +	ftrc fr0, fpul
    4.22 +	sts fpul, r0
    4.23 +	mov.l test_ftrc_1_result, r1
    4.24 +	cmp/eq r0,r1
    4.25 +	bt test_ftrc_2
    4.26 +test_ftrc_1_fail:	
    4.27 +	fail test_ftrc_str_k
    4.28 +	bra test_ftrc_2
    4.29 +	nop
    4.30 +
    4.31 +.align 4
    4.32 +test_ftrc_1_input:
    4.33 +	.long 0x3F800000
    4.34 +test_ftrc_1_result:
    4.35 +	.long 0x00000001
    4.36 +
    4.37 +test_ftrc_2:	! Load -1.0 double precision
    4.38 +	add #1, r12
    4.39 +	setpr
    4.40 +	mov.l test_ftrc_2_input_a, r0
    4.41 +	lds r0, fpul
    4.42 +	fsts fpul, fr0
    4.43 +	mov.l test_ftrc_2_input_b, r0
    4.44 +	lds r0, fpul
    4.45 +	fsts fpul, fr1
    4.46 +	ftrc fr0, fpul
    4.47 +	sts fpul, r0
    4.48 +	mov.l test_ftrc_2_result, r1
    4.49 +	cmp/eq r0,r1
    4.50 +	bt test_ftrc_3
    4.51 +test_ftrc_2_fail:	
    4.52 +	fail test_ftrc_str_k
    4.53 +	bra test_ftrc_3
    4.54 +	nop
    4.55 +
    4.56 +test_ftrc_2_input_a:
    4.57 +	.long 0xBFF00000
    4.58 +test_ftrc_2_input_b:
    4.59 +	.long 0x00000000
    4.60 +test_ftrc_2_result:
    4.61 +	.long 0xFFFFFFFF
    4.62 +
    4.63 +test_ftrc_3:   ! pr=0, sz=1
    4.64 +	add #1, r12
    4.65 +	clrpr
    4.66 +	mov.l test_ftrc_3_input, r0
    4.67 +	lds r0, fpul
    4.68 +	fsts fpul, fr0
    4.69 +	fschg
    4.70 +	ftrc fr0, fpul
    4.71 +	sts fpul, r0
    4.72 +	mov.l test_ftrc_3_result, r1
    4.73 +	cmp/eq r0, r1
    4.74 +	bt test_ftrc_4
    4.75 +test_ftrc_3_fail:	
    4.76 +	fail test_ftrc_str_k
    4.77 +	bra test_ftrc_4
    4.78 +	nop
    4.79 +	
    4.80 +test_ftrc_3_input:
    4.81 +	.long 0xCE4CCCCD
    4.82 +test_ftrc_3_result:
    4.83 +	.long 0xCCCCCCC0
    4.84 +
    4.85 +test_ftrc_4:	! pr=1, sz=1
    4.86 +	add #1, r12
    4.87 +	fldi0 fr0
    4.88 +	fldi1 fr1
    4.89 +	setpr
    4.90 +	mov.l test_ftrc_4_input_a, r0
    4.91 +	lds r0, fpul
    4.92 +	fsts fpul, fr0
    4.93 +	mov.l test_ftrc_4_input_b, r0
    4.94 +	lds r0, fpul
    4.95 +	fsts fpul, fr1
    4.96 +	ftrc fr0, fpul
    4.97 +	sts fpul, r0
    4.98 +	mov.l test_ftrc_4_result, r1
    4.99 +	cmp/eq r0,r1
   4.100 +	bt test_ftrc_5
   4.101 +test_ftrc_4_fail:	
   4.102 +	fail test_ftrc_str_k
   4.103 +	bra test_ftrc_5
   4.104 +	nop
   4.105 +
   4.106 +test_ftrc_4_input_a:
   4.107 +	.long 0x41DFFFFF
   4.108 +test_ftrc_4_input_b:
   4.109 +	.long 0xFFC00000
   4.110 +test_ftrc_4_result:
   4.111 +	.long 0x7FFFFFFF
   4.112 +
   4.113 +
   4.114 +test_ftrc_5:	! test w/ max +int, sz=0, pr=0, fr=1
   4.115 +	add #1, r12
   4.116 +	xor r0,r0
   4.117 +	lds r0, fpscr
   4.118 +	fldi0 fr0
   4.119 +	fldi0 fr1
   4.120 +	frchg
   4.121 +	fldi0 fr0
   4.122 +	fldi0 fr1
   4.123 +	mov.l test_ftrc_5_input, r0
   4.124 +	lds r0, fpul
   4.125 +	fsts fpul, fr0
   4.126 +	ftrc fr0, fpul
   4.127 +	sts fpul, r0
   4.128 +	mov.l test_ftrc_5_result, r1
   4.129 +	cmp/eq r0, r1
   4.130 +	bf test_ftrc_5_fail
   4.131 +	flds fr1, fpul
   4.132 +	sts fpul, r0
   4.133 +	tst r0, r0
   4.134 +	bf test_ftrc_5_fail
   4.135 +	lds r0, fpscr
   4.136 +	flds fr0, fpul
   4.137 +	sts fpul, r0
   4.138 +	tst r0, r0
   4.139 +	bt test_ftrc_6
   4.140 +test_ftrc_5_fail:
   4.141 +	fail test_ftrc_str_k
   4.142 +	bra test_ftrc_6
   4.143 +	nop
   4.144 +	
   4.145 +test_ftrc_5_input:
   4.146 +	.long 0x4F000000
   4.147 +test_ftrc_5_result:
   4.148 +	.long 0x7FFFFFFF
   4.149 +
   4.150 +test_ftrc_6: ! Test max -int
   4.151 +	add #1, r12
   4.152 +	mov.l test_ftrc_6_input, r0
   4.153 +	lds r0, fpul
   4.154 +	fsts fpul, fr5
   4.155 +	ftrc fr5, fpul
   4.156 +	sts fpul, r2
   4.157 +	mov.l test_ftrc_6_result, r1
   4.158 +	cmp/eq r1, r2
   4.159 +	bt test_ftrc_7
   4.160 +
   4.161 +test_ftrc_6_fail:
   4.162 +	fail test_ftrc_str_k
   4.163 +	bra test_ftrc_7
   4.164 +	nop
   4.165 +	
   4.166 +test_ftrc_6_input:
   4.167 +	.long 0xCF000000
   4.168 +test_ftrc_6_result:
   4.169 +	.long 0x80000000
   4.170 +
   4.171 +test_ftrc_7:	! Test >max +int
   4.172 +	add #1, r12
   4.173 +	mov.l test_ftrc_7_input, r0
   4.174 +	lds r0, fpul
   4.175 +	fsts fpul, fr7
   4.176 +	ftrc fr7, fpul
   4.177 +	sts fpul, r2
   4.178 +	mov.l test_ftrc_7_result, r1
   4.179 +	cmp/eq r1, r2
   4.180 +	bt test_ftrc_8
   4.181 +test_ftrc_7_fail:
   4.182 +	fail test_ftrc_str_k
   4.183 +	bra test_ftrc_7
   4.184 +	nop
   4.185 +	
   4.186 +test_ftrc_7_input:
   4.187 +	.long 0x7E111111
   4.188 +test_ftrc_7_result:
   4.189 +	.long 0x7FFFFFFF
   4.190 +
   4.191 +test_ftrc_8: ! test < min -int
   4.192 +	add #1, r12
   4.193 +	mov.l test_ftrc_8_input, r0
   4.194 +	lds r0, fpul
   4.195 +	fsts fpul, fr9
   4.196 +	ftrc fr9, fpul
   4.197 +	sts fpul, r2
   4.198 +	mov.l test_ftrc_8_result, r1
   4.199 +	cmp/eq r1, r2
   4.200 +	bt test_ftrc_end
   4.201 +test_ftrc_8_fail:
   4.202 +	fail test_ftrc_str_k
   4.203 +	bra test_ftrc_8
   4.204 +	nop
   4.205 +	
   4.206 +test_ftrc_8_input:
   4.207 +	.long 0xFE111111
   4.208 +test_ftrc_8_result:
   4.209 +	.long 0x80000000
   4.210 +
   4.211 +	
   4.212 +test_ftrc_end:
   4.213 +	end_test test_ftrc_str_k
   4.214 +	
   4.215 +test_ftrc_str:
   4.216 +	.string "FTRC"
   4.217 +	
   4.218 +.align 4
   4.219 +test_ftrc_str_k:
   4.220 +	.long test_ftrc_str

     5.1 --- a/test/sh4/inc.s	Tue Feb 13 08:28:50 2007 +0000
     5.2 +++ b/test/sh4/inc.s	Tue Feb 13 08:34:27 2007 +0000
     5.3 @@ -189,6 +189,25 @@
     5.4  L2:	
     5.5  .endm
     5.6  
     5.7 +.macro setpr
     5.8 +	sts fpscr, r0
     5.9 +	xor r1, r1
    5.10 +	add #8, r1
    5.11 +	shll16 r1
    5.12 +	or r1, r0
    5.13 +	lds r0, fpscr
    5.14 +.endm
    5.15 +
    5.16 +.macro clrpr
    5.17 +	sts fpscr, r0
    5.18 +	xor r1, r1
    5.19 +	add #8, r1
    5.20 +	shll16 r1
    5.21 +	not r1, r1
    5.22 +	and r1, r0
    5.23 +	lds r0, fpscr
    5.24 +.endm
    5.25 +	
    5.26  .macro expect_exc code
    5.27  LOCAL L1, L2, L3
    5.28  	mov.l L1, r3

     6.1 --- a/test/sh4/testsh4.c	Tue Feb 13 08:28:50 2007 +0000
     6.2 +++ b/test/sh4/testsh4.c	Tue Feb 13 08:34:27 2007 +0000
     6.3 @@ -54,6 +54,8 @@
     6.4      test_bf(); 
     6.5      test_bt();
     6.6      test_cmp();
     6.7 +    test_float();
     6.8 +    test_ftrc();
     6.9      fprintf( stdout, "--> %d/%d instruction tests passed (%d%%)\n\n",
    6.10  	     total_tests-total_fails, total_tests, 
    6.11  	     ((total_tests-total_fails)*100)/total_tests );