1.1 --- a/src/asic.c	Fri Feb 24 21:17:47 2012 +1000
     1.2 +++ b/src/asic.c	Sat Feb 25 09:56:10 2012 +1000
     1.3 @@ -21,6 +21,7 @@
     1.4  
     1.5  #include <assert.h>
     1.6  #include <stdlib.h>
     1.7 +#include "eventq.h"
     1.8  #include "dream.h"
     1.9  #include "mem.h"
    1.10  #include "sh4/intc.h"
    1.11 @@ -416,6 +417,22 @@
    1.12      MMIO_WRITE( ASIC, SORTDMACTL, 0 );
    1.13  }
    1.14  
    1.15 +void maple_set_dma_state( uint32_t val )
    1.16 +{
    1.17 +    gboolean in_transfer = MMIO_READ( ASIC, MAPLE_STATE ) & 1;
    1.18 +    gboolean transfer_requested = val & 1;
    1.19 +    if( !in_transfer && transfer_requested ) {
    1.20 +        /* Initiate new DMA transfer */
    1.21 +        uint32_t maple_addr = MMIO_READ( ASIC, MAPLE_DMA) &0x1FFFFFE0;
    1.22 +        maple_handle_buffer( maple_addr );
    1.23 +    }
    1.24 +    else if ( in_transfer && !transfer_requested ) {
    1.25 +        /* Cancel current DMA transfer */
    1.26 +        event_cancel( EVENT_MAPLE_DMA );
    1.27 +    }
    1.28 +    MMIO_WRITE( ASIC, MAPLE_STATE, val );
    1.29 +}
    1.30 +
    1.31  gboolean asic_enable_ide_interface( gboolean enable )
    1.32  {
    1.33      gboolean oldval = idereg.interface_enabled;
    1.34 @@ -494,12 +511,7 @@
    1.35          }
    1.36          break;
    1.37      case MAPLE_STATE:
    1.38 -        MMIO_WRITE( ASIC, reg, val );
    1.39 -        if( val & 1 ) {
    1.40 -            uint32_t maple_addr = MMIO_READ( ASIC, MAPLE_DMA) &0x1FFFFFE0;
    1.41 -            maple_handle_buffer( maple_addr );
    1.42 -            MMIO_WRITE( ASIC, reg, 0 );
    1.43 -        }
    1.44 +        maple_set_dma_state( val );
    1.45          break;
    1.46      case PVRDMADEST:
    1.47          MMIO_WRITE( ASIC, reg, (val & 0x03FFFFE0) | 0x10000000 );

     2.1 --- a/src/maple/maple.c	Fri Feb 24 21:17:47 2012 +1000
     2.2 +++ b/src/maple/maple.c	Sat Feb 25 09:56:10 2012 +1000
     2.3 @@ -19,6 +19,7 @@
     2.4  
     2.5  #include <assert.h>
     2.6  #include <glib/gstrfuncs.h>
     2.7 +#include "eventq.h"
     2.8  #include "dream.h"
     2.9  #include "mem.h"
    2.10  #include "asic.h"
    2.11 @@ -32,9 +33,18 @@
    2.12  struct maple_device_class *maple_device_classes[] = { 
    2.13          &controller_class, &keyboard_class, &lightgun_class, &mouse_class, &vmu_class, NULL };
    2.14  
    2.15 +/**
    2.16 + * Fire interrupt to notify the completion of DMA transfer
    2.17 + */
    2.18 +static void maple_event_handler( int eventid )
    2.19 +{
    2.20 +    MMIO_WRITE( ASIC, MAPLE_STATE, 0 );
    2.21 +    asic_event( EVENT_MAPLE_DMA );
    2.22 +}
    2.23 +
    2.24  void maple_init( void )
    2.25  {
    2.26 -
    2.27 +    register_event_callback( EVENT_MAPLE_DMA, maple_event_handler );
    2.28  }
    2.29  
    2.30  maple_device_t maple_new_device( const gchar *name )
    2.31 @@ -130,7 +140,11 @@
    2.32                      dev->start_gun(dev);
    2.33                      return; // Pending
    2.34                  } else {
    2.35 -                    asic_event( EVENT_MAPLE_DMA );
    2.36 +                    /* FIXME: Determine how long maple IO really takes to process, 
    2.37 +                     * which is probably a function of the number of requests.
    2.38 +                     * For now, just use 0.2ms as a reasonable value.
    2.39 +                     */
    2.40 +                    event_schedule( EVENT_MAPLE_DMA, 200000 );
    2.41                      return;
    2.42                  }
    2.43              case 7: /* skip */
    2.44 @@ -299,7 +313,7 @@
    2.45              buf += 12 + (length<<2);
    2.46              address += 12 + (length<<2);
    2.47          }
    2.48 -        asic_event( EVENT_MAPLE_DMA );
    2.49 +        event_schedule( EVENT_MAPLE_DMA, 200000 );
    2.50      }
    2.51  }
    2.52