revision 196:3d3c761afbf4
summary |
tree |
shortlog |
changelog |
graph |
changeset |
raw | bz2 | zip | gz changeset | 196:3d3c761afbf4 |
parent | 195:1c43bdb83748 |
child | 197:f65ff8c8320d |
author | nkeynes |
date | Sun Aug 06 02:46:09 2006 +0000 (17 years ago) |
Update the register list to scan the entire 5F8000-5F8200 range (ie all
PVR registers) for writeability
PVR registers) for writeability
test/testregs.c | view | annotate | diff | log |
1.1 --- a/test/testregs.c Sat Aug 05 00:18:21 2006 +00001.2 +++ b/test/testregs.c Sun Aug 06 02:46:09 2006 +00001.3 @@ -1,5 +1,5 @@1.4 /**1.5 - * $Id: testregs.c,v 1.1 2006-08-02 04:13:15 nkeynes Exp $1.6 + * $Id: testregs.c,v 1.2 2006-08-06 02:46:09 nkeynes Exp $1.7 *1.8 * Register mask tests. These are simple "write value to register and check1.9 * that we read back what we expect" tests.1.10 @@ -36,6 +36,8 @@1.11 struct test test_cases[] = {1.12 { 0xA05F8000, 0xFFFFFFFF, 0x17FD11DB }, /* PVRID read-only */1.13 { 0xA05F8004, 0xFFFFFFFF, 0x00000011 }, /* PVRVER read-only */1.14 + { 0xA05F8008, 0xFFFFFFFF, 0x00000007 }, /* Reset */1.15 + { 0xA05F8010, 0xFFFFFFFF, 0 },1.16 // { 0xA05F8014, 0xFFFFFFFF, 0x00000000 }, /* Render start */1.17 { 0xA05F8018, 0xFFFFFFFF, 0x000007FF }, /* ??? */1.18 { 0xA05F801C, 0xFFFFFFFF, 0x00000000 }, /* ??? */1.19 @@ -44,6 +46,9 @@1.20 { 0xA05F8028, 0xFFFFFFFF, 0x00000000 }, /* ??? */1.21 { 0xA05F802C, 0xFFFFFFFF, 0x00FFFFFC }, /* Render Tile buffer address */1.22 { 0xA05F8030, 0xFFFFFFFF, 0x00010101 }, /* Render TSP cache? */1.23 + { 0xA05F8034, 0xFFFFFFFF, 0 },1.24 + { 0xA05F8038, 0xFFFFFFFF, 0 },1.25 + { 0xA05F803C, 0xFFFFFFFF, 0 },1.26 { 0xA05F8040, 0xFFFFFFFF, 0x01FFFFFF }, /* Display border colour */1.27 { 0xA05F8044, 0xFFFFFFFF, 0x00FFFF7F }, /* Display config */1.28 { 0xA05F8048, 0xFFFFFFFF, 0x00FFFF0F }, /* Render config */1.29 @@ -56,14 +61,51 @@1.30 { 0xA05F8064, 0xFFFFFFFF, 0x01FFFFFC }, /* Render address 2 */1.31 { 0xA05F8068, 0xFFFFFFFF, 0x07FF07FF }, /* Render horizontal clip */1.32 { 0xA05F806C, 0xFFFFFFFF, 0x03FF03FF }, /* Render vertical clip */1.33 + { 0xA05F8070, 0xFFFFFFFF, 0 },1.34 { 0xA05F8074, 0xFFFFFFFF, 0x000001FF }, /* Render shadow mode */1.35 + { 0xA05F8078, 0xFFFFFFFF, 0x7FFFFFFF }, /* Near z clip */1.36 { 0xA05F807C, 0xFFFFFFFF, 0x003FFFFF }, /* Render object config */1.37 + { 0xA05F8080, 0xFFFFFFFF, 0x00000007 }, /* ??? */1.38 { 0xA05F8084, 0xFFFFFFFF, 0x7FFFFFFF }, /* Render tsp clip */1.39 + { 0xA05F8088, 0xFFFFFFFF, 0xFFFFFFF0 }, /* Far z clip */1.40 { 0xA05F808C, 0xFFFFFFFF, 0x1FFFFFFF }, /* Render background plane config */1.41 + { 0xA05F8090, 0xFFFFFFFF, 0 },1.42 + { 0xA05F8094, 0xFFFFFFFF, 0 },1.43 { 0xA05F8098, 0xFFFFFFFF, 0x00FFFFF9 }, /* ISP config? */1.44 + { 0xA05F809C, 0xFFFFFFFF, 0 },1.45 + { 0xA05F80A0, 0xFFFFFFFF, 0x000000FF }, /* Vram cfg1? */1.46 + { 0xA05F80A4, 0xFFFFFFFF, 0x003FFFFF },1.47 + { 0xA05F80A8, 0xFFFFFFFF, 0x1FFFFFFF },1.48 + { 0xA05F80AC, 0xFFFFFFFF, 0 },1.49 + { 0xA05F80B0, 0xFFFFFFFF, 0x00FFFFFF },1.50 + { 0xA05F80B4, 0xFFFFFFFF, 0x00FFFFFF },1.51 + { 0xA05F80B8, 0xFFFFFFFF, 0x0000FFFF },1.52 + { 0xA05F80BC, 0xFFFFFFFF, 0xFFFFFFFF },1.53 + { 0xA05F80C0, 0xFFFFFFFF, 0xFFFFFFFF },1.54 { 0xA05F80C4, 0xFFFFFFFF, UNCHANGED }, /* Gun pos */1.55 { 0xA05F80C8, 0xFFFFFFFF, 0x03FF33FF }, /* Horizontal scanline irq */1.56 { 0xA05F80CC, 0xFFFFFFFF, 0x03FF03FF }, /* Vertical scanline irq */1.57 + { 0xA05F80D0, 0xFFFFFFFF, 0x000003FF },1.58 + { 0xA05F80D4, 0xFFFFFFFF, 0x03FF03FF },1.59 + { 0xA05F80D8, 0xFFFFFFFF, 0x03FF03FF },1.60 + { 0xA05F80DC, 0xFFFFFFFF, 0x03FF03FF },1.61 + { 0xA05F80E0, 0xFFFFFFFF, 0xFFFFFF7F },1.62 + { 0xA05F80E4, 0xFFFFFFFF, 0x00031F1F },1.63 + { 0xA05F80E8, 0xFFFFFFFF, 0x003F01FF },1.64 + { 0xA05F80EC, 0xFFFFFFFF, 0x000003FF },1.65 + { 0xA05F80F0, 0xFFFFFFFF, 0x03FF03FF },1.66 + { 0xA05F80F4, 0xFFFFFFFF, 0x0007FFFF },1.67 + { 0xA05F80F8, 0xFFFFFFFF, 0 },1.68 + { 0xA05F80FC, 0xFFFFFFFF, 0 },1.69 + { 0xA05F8100, 0xFFFFFFFF, 0 },1.70 + { 0xA05F8104, 0xFFFFFFFF, 0 },1.71 + { 0xA05F8108, 0xFFFFFFFF, 0x00000003 },1.72 + { 0xA05F810C, 0xFFFFFFFF, UNCHANGED },1.73 + { 0xA05F8110, 0xFFFFFFFF, 0x000FFF3F },1.74 + { 0xA05F8114, 0xFFFFFFFF, UNCHANGED },1.75 + { 0xA05F8118, 0xFFFFFFFF, 0x0000FFFF },1.76 + { 0xA05F811C, 0xFFFFFFFF, 0x000000FF },1.77 + { 0xA05F8120, 0xFFFFFFFF, 0 },1.78 { 0xA05F8124, 0xFFFFFFFF, 0x00FFFFE0 }, /* TA Tile matrix base */1.79 { 0xA05F8128, 0xFFFFFFFF, 0x00FFFFFC }, /* TA Polygon base */1.80 { 0xA05F812C, 0xFFFFFFFF, 0x00FFFFE0 }, /* TA Tile matrix end */1.81 @@ -73,7 +115,53 @@1.82 { 0xA05F813C, 0xFFFFFFFF, 0x000F003F }, /* TA tile matrix size */1.83 { 0xA05F8140, 0xFFFFFFFF, 0x00133333 }, /* TA object config */1.84 { 0xA05F8144, 0xFFFFFFFF, 0x00000000 }, /* TA initialize */1.85 + { 0xA05F8148, 0xFFFFFFFF, 0x00FFFFF8 },1.86 + { 0xA05F814C, 0xFFFFFFFF, 0x01013F3F },1.87 + { 0xA05F8150, 0xFFFFFFFF, 0 },1.88 + { 0xA05F8154, 0xFFFFFFFF, 0 },1.89 + { 0xA05F8158, 0xFFFFFFFF, 0 },1.90 + { 0xA05F815C, 0xFFFFFFFF, 0 },1.91 + { 0xA05F8160, 0xFFFFFFFF, 0 },1.92 { 0xA05F8164, 0xFFFFFFFF, 0x00FFFFE0 }, /* TA Tile list start */1.93 + { 0xA05F8168, 0xFFFFFFFF, 0 },1.94 + { 0xA05F816C, 0xFFFFFFFF, 0 },1.95 + { 0xA05F8170, 0xFFFFFFFF, 0 },1.96 + { 0xA05F8174, 0xFFFFFFFF, 0 },1.97 + { 0xA05F8178, 0xFFFFFFFF, 0 },1.98 + { 0xA05F817C, 0xFFFFFFFF, 0 },1.99 + { 0xA05F8180, 0xFFFFFFFF, 0 },1.100 + { 0xA05F8184, 0xFFFFFFFF, 0 },1.101 + { 0xA05F8188, 0xFFFFFFFF, 0 },1.102 + { 0xA05F818C, 0xFFFFFFFF, 0 },1.103 + { 0xA05F8190, 0xFFFFFFFF, 0 },1.104 + { 0xA05F8194, 0xFFFFFFFF, 0 },1.105 + { 0xA05F8198, 0xFFFFFFFF, 0 },1.106 + { 0xA05F819C, 0xFFFFFFFF, 0 },1.107 + { 0xA05F81A0, 0xFFFFFFFF, 0 },1.108 + { 0xA05F81A4, 0xFFFFFFFF, 0 },1.109 + { 0xA05F81A8, 0xFFFFFFFF, 0x00000001 },1.110 + { 0xA05F81A8, 0x00000000, 0x00000000 },1.111 + { 0xA05F81AC, 0xFFFFFFFF, 0 },1.112 + { 0xA05F81B0, 0xFFFFFFFF, 0 },1.113 + { 0xA05F81B4, 0xFFFFFFFF, 0 },1.114 + { 0xA05F81B8, 0xFFFFFFFF, 0 },1.115 + { 0xA05F81BC, 0xFFFFFFFF, 0 },1.116 + { 0xA05F81C0, 0xFFFFFFFF, 0 },1.117 + { 0xA05F81C4, 0xFFFFFFFF, 0 },1.118 + { 0xA05F81C8, 0xFFFFFFFF, 0 },1.119 + { 0xA05F81CC, 0xFFFFFFFF, 0 },1.120 + { 0xA05F81D0, 0xFFFFFFFF, 0 },1.121 + { 0xA05F81D4, 0xFFFFFFFF, 0 },1.122 + { 0xA05F81D8, 0xFFFFFFFF, 0 },1.123 + { 0xA05F81DC, 0xFFFFFFFF, 0 },1.124 + { 0xA05F81E0, 0xFFFFFFFF, 0 },1.125 + { 0xA05F81E4, 0xFFFFFFFF, 0 },1.126 + { 0xA05F81E8, 0xFFFFFFFF, 0 },1.127 + { 0xA05F81EC, 0xFFFFFFFF, 0 },1.128 + { 0xA05F81F0, 0xFFFFFFFF, 0 },1.129 + { 0xA05F81F4, 0xFFFFFFFF, 0 },1.130 + { 0xA05F81F8, 0xFFFFFFFF, 0 },1.131 + { 0xA05F81FC, 0xFFFFFFFF, 0 },1.132 { 0, 0, 0 } };1.134 int main( int argc, char *argv[] )
.