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lxdream.org :: lxdream :: r430:467519b050f4
lxdream 0.9.1
released Jun 29
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changeset430:467519b050f4
parent429:e581b90c3fb3
child431:248dd77a9e44
authornkeynes
dateMon Oct 08 12:09:06 2007 +0000 (12 years ago)
Fix compilation warnings
src/asic.c
src/bios.c
src/gdrom/ide.c
src/gui/dump_win.c
src/mem.h
src/sh4/dmac.c
src/sh4/dmac.h
src/sh4/sh4core.c
src/sh4/sh4core.in
src/sh4/sh4dasm.c
src/sh4/sh4dasm.in
src/sh4/sh4mem.c
src/sh4/sh4trans.c
1.1 --- a/src/asic.c Mon Oct 08 11:52:13 2007 +0000
1.2 +++ b/src/asic.c Mon Oct 08 12:09:06 2007 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: asic.c,v 1.29 2007-10-06 08:59:42 nkeynes Exp $
1.6 + * $Id: asic.c,v 1.30 2007-10-08 12:06:01 nkeynes Exp $
1.7 *
1.8 * Support for the miscellaneous ASIC functions (Primarily event multiplexing,
1.9 * and DMA).
1.10 @@ -272,7 +272,7 @@
1.11 uint32_t length = MMIO_READ( EXTDMA, G2DMA0SIZ + offset ) & 0x1FFFFFFF;
1.12 uint32_t dir = MMIO_READ( EXTDMA, G2DMA0DIR + offset );
1.13 // uint32_t mode = MMIO_READ( EXTDMA, G2DMA0MOD + offset );
1.14 - char buf[length];
1.15 + unsigned char buf[length];
1.16 if( dir == 0 ) { /* SH4 to device */
1.17 mem_copy_from_sh4( buf, sh4addr, length );
1.18 mem_copy_to_sh4( extaddr, buf, length );
1.19 @@ -311,7 +311,7 @@
1.20 {
1.21 sh4addr_t destaddr = MMIO_READ( ASIC, PVRDMADEST) &0x1FFFFFE0;
1.22 uint32_t count = MMIO_READ( ASIC, PVRDMACNT );
1.23 - char *data = alloca( count );
1.24 + unsigned char *data = alloca( count );
1.25 uint32_t rcount = DMAC_get_buffer( 2, data, count );
1.26 if( rcount != count )
1.27 WARN( "PVR received %08X bytes from DMA, expected %08X", rcount, count );
2.1 --- a/src/bios.c Mon Oct 08 11:52:13 2007 +0000
2.2 +++ b/src/bios.c Mon Oct 08 12:09:06 2007 +0000
2.3 @@ -1,5 +1,5 @@
2.4 /**
2.5 - * $Id: bios.c,v 1.3 2007-10-06 08:59:42 nkeynes Exp $
2.6 + * $Id: bios.c,v 1.4 2007-10-08 12:06:01 nkeynes Exp $
2.7 *
2.8 * "Fake" BIOS functions, for operation without the actual BIOS.
2.9 *
2.10 @@ -151,7 +151,7 @@
2.11 sh4r.r[0] = cmd->status;
2.12 if( cmd->status == GD_CMD_STATUS_ERROR &&
2.13 sh4r.r[5] != 0 ) {
2.14 - mem_copy_to_sh4( sh4r.r[5], (char *)&cmd->result, sizeof(cmd->result) );
2.15 + mem_copy_to_sh4( sh4r.r[5], (unsigned char *)&cmd->result, sizeof(cmd->result) );
2.16 }
2.17 }
2.18 break;
2.19 @@ -163,7 +163,7 @@
2.20 break;
2.21 case 4: /* Drive status */
2.22 if( sh4r.r[4] != 0 ) {
2.23 - mem_copy_to_sh4( sh4r.r[4], (char *)&bios_gdrom_status,
2.24 + mem_copy_to_sh4( sh4r.r[4], (unsigned char *)&bios_gdrom_status,
2.25 sizeof(bios_gdrom_status) );
2.26 }
2.27 sh4r.r[0] = 0;
3.1 --- a/src/gdrom/ide.c Mon Oct 08 11:52:13 2007 +0000
3.2 +++ b/src/gdrom/ide.c Mon Oct 08 12:09:06 2007 +0000
3.3 @@ -1,5 +1,5 @@
3.4 /**
3.5 - * $Id: ide.c,v 1.25 2007-10-06 09:04:53 nkeynes Exp $
3.6 + * $Id: ide.c,v 1.26 2007-10-08 12:06:01 nkeynes Exp $
3.7 *
3.8 * IDE interface implementation
3.9 *
3.10 @@ -307,7 +307,7 @@
3.11 if( xferlen > remaining ) {
3.12 xferlen = remaining;
3.13 }
3.14 - mem_copy_to_sh4( addr, (char *)(data_buffer + idereg.data_offset), xferlen );
3.15 + mem_copy_to_sh4( addr, (data_buffer + idereg.data_offset), xferlen );
3.16 xfercount += xferlen;
3.17 addr += xferlen;
3.18 idereg.data_offset += xferlen;
4.1 --- a/src/gui/dump_win.c Mon Oct 08 11:52:13 2007 +0000
4.2 +++ b/src/gui/dump_win.c Mon Oct 08 12:09:06 2007 +0000
4.3 @@ -1,5 +1,5 @@
4.4 /**
4.5 - * $Id: dump_win.c,v 1.2 2005-12-25 08:24:11 nkeynes Exp $
4.6 + * $Id: dump_win.c,v 1.3 2007-10-08 12:06:01 nkeynes Exp $
4.7 *
4.8 * Implements the memory dump window.
4.9 *
4.10 @@ -32,7 +32,7 @@
4.11 uint32_t start;
4.12 uint32_t end;
4.13 int flags;
4.14 - char *data;
4.15 + unsigned char *data;
4.16
4.17 GtkEntry *fromInput, *toInput;
4.18 GtkTextView *textArea;
4.19 @@ -46,7 +46,7 @@
4.20 gboolean on_dump_win_delete_event( GtkWidget *widget, GdkEvent *event,
4.21 gpointer user_data );
4.22 void on_dump_win_button_view_clicked( GtkWidget *widget, gpointer user_data );
4.23 -void dump_win_set_text( dump_data_t data, char *old_data, char *new_data );
4.24 +void dump_win_set_text( dump_data_t data, unsigned char *old_data, unsigned char *new_data );
4.25
4.26
4.27 void dump_window_new( void ) {
4.28 @@ -143,7 +143,7 @@
4.29 {
4.30 if( data->data == NULL )
4.31 return;
4.32 - char tmp[data->end-data->start];
4.33 + unsigned char tmp[data->end-data->start];
4.34 int length = data->end-data->start;
4.35 memcpy( tmp, data->data, length );
4.36 mem_copy_from_sh4( data->data, data->start, length );
4.37 @@ -159,7 +159,7 @@
4.38 }
4.39 }
4.40
4.41 -void dump_win_set_text( dump_data_t data, char *old_data, char *new_data )
4.42 +void dump_win_set_text( dump_data_t data, unsigned char *old_data, unsigned char *new_data )
4.43 {
4.44 GtkTextBuffer *buf = data->textBuffer;
4.45 GtkTextTag *changedTag = data->changedTag;
5.1 --- a/src/mem.h Mon Oct 08 11:52:13 2007 +0000
5.2 +++ b/src/mem.h Mon Oct 08 12:09:06 2007 +0000
5.3 @@ -1,5 +1,5 @@
5.4 /**
5.5 - * $Id: mem.h,v 1.12 2007-10-06 08:59:42 nkeynes Exp $
5.6 + * $Id: mem.h,v 1.13 2007-10-08 12:06:01 nkeynes Exp $
5.7 *
5.8 * mem is responsible for creating and maintaining the overall system memory
5.9 * map, as visible from the SH4 processor. (Note the ARM has a different map)
5.10 @@ -59,8 +59,8 @@
5.11 void mem_set_trace( uint32_t addr, int flag );
5.12 void mem_init( void );
5.13 void mem_reset( void );
5.14 -void mem_copy_from_sh4( char *dest, sh4addr_t src, size_t count );
5.15 -void mem_copy_to_sh4( sh4addr_t dest, char *src, size_t count );
5.16 +void mem_copy_from_sh4( unsigned char *dest, sh4addr_t src, size_t count );
5.17 +void mem_copy_to_sh4( sh4addr_t dest, unsigned char *src, size_t count );
5.18
5.19 #define ENABLE_DEBUG_MODE 1
5.20
6.1 --- a/src/sh4/dmac.c Mon Oct 08 11:52:13 2007 +0000
6.2 +++ b/src/sh4/dmac.c Mon Oct 08 12:09:06 2007 +0000
6.3 @@ -1,5 +1,5 @@
6.4 /**
6.5 - * $Id: dmac.c,v 1.2 2007-10-06 09:03:24 nkeynes Exp $
6.6 + * $Id: dmac.c,v 1.3 2007-10-08 12:06:01 nkeynes Exp $
6.7 *
6.8 * SH4 onboard DMA controller (DMAC) peripheral.
6.9 *
6.10 @@ -170,7 +170,7 @@
6.11 *
6.12 * @return the number of bytes actually transferred.
6.13 */
6.14 -uint32_t DMAC_get_buffer( int channel, char *buf, uint32_t numBytes )
6.15 +uint32_t DMAC_get_buffer( int channel, unsigned char *buf, uint32_t numBytes )
6.16 {
6.17 uint32_t control = DMA_CONTROL(channel);
6.18 uint32_t source, count, run_count, size, i;
6.19 @@ -235,7 +235,7 @@
6.20 return run_count * size;
6.21 }
6.22
6.23 -uint32_t DMAC_put_buffer( int channel, char *buf, uint32_t numBytes )
6.24 +uint32_t DMAC_put_buffer( int channel, unsigned char *buf, uint32_t numBytes )
6.25 {
6.26 uint32_t control = DMA_CONTROL(channel);
6.27 uint32_t dest, count, run_count, size, i;
7.1 --- a/src/sh4/dmac.h Mon Oct 08 11:52:13 2007 +0000
7.2 +++ b/src/sh4/dmac.h Mon Oct 08 12:09:06 2007 +0000
7.3 @@ -1,5 +1,5 @@
7.4 /**
7.5 - * $Id: dmac.h,v 1.1 2006-01-02 14:48:29 nkeynes Exp $
7.6 + * $Id: dmac.h,v 1.2 2007-10-08 12:06:01 nkeynes Exp $
7.7 *
7.8 * SH4 onboard DMA controller (DMAC) definitions.
7.9 *
7.10 @@ -47,14 +47,14 @@
7.11 * buffer up to a maximum of bytecount bytes.
7.12 * @return Actual number of bytes copied.
7.13 */
7.14 -uint32_t DMAC_get_buffer( int channel, char *buf, uint32_t bytecount );
7.15 +uint32_t DMAC_get_buffer( int channel, unsigned char *buf, uint32_t bytecount );
7.16
7.17 /**
7.18 * execute an external-device-to-memory transfer. Copies data from the
7.19 * supplied buffer into memory up to a maximum of bytecount bytes.
7.20 * @return Actual number of bytes copied.
7.21 */
7.22 -uint32_t DMAC_put_buffer( int channel, char *buf, uint32_t bytecount );
7.23 +uint32_t DMAC_put_buffer( int channel, unsigned char *buf, uint32_t bytecount );
7.24
7.25 #ifdef __cplusplus
7.26 }
8.1 --- a/src/sh4/sh4core.c Mon Oct 08 11:52:13 2007 +0000
8.2 +++ b/src/sh4/sh4core.c Mon Oct 08 12:09:06 2007 +0000
8.3 @@ -1,5 +1,5 @@
8.4 /**
8.5 - * $Id: sh4core.c,v 1.48 2007-09-20 08:37:19 nkeynes Exp $
8.6 + * $Id: sh4core.c,v 1.49 2007-10-08 12:06:01 nkeynes Exp $
8.7 *
8.8 * SH4 emulation core, and parent module for all the SH4 peripheral
8.9 * modules.
8.10 @@ -20,12 +20,14 @@
8.11 #define MODULE sh4_module
8.12 #include <math.h>
8.13 #include "dream.h"
8.14 +#include "dreamcast.h"
8.15 +#include "eventq.h"
8.16 +#include "mem.h"
8.17 +#include "clock.h"
8.18 +#include "syscall.h"
8.19 #include "sh4/sh4core.h"
8.20 #include "sh4/sh4mmio.h"
8.21 #include "sh4/intc.h"
8.22 -#include "mem.h"
8.23 -#include "clock.h"
8.24 -#include "syscall.h"
8.25
8.26 #define SH4_CALLTRACE 1
8.27
8.28 @@ -126,7 +128,7 @@
8.29 static int call_stack_depth = 0;
8.30 int sh4_call_trace_on = 0;
8.31
8.32 -static inline trace_call( sh4addr_t source, sh4addr_t dest )
8.33 +static inline void trace_call( sh4addr_t source, sh4addr_t dest )
8.34 {
8.35 if( call_stack_depth < MAX_CALLSTACK ) {
8.36 call_stack[call_stack_depth].call_addr = source;
8.37 @@ -136,7 +138,7 @@
8.38 call_stack_depth++;
8.39 }
8.40
8.41 -static inline trace_return( sh4addr_t source, sh4addr_t dest )
8.42 +static inline void trace_return( sh4addr_t source, sh4addr_t dest )
8.43 {
8.44 if( call_stack_depth > 0 ) {
8.45 call_stack_depth--;
9.1 --- a/src/sh4/sh4core.in Mon Oct 08 11:52:13 2007 +0000
9.2 +++ b/src/sh4/sh4core.in Mon Oct 08 12:09:06 2007 +0000
9.3 @@ -1,5 +1,5 @@
9.4 /**
9.5 - * $Id: sh4core.in,v 1.8 2007-09-20 08:37:19 nkeynes Exp $
9.6 + * $Id: sh4core.in,v 1.9 2007-10-08 12:06:01 nkeynes Exp $
9.7 *
9.8 * SH4 emulation core, and parent module for all the SH4 peripheral
9.9 * modules.
9.10 @@ -20,12 +20,14 @@
9.11 #define MODULE sh4_module
9.12 #include <math.h>
9.13 #include "dream.h"
9.14 +#include "dreamcast.h"
9.15 +#include "eventq.h"
9.16 +#include "mem.h"
9.17 +#include "clock.h"
9.18 +#include "syscall.h"
9.19 #include "sh4/sh4core.h"
9.20 #include "sh4/sh4mmio.h"
9.21 #include "sh4/intc.h"
9.22 -#include "mem.h"
9.23 -#include "clock.h"
9.24 -#include "syscall.h"
9.25
9.26 #define SH4_CALLTRACE 1
9.27
9.28 @@ -126,7 +128,7 @@
9.29 static int call_stack_depth = 0;
9.30 int sh4_call_trace_on = 0;
9.31
9.32 -static inline trace_call( sh4addr_t source, sh4addr_t dest )
9.33 +static inline void trace_call( sh4addr_t source, sh4addr_t dest )
9.34 {
9.35 if( call_stack_depth < MAX_CALLSTACK ) {
9.36 call_stack[call_stack_depth].call_addr = source;
9.37 @@ -136,7 +138,7 @@
9.38 call_stack_depth++;
9.39 }
9.40
9.41 -static inline trace_return( sh4addr_t source, sh4addr_t dest )
9.42 +static inline void trace_return( sh4addr_t source, sh4addr_t dest )
9.43 {
9.44 if( call_stack_depth > 0 ) {
9.45 call_stack_depth--;
10.1 --- a/src/sh4/sh4dasm.c Mon Oct 08 11:52:13 2007 +0000
10.2 +++ b/src/sh4/sh4dasm.c Mon Oct 08 12:09:06 2007 +0000
10.3 @@ -1,5 +1,5 @@
10.4 /**
10.5 - * $Id: sh4dasm.c,v 1.11 2007-08-23 12:33:27 nkeynes Exp $
10.6 + * $Id: sh4dasm.c,v 1.12 2007-10-08 12:06:01 nkeynes Exp $
10.7 *
10.8 * SH4 CPU definition and disassembly functions
10.9 *
10.10 @@ -1146,7 +1146,7 @@
10.11 case 0x1:
10.12 { /* MOV.W R0, @(disp, Rn) */
10.13 uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
10.14 - snprintf( buf, len, "MOV.W R0, @(%d, Rn)", disp, Rn );
10.15 + snprintf( buf, len, "MOV.W R0, @(%d, R%d)", disp, Rn );
10.16 }
10.17 break;
10.18 case 0x4:
10.19 @@ -1337,13 +1337,13 @@
10.20 case 0x1:
10.21 { /* FSUB FRm, FRn */
10.22 uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
10.23 - snprintf( buf, len, "FSUB FRm, FR%d", FRm, FRn );
10.24 + snprintf( buf, len, "FSUB FR%d, FR%d", FRm, FRn );
10.25 }
10.26 break;
10.27 case 0x2:
10.28 { /* FMUL FRm, FRn */
10.29 uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
10.30 - snprintf( buf, len, "FMUL FRm, FR%d", FRm, FRn );
10.31 + snprintf( buf, len, "FMUL FR%d, FR%d", FRm, FRn );
10.32 }
10.33 break;
10.34 case 0x3:
11.1 --- a/src/sh4/sh4dasm.in Mon Oct 08 11:52:13 2007 +0000
11.2 +++ b/src/sh4/sh4dasm.in Mon Oct 08 12:09:06 2007 +0000
11.3 @@ -1,5 +1,5 @@
11.4 /**
11.5 - * $Id: sh4dasm.in,v 1.1 2007-08-23 12:33:27 nkeynes Exp $
11.6 + * $Id: sh4dasm.in,v 1.2 2007-10-08 12:06:01 nkeynes Exp $
11.7 *
11.8 * SH4 CPU definition and disassembly functions
11.9 *
11.10 @@ -125,7 +125,7 @@
11.11 FMOV @Rm, FRn {: snprintf( buf, len, "FMOV @R%d, FR%d", Rm, FRn ); :}
11.12 FMOV @Rm+, FRn {: snprintf( buf, len, "FMOV @R%d+, FR%d", Rm, FRn ); :}
11.13 FMOV @(R0, Rm), FRn {: snprintf( buf, len, "FMOV @(R0, R%d), FR%d", Rm, FRn ); :}
11.14 -FMUL FRm, FRn {: snprintf( buf, len, "FMUL FRm, FR%d", FRm, FRn ); :}
11.15 +FMUL FRm, FRn {: snprintf( buf, len, "FMUL FR%d, FR%d", FRm, FRn ); :}
11.16 FNEG FRn {: snprintf( buf, len, "FNEG FR%d", FRn ); :}
11.17 FRCHG {: snprintf( buf, len, "FRCHG " ); :}
11.18 FSCA FPUL, FRn {: snprintf( buf, len, "FSCA FPUL, FR%d", FRn ); :}
11.19 @@ -133,7 +133,7 @@
11.20 FSQRT FRn {: snprintf( buf, len, "FSQRT FR%d", FRn ); :}
11.21 FSRRA FRn {: snprintf( buf, len, "FSRRA FR%d", FRn ); :}
11.22 FSTS FPUL, FRn {: snprintf( buf, len, "FSTS FPUL, FR%d", FRn ); :}
11.23 -FSUB FRm, FRn {: snprintf( buf, len, "FSUB FRm, FR%d", FRm, FRn ); :}
11.24 +FSUB FRm, FRn {: snprintf( buf, len, "FSUB FR%d, FR%d", FRm, FRn ); :}
11.25 FTRC FRm, FPUL {: snprintf( buf, len, "FTRC FR%d, FPUL", FRm ); :}
11.26 FTRV XMTRX, FVn {: snprintf( buf, len, "FTRV XMTRX, FV%d", FVn ); :}
11.27 JMP @Rn {: snprintf( buf, len, "JMP @R%d", Rn ); :}
11.28 @@ -194,7 +194,7 @@
11.29 MOV.W Rm, @-Rn {: snprintf( buf, len, "MOV.W R%d, @-R%d", Rm, Rn ); :}
11.30 MOV.W Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.W R%d, @(R0, R%d)", Rm, Rn ); :}
11.31 MOV.W R0, @(disp, GBR) {: snprintf( buf, len, "MOV.W R0, @(%d, GBR)", disp); :}
11.32 -MOV.W R0, @(disp, Rn) {: snprintf( buf, len, "MOV.W R0, @(%d, Rn)", disp, Rn ); :}
11.33 +MOV.W R0, @(disp, Rn) {: snprintf( buf, len, "MOV.W R0, @(%d, R%d)", disp, Rn ); :}
11.34 MOV.W @Rm, Rn {: snprintf( buf, len, "MOV.W @R%d, R%d", Rm, Rn ); :}
11.35 MOV.W @Rm+, Rn {: snprintf( buf, len, "MOV.W @R%d+, R%d", Rm, Rn ); :}
11.36 MOV.W @(R0, Rm), Rn {: snprintf( buf, len, "MOV.W @(R0, R%d), R%d", Rm, Rn ); :}
12.1 --- a/src/sh4/sh4mem.c Mon Oct 08 11:52:13 2007 +0000
12.2 +++ b/src/sh4/sh4mem.c Mon Oct 08 12:09:06 2007 +0000
12.3 @@ -1,5 +1,5 @@
12.4 /**
12.5 - * $Id: sh4mem.c,v 1.27 2007-10-06 09:03:24 nkeynes Exp $
12.6 + * $Id: sh4mem.c,v 1.28 2007-10-08 12:09:06 nkeynes Exp $
12.7 * sh4mem.c is responsible for the SH4's access to memory (including memory
12.8 * mapped I/O), using the page maps created in mem.c
12.9 *
12.10 @@ -358,7 +358,7 @@
12.11 /* FIXME: Handle all the many special cases when the range doesn't fall cleanly
12.12 * into the same memory block
12.13 */
12.14 -void mem_copy_from_sh4( char *dest, uint32_t srcaddr, size_t count ) {
12.15 +void mem_copy_from_sh4( unsigned char *dest, uint32_t srcaddr, size_t count ) {
12.16 if( srcaddr >= 0x04000000 && srcaddr < 0x05000000 ) {
12.17 pvr2_vram64_read( dest, srcaddr, count );
12.18 } else {
12.19 @@ -371,7 +371,7 @@
12.20 }
12.21 }
12.22
12.23 -void mem_copy_to_sh4( uint32_t destaddr, char *src, size_t count ) {
12.24 +void mem_copy_to_sh4( uint32_t destaddr, unsigned char *src, size_t count ) {
12.25 if( destaddr >= 0x10000000 && destaddr < 0x14000000 ) {
12.26 pvr2_dma_write( destaddr, src, count );
12.27 return;
12.28 @@ -394,7 +394,7 @@
12.29 {
12.30 /* Store queue operation */
12.31 int queue = (addr&0x20)>>2;
12.32 - char *src = (char *)&sh4r.store_queue[queue];
12.33 + unsigned char *src = (unsigned char *)&sh4r.store_queue[queue];
12.34 uint32_t hi = (MMIO_READ( MMU, (queue == 0 ? QACR0 : QACR1) ) & 0x1C) << 24;
12.35 uint32_t target = (addr&0x03FFFFE0) | hi;
12.36 mem_copy_to_sh4( target, src, 32 );
13.1 --- a/src/sh4/sh4trans.c Mon Oct 08 11:52:13 2007 +0000
13.2 +++ b/src/sh4/sh4trans.c Mon Oct 08 12:09:06 2007 +0000
13.3 @@ -1,5 +1,5 @@
13.4 /**
13.5 - * $Id: sh4trans.c,v 1.7 2007-10-04 08:47:27 nkeynes Exp $
13.6 + * $Id: sh4trans.c,v 1.8 2007-10-08 12:06:01 nkeynes Exp $
13.7 *
13.8 * SH4 translation core module. This part handles the non-target-specific
13.9 * section of the translation.
13.10 @@ -17,9 +17,11 @@
13.11 * GNU General Public License for more details.
13.12 */
13.13 #include <assert.h>
13.14 -#include "sh4core.h"
13.15 -#include "sh4trans.h"
13.16 -#include "xltcache.h"
13.17 +#include "eventq.h"
13.18 +#include "syscall.h"
13.19 +#include "sh4/sh4core.h"
13.20 +#include "sh4/sh4trans.h"
13.21 +#include "sh4/xltcache.h"
13.22
13.23 /**
13.24 * Execute a timeslice using translated code only (ie translate/execute loop)
13.25 @@ -27,7 +29,6 @@
13.26 */
13.27 uint32_t sh4_xlat_run_slice( uint32_t nanosecs )
13.28 {
13.29 - int i;
13.30 sh4r.slice_cycle = 0;
13.31
13.32 if( sh4r.sh4_state != SH4_STATE_RUNNING ) {
13.33 @@ -122,9 +123,9 @@
13.34 */
13.35 void *sh4_translate_and_run( sh4addr_t start )
13.36 {
13.37 - char buf[65536];
13.38 + unsigned char buf[65536];
13.39
13.40 - uint32_t pc = start;
13.41 + sh4addr_t pc = start;
13.42 int done;
13.43 xlat_output = buf;
13.44 uint8_t *eob = xlat_output + sizeof(buf);
.