1.1 --- a/src/pvr2/pvr2.c	Thu Mar 23 13:18:51 2006 +0000
     1.2 +++ b/src/pvr2/pvr2.c	Thu Mar 23 13:19:15 2006 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: pvr2.c,v 1.20 2006-03-15 13:16:50 nkeynes Exp $
     1.6 + * $Id: pvr2.c,v 1.21 2006-03-23 13:19:15 nkeynes Exp $
     1.7   *
     1.8   * PVR2 (Video) Core MMIO registers.
     1.9   *
    1.10 @@ -341,3 +341,10 @@
    1.11  	}
    1.12      }
    1.13  }
    1.14 +
    1.15 +void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f ) 
    1.16 +{
    1.17 +    char tmp[length];
    1.18 +    pvr2_vram64_read( tmp, addr, length );
    1.19 +    fwrite_dump( tmp, length, f );
    1.20 +}

     2.1 --- a/src/pvr2/pvr2.h	Thu Mar 23 13:18:51 2006 +0000
     2.2 +++ b/src/pvr2/pvr2.h	Thu Mar 23 13:19:15 2006 +0000
     2.3 @@ -1,5 +1,5 @@
     2.4  /**
     2.5 - * $Id: pvr2.h,v 1.10 2006-03-15 13:16:50 nkeynes Exp $
     2.6 + * $Id: pvr2.h,v 1.11 2006-03-23 13:19:15 nkeynes Exp $
     2.7   *
     2.8   * PVR2 (video chip) functions and macros.
     2.9   *
    2.10 @@ -103,6 +103,12 @@
    2.11   */
    2.12  void pvr2_vram64_read( char *dest, sh4addr_t src, uint32_t length );
    2.13  
    2.14 +/**
    2.15 + * Dump a portion of vram to a stream from the interleaved memory address 
    2.16 + * space.
    2.17 + */
    2.18 +void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f );
    2.19 +
    2.20  /**************************** Tile Accelerator ***************************/
    2.21  /**
    2.22   * Process the data in the supplied buffer as an array of TA command lists.