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lxdream.org :: lxdream :: r904:5b92e51ac06b
lxdream 0.9.1
released Jun 29
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changeset904:5b92e51ac06b
parent903:1337c7a7dd6b
child905:4c17ebd9ef5e
authornkeynes
dateWed Oct 29 23:36:31 2008 +0000 (11 years ago)
Enable the FIPR SSE3 code for now, and add a comment on the sh4r.fr alignment
src/sh4/sh4.h
src/sh4/sh4x86.in
1.1 --- a/src/sh4/sh4.h Wed Oct 29 23:32:28 2008 +0000
1.2 +++ b/src/sh4/sh4.h Wed Oct 29 23:36:31 2008 +0000
1.3 @@ -70,7 +70,7 @@
1.4 float f;
1.5 } fpul;
1.6 uint32_t t, m, q, s; /* really boolean - 0 or 1 */
1.7 - float fr[2][16];
1.8 + float fr[2][16]; /* Must be aligned on 16-byte boundary */
1.9 uint32_t fpscr;
1.10 uint32_t pad; /* Pad up to 64-bit boundaries */
1.11 uint64_t mac;
2.1 --- a/src/sh4/sh4x86.in Wed Oct 29 23:32:28 2008 +0000
2.2 +++ b/src/sh4/sh4x86.in Wed Oct 29 23:36:31 2008 +0000
2.3 @@ -2238,14 +2238,14 @@
2.4 COUNT_INST(I_FIPR);
2.5 check_fpuen();
2.6 if( sh4_x86.double_prec == 0 ) {
2.7 -/* if( sh4_x86.sse3_enabled ) {
2.8 + if( sh4_x86.sse3_enabled ) {
2.9 MOVAPS_sh4r_xmm( REG_OFFSET(fr[0][FVm<<2]), 4 );
2.10 MULPS_sh4r_xmm( REG_OFFSET(fr[0][FVn<<2]), 4 );
2.11 HADDPS_xmm_xmm( 4, 4 );
2.12 HADDPS_xmm_xmm( 4, 4 );
2.13 MOVSS_xmm_sh4r( 4, REG_OFFSET(fr[0][(FVn<<2)+2]) );
2.14 } else {
2.15 -*/ push_fr( FVm<<2 );
2.16 + push_fr( FVm<<2 );
2.17 push_fr( FVn<<2 );
2.18 FMULP_st(1);
2.19 push_fr( (FVm<<2)+1);
2.20 @@ -2261,7 +2261,7 @@
2.21 FMULP_st(1);
2.22 FADDP_st(1);
2.23 pop_fr( (FVn<<2)+3);
2.24 -// }
2.25 + }
2.26 }
2.27 :}
2.28 FTRV XMTRX, FVn {:
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