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lxdream.org :: lxdream :: r358:65043a8f5785
lxdream 0.9.1
released Jun 29
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changeset358:65043a8f5785
parent357:3592a10b3242
child359:c588dce7ebde
authornkeynes
dateThu Aug 23 12:31:31 2007 +0000 (13 years ago)
Add tests for mac.l and mac.w
Start test cases for fmov
Update exception tests
test/Makefile
test/sh4/excslot.s
test/sh4/float.s
test/sh4/fmov.s
test/sh4/ftrc.s
test/sh4/mac.s
test/sh4/testsh4.c
test/sh4/undef.s
1.1 --- a/test/Makefile Tue Feb 13 08:34:27 2007 +0000
1.2 +++ b/test/Makefile Thu Aug 23 12:31:31 2007 +0000
1.3 @@ -74,7 +74,7 @@
1.4 testsh4: crt0.so sh4/testsh4.so timer.so interrupt.so \
1.5 sh4/add.so sh4/addc.so sh4/addv.so sh4/and.so sh4/andi.so \
1.6 sh4/bf.so sh4/bt.so sh4/cmp.so \
1.7 - sh4/float.so sh4/ftrc.so \
1.8 + sh4/float.so sh4/fmov.so sh4/ftrc.so sh4/mac.s \
1.9 sh4/excslot.so sh4/undef.so
1.10 $(SH4CC) $(SH4LDFLAGS) $^ -o $@ $(SH4LIBS)
1.11 $(SH4OBJCOPY) testsh4 testsh4.bin
2.1 --- a/test/sh4/excslot.s Tue Feb 13 08:34:27 2007 +0000
2.2 +++ b/test/sh4/excslot.s Thu Aug 23 12:31:31 2007 +0000
2.3 @@ -169,16 +169,39 @@
2.4 .word 0xFFFD
2.5 assert_exc_caught test_slot_str_k test_slot_17_pc
2.6
2.7 +test_slot_18: ! "Undefined (FPU disabled)" 0xFFFD
2.8 + add #1, r12
2.9 + stc sr, r0
2.10 + xor r1, r1
2.11 + add #32, r1
2.12 + shll2 r1
2.13 + shll8 r1
2.14 + or r0, r1
2.15 + ldc r1, sr
2.16 + expect_exc 0x000001A0
2.17 +test_slot_18_pc:
2.18 + bsr test_slot_fail
2.19 + .word 0xFFFD
2.20 + assert_exc_caught test_slot_str_k test_slot_18_pc
2.21 + stc sr, r0
2.22 + xor r1, r1
2.23 + add #32, r1
2.24 + shll2 r1
2.25 + shll8 r1
2.26 + not r1, r1
2.27 + and r0, r1
2.28 + ldc r1, sr
2.29 +
2.30 !
2.31 ! Ok now the privilege tests. These should raise SLOT_ILLEGAL when executed
2.32 ! in a delay slot (otherwise it's GENERAL_ILLEGAL)
2.33
2.34 -test_slot_18: ! LDC Rn, SPC in user mode
2.35 +test_slot_19: ! LDC Rn, SPC in user mode
2.36 ! add #1, r12
2.37 ! expect_exc 0x000001A0
2.38 ! stc spc, r4
2.39 ! usermode
2.40 -!test_slot_18_pc:
2.41 +!test_slot_19_pc:
2.42 ! bsr test_slot_fail
2.43 ! ldc r4, spc
2.44 ! systemmode
3.1 --- a/test/sh4/float.s Tue Feb 13 08:34:27 2007 +0000
3.2 +++ b/test/sh4/float.s Thu Aug 23 12:31:31 2007 +0000
3.3 @@ -186,24 +186,83 @@
3.4 sts fpul, r2
3.5 mov.l test_float_6_result, r1
3.6 cmp/eq r1, r2
3.7 - bt test_float_end
3.8 + bt test_float_7
3.9
3.10 test_float_6_fail:
3.11 fail test_float_str_k
3.12 - bra test_float_end
3.13 + bra test_float_7
3.14 nop
3.15
3.16 test_float_6_input:
3.17 .long 0x80000000
3.18 test_float_6_result:
3.19 .long 0xCF000000
3.20 +
3.21 +test_float_7:
3.22 + add #1, r12
3.23 + fldi0 fr8
3.24 + fldi0 fr9
3.25 + fldi0 fr10
3.26 + frchg
3.27 + fldi0 fr8
3.28 + fldi0 fr9
3.29 + fldi0 fr10
3.30 + setpr
3.31 + mov.l test_float_7_input, r0
3.32 + lds r0, fpul
3.33 + float fpul, fr9
3.34 + sts fpul,r1
3.35 + cmp/eq r0,r1
3.36 + bf test_float_7_fail
3.37 + flds fr8, fpul
3.38 + sts fpul, r0
3.39 + tst r0, r0
3.40 + bf test_float_7_fail
3.41 + flds fr9, fpul
3.42 + sts fpul, r0
3.43 + mov.l test_float_7_output_a, r1
3.44 + cmp/eq r0, r1
3.45 + bf test_float_7_fail
3.46 + flds fr10, fpul
3.47 + sts fpul, r0
3.48 + tst r0, r0
3.49 + bf test_float_7_fail
3.50 + frchg
3.51 + flds fr8, fpul
3.52 + sts fpul, r0
3.53 + flds fr9, fpul
3.54 + sts fpul, r1
3.55 + flds fr10, fpul
3.56 + sts fpul, r2
3.57 + tst r0, r0
3.58 + bf test_float_7_fail
3.59 + tst r1, r1
3.60 + bf test_float_7_fail
3.61 + tst r2, r2
3.62 + bt test_float_end
3.63 +test_float_7_fail:
3.64 + fail test_float_str_k
3.65 + bra test_float_end
3.66 + nop
3.67 +
3.68 +test_float_7_input:
3.69 + .long 0x12345678
3.70 +test_float_7_output_a:
3.71 + .long 0x41B23456
3.72 +test_float_7_output_b:
3.73 + .long 0x78000000
3.74 +printf_k:
3.75 + .long _printf
3.76
3.77 test_float_end:
3.78 end_test test_float_str_k
3.79
3.80 test_float_str:
3.81 .string "FLOAT"
3.82 + .align 4
3.83 +printf_fmt:
3.84 + .string "%08X %08X\n"
3.85
3.86 .align 4
3.87 test_float_str_k:
3.88 - .long test_float_str
3.89 \ No newline at end of file
3.90 + .long test_float_str
4.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
4.2 +++ b/test/sh4/fmov.s Thu Aug 23 12:31:31 2007 +0000
4.3 @@ -0,0 +1,320 @@
4.4 +.section .text
4.5 +.include "sh4/inc.s"
4.6 +!
4.7 +! Test fmov (all variants)
4.8 +! (not arithmetic)
4.9 +
4.10 +.global _test_fmov
4.11 +_test_fmov:
4.12 + start_test
4.13 +
4.14 + xor r0,r0
4.15 + lds r0, fpscr
4.16 +
4.17 +test_fmov_1: ! single precision reg-to-reg
4.18 + add #1, r12
4.19 +
4.20 + fldi0 fr0
4.21 + fldi1 fr1
4.22 + flds fr0, fpul
4.23 + sts fpul, r0
4.24 + tst r0, r0
4.25 + bf test_fmov_1_fail
4.26 + fmov fr1, fr0
4.27 + flds fr0, fpul
4.28 + sts fpul, r0
4.29 + mov.l test_fmov_1_result, r1
4.30 + cmp/eq r0, r1
4.31 + bt test_fmov_2
4.32 +test_fmov_1_fail:
4.33 + fail test_fmov_str_k
4.34 + bra test_fmov_2
4.35 + nop
4.36 +
4.37 +test_fmov_1_result:
4.38 + .long 0x3F800000
4.39 +
4.40 +test_fmov_2: ! reg-to-reg double prec
4.41 + add #1, r12
4.42 + mov.l test_fmov_2_input_a, r1
4.43 + lds r1, fpul
4.44 + fsts fpul, fr4
4.45 + mov.l test_fmov_2_input_b, r3
4.46 + lds r3, fpul
4.47 + fsts fpul, fr5
4.48 + fldi0 fr8
4.49 + fldi0 fr9
4.50 + fschg
4.51 + flds fr8, fpul
4.52 + sts fpul, r0
4.53 + tst r0, r0
4.54 + bf test_fmov_2_fail
4.55 + flds fr9, fpul
4.56 + sts fpul, r0
4.57 + tst r0, r0
4.58 + bf test_fmov_2_fail
4.59 + fmov fr4, fr8
4.60 + flds fr8, fpul
4.61 + sts fpul, r0
4.62 + flds fr9, fpul
4.63 + sts fpul, r2
4.64 + cmp/eq r0, r1
4.65 + bf test_fmov_2_fail
4.66 + cmp/eq r2, r3
4.67 + bt test_fmov_3
4.68 +test_fmov_2_fail:
4.69 + fail test_fmov_str_k
4.70 + bra test_fmov_3
4.71 + nop
4.72 +test_fmov_2_input_a:
4.73 + .long 0x12345678
4.74 +test_fmov_2_input_b:
4.75 + .long 0x9ABCDEF0
4.76 +
4.77 +test_fmov_3: ! double size DRm to XDn
4.78 + add #1, r12
4.79 + frchg
4.80 + fldi0 fr8
4.81 + fldi0 fr9
4.82 + frchg
4.83 + fldi0 fr8
4.84 + fldi0 fr9
4.85 + mov.l test_fmov_3_input_a, r2
4.86 + lds r2, fpul
4.87 + fsts fpul, fr2
4.88 + mov.l test_fmov_3_input_b, r3
4.89 + lds r3, fpul
4.90 + fsts fpul, fr3
4.91 +
4.92 + fmov fr2, fr9
4.93 + flds fr8, fpul
4.94 + sts fpul, r0
4.95 + flds fr9, fpul
4.96 + sts fpul, r1
4.97 + tst r0, r0
4.98 + bf test_fmov_3_fail
4.99 + tst r1, r1
4.100 + bf test_fmov_3_fail
4.101 + frchg
4.102 + flds fr8, fpul
4.103 + sts fpul, r0
4.104 + flds fr9, fpul
4.105 + sts fpul, r1
4.106 + cmp/eq r0, r2
4.107 + bf test_fmov_3_fail
4.108 + cmp/eq r1, r3
4.109 + bt test_fmov_4
4.110 +
4.111 +test_fmov_3_fail:
4.112 + fail test_fmov_str_k
4.113 + bra test_fmov_4
4.114 + nop
4.115 +
4.116 +test_fmov_3_input_a:
4.117 + .long 0x86421357
4.118 +test_fmov_3_input_b:
4.119 + .long 0x97532468
4.120 +
4.121 +test_fmov_4: ! double size XDm to DRn
4.122 + add #1, r12
4.123 + mov.l test_fmov_4_input_a, r2
4.124 + lds r2, fpul
4.125 + fsts fpul, fr6
4.126 + mov.l test_fmov_4_input_b, r3
4.127 + lds r3, fpul
4.128 + fsts fpul, fr7
4.129 + fldi0 fr0
4.130 + fldi0 fr1
4.131 + frchg
4.132 + fldi0 fr6
4.133 + fldi0 fr7
4.134 +
4.135 + fmov fr7, fr0
4.136 + flds fr0, fpul
4.137 + sts fpul, r0
4.138 + flds fr1, fpul
4.139 + sts fpul, r1
4.140 + cmp/eq r0, r2
4.141 + bf test_fmov_4_fail
4.142 + cmp/eq r1, r3
4.143 + bf test_fmov_4_fail
4.144 + frchg
4.145 + flds fr0, fpul
4.146 + sts fpul, r0
4.147 + flds fr1, fpul
4.148 + sts fpul, r1
4.149 + tst r0, r0
4.150 + bf test_fmov_4_fail
4.151 + tst r1, r1
4.152 + bt test_fmov_5
4.153 +
4.154 +test_fmov_4_fail:
4.155 + fail test_fmov_str_k
4.156 + bra test_fmov_5
4.157 + nop
4.158 +
4.159 +test_fmov_4_input_a:
4.160 + .long 0xACADACA0
4.161 +test_fmov_4_input_b:
4.162 + .long 0x12233445
4.163 +
4.164 +
4.165 +test_fmov_5: ! double size @Rm to DRn, DRm to @Rn
4.166 + add #1, r12
4.167 + mova test_fmov_5_data_a, r0
4.168 + mov r0, r4
4.169 + xor r1, r1
4.170 + mov.l r1, @r0
4.171 + add #4, r0
4.172 + mov.l r1, @r0
4.173 + mova test_fmov_5_input_a, r0
4.174 + fmov @r0, fr8
4.175 + mov.l test_fmov_5_input_a, r0
4.176 + mov.l test_fmov_5_input_b, r1
4.177 + flds fr8, fpul
4.178 + sts fpul, r5
4.179 + flds fr9, fpul
4.180 + sts fpul, r6
4.181 + cmp/eq r0, r5
4.182 + bf test_fmov_5_fail
4.183 + cmp/eq r1, r6
4.184 + bf test_fmov_5_fail
4.185 + fmov fr8, @r4
4.186 + mov.l test_fmov_5_data_a, r2
4.187 + mov.l test_fmov_5_data_b, r3
4.188 + cmp/eq r0, r2
4.189 + bf test_fmov_5_fail
4.190 + cmp/eq r1, r3
4.191 + bt test_fmov_6
4.192 +test_fmov_5_fail:
4.193 + fail test_fmov_str_k
4.194 + bra test_fmov_6
4.195 + nop
4.196 +
4.197 +test_fmov_5_input_a:
4.198 + .long 0xFEEDBEEF
4.199 +test_fmov_5_input_b:
4.200 + .long 0xDEAD1234
4.201 +test_fmov_5_data_a:
4.202 + .long 0
4.203 +test_fmov_5_data_b:
4.204 + .long 0
4.205 +
4.206 +test_fmov_6: ! double size @Rm+ to DRn, DRm to @-Rn
4.207 + add #1, r12
4.208 + mova test_fmov_6_data_a, r0
4.209 + mov r0, r4
4.210 + xor r1, r1
4.211 + mov.l r1, @r4
4.212 + add #4, r4
4.213 + mov.l r1, @r4
4.214 + add #4, r4
4.215 + mova test_fmov_6_input_a, r0
4.216 + mov r0, r7
4.217 + fmov @r7+, fr10
4.218 + mov.l test_fmov_6_input_a, r0
4.219 + mov.l test_fmov_6_input_b, r1
4.220 + flds fr10, fpul
4.221 + sts fpul, r5
4.222 + flds fr11, fpul
4.223 + sts fpul, r6
4.224 + cmp/eq r0, r5
4.225 + bf test_fmov_6_fail
4.226 + cmp/eq r1, r6
4.227 + bf test_fmov_6_fail
4.228 + fmov fr10, @-r4
4.229 + mov.l test_fmov_6_data_a, r2
4.230 + mov.l test_fmov_6_data_b, r3
4.231 + cmp/eq r0, r2
4.232 + bf test_fmov_6_fail
4.233 + cmp/eq r1, r3
4.234 + bf test_fmov_6_fail
4.235 + mova test_fmov_6_data_a, r0
4.236 + cmp/eq r0, r4
4.237 + bf test_fmov_6_fail
4.238 + cmp/eq r0, r7
4.239 + bt test_fmov_7
4.240 +test_fmov_6_fail:
4.241 + fail test_fmov_str_k
4.242 + bra test_fmov_7
4.243 + nop
4.244 +
4.245 +test_fmov_6_input_a:
4.246 + .long 0x42318576
4.247 +test_fmov_6_input_b:
4.248 + .long 0xF0AFD34F
4.249 +test_fmov_6_data_a:
4.250 + .long 0
4.251 +test_fmov_6_data_b:
4.252 + .long 0
4.253 +
4.254 +test_fmov_7: ! double size @Rm,@R0 to DRn, DRm to @Rn,@R0
4.255 + add #1, r12
4.256 + mova test_fmov_7_data_a, r0
4.257 + mov r0, r4
4.258 + xor r1, r1
4.259 + mov.l r1, @r4
4.260 + add #4, r4
4.261 + mov.l r1, @r4
4.262 + add #48, r4
4.263 + mova test_fmov_7_input_a, r0
4.264 + mov r0, r7
4.265 + xor r0, r0
4.266 + add #-31, r7
4.267 + add #31, r0
4.268 + fmov @(r0,r7), fr10
4.269 + mov.l test_fmov_7_input_a, r0
4.270 + mov.l test_fmov_7_input_b, r1
4.271 + flds fr10, fpul
4.272 + sts fpul, r5
4.273 + flds fr11, fpul
4.274 + sts fpul, r6
4.275 + cmp/eq r0, r5
4.276 + bf test_fmov_7_fail
4.277 + cmp/eq r1, r6
4.278 + bf test_fmov_7_fail
4.279 + xor r0, r0
4.280 + add #-52, r0
4.281 + fmov fr10, @(r0,r4)
4.282 + mov.l test_fmov_7_input_a, r0
4.283 + mov.l test_fmov_7_data_a, r2
4.284 + mov.l test_fmov_7_data_b, r3
4.285 + cmp/eq r0, r2
4.286 + bf test_fmov_7_fail
4.287 + cmp/eq r1, r3
4.288 + bf test_fmov_7_fail
4.289 + mova test_fmov_7_data_a, r0
4.290 + add #52, r0
4.291 + cmp/eq r0, r4
4.292 + bf test_fmov_7_fail
4.293 + mova test_fmov_7_input_a, r0
4.294 + add #-31, r0
4.295 + cmp/eq r0, r7
4.296 + bt test_fmov_8
4.297 +test_fmov_7_fail:
4.298 + fail test_fmov_str_k
4.299 + bra test_fmov_8
4.300 + nop
4.301 +
4.302 +test_fmov_7_input_a:
4.303 + .long 0xABBACADA
4.304 +test_fmov_7_input_b:
4.305 + .long 0x43546576
4.306 +test_fmov_7_data_a:
4.307 + .long 0
4.308 +test_fmov_7_data_b:
4.309 + .long 0
4.310 +
4.311 +test_fmov_8:
4.312 +
4.313 +test_fmov_end:
4.314 + xor r0, r0
4.315 + lds r0, fpscr
4.316 + end_test test_fmov_str_k
4.317 +
4.318 +test_fmov_str:
4.319 + .string "FMOV"
4.320 +
4.321 +.align 4
4.322 +test_fmov_str_k:
4.323 + .long test_fmov_str
5.1 --- a/test/sh4/ftrc.s Tue Feb 13 08:34:27 2007 +0000
5.2 +++ b/test/sh4/ftrc.s Thu Aug 23 12:31:31 2007 +0000
5.3 @@ -101,11 +101,11 @@
5.4 nop
5.5
5.6 test_ftrc_4_input_a:
5.7 - .long 0x41DFFFFF
5.8 + .long 0x40FFFF11
5.9 test_ftrc_4_input_b:
5.10 - .long 0xFFC00000
5.11 + .long 0x11111111
5.12 test_ftrc_4_result:
5.13 - .long 0x7FFFFFFF
5.14 + .long 0x0001FFF1
5.15
5.16
5.17 test_ftrc_5: ! test w/ max +int, sz=0, pr=0, fr=1
5.18 @@ -177,7 +177,7 @@
5.19 bt test_ftrc_8
5.20 test_ftrc_7_fail:
5.21 fail test_ftrc_str_k
5.22 - bra test_ftrc_7
5.23 + bra test_ftrc_8
5.24 nop
5.25
5.26 test_ftrc_7_input:
5.27 @@ -194,10 +194,10 @@
5.28 sts fpul, r2
5.29 mov.l test_ftrc_8_result, r1
5.30 cmp/eq r1, r2
5.31 - bt test_ftrc_end
5.32 + bt test_ftrc_9
5.33 test_ftrc_8_fail:
5.34 fail test_ftrc_str_k
5.35 - bra test_ftrc_8
5.36 + bra test_ftrc_9
5.37 nop
5.38
5.39 test_ftrc_8_input:
5.40 @@ -205,7 +205,89 @@
5.41 test_ftrc_8_result:
5.42 .long 0x80000000
5.43
5.44 +test_ftrc_9: ! Test >max +int pr=1
5.45 + add #1, r12
5.46 + setpr
5.47 + mov.l test_ftrc_9_input_a, r0
5.48 + lds r0, fpul
5.49 + fsts fpul, fr6
5.50 + mov.l test_ftrc_9_input_b, r0
5.51 + lds r0, fpul
5.52 + fsts fpul, fr7
5.53 + ftrc fr6, fpul
5.54 + sts fpul, r2
5.55 + mov.l test_ftrc_9_result, r1
5.56 + cmp/eq r1, r2
5.57 + bt test_ftrc_10
5.58 +test_ftrc_9_fail:
5.59 + fail test_ftrc_str_k
5.60 + bra test_ftrc_10
5.61 + nop
5.62
5.63 +test_ftrc_9_input_a:
5.64 + .long 0x41DFFFFF
5.65 +test_ftrc_9_input_b:
5.66 + .long 0xFFC00000
5.67 +test_ftrc_9_result:
5.68 + .long 0x7FFFFFFF
5.69 +
5.70 +test_ftrc_10: ! test < min -int
5.71 + add #1, r12
5.72 + mov.l test_ftrc_10_input_a, r0
5.73 + lds r0, fpul
5.74 + fsts fpul, fr8
5.75 + mov.l test_ftrc_10_input_b, r0
5.76 + lds r0, fpul
5.77 + fsts fpul, fr9
5.78 + ftrc fr8, fpul
5.79 + sts fpul, r2
5.80 + mov.l test_ftrc_10_result, r1
5.81 + cmp/eq r1, r2
5.82 + bt test_ftrc_11
5.83 +test_ftrc_10_fail:
5.84 + fail test_ftrc_str_k
5.85 + bra test_ftrc_11
5.86 + nop
5.87 +
5.88 +test_ftrc_10_input_a:
5.89 + .long 0xFE111111
5.90 +test_ftrc_10_input_b:
5.91 + .long 0x11111111
5.92 +test_ftrc_10_result:
5.93 + .long 0x80000000
5.94 +
5.95 +test_ftrc_11: ! test undefined instruction, pr=1
5.96 + add #1, r12
5.97 + mov.l test_ftrc_11_input_a, r0
5.98 + lds r0, fpul
5.99 + fsts fpul, fr0
5.100 + mov.l test_ftrc_11_input_b, r1
5.101 + lds r1, fpul
5.102 + fsts fpul, fr1
5.103 + mov.l test_ftrc_11_input_c, r0
5.104 + lds r0, fpul
5.105 + fsts fpul, fr2
5.106 + xor r0, r0
5.107 + not r0, r0
5.108 + lds r0, fpul
5.109 + ftrc fr1, fpul
5.110 + sts fpul, r1
5.111 + mov.l test_ftrc_11_result, r2
5.112 + cmp/eq r1, r2
5.113 + bt test_ftrc_end
5.114 +test_ftrc_11_fail:
5.115 + fail test_ftrc_str_k
5.116 + bra test_ftrc_end
5.117 + nop
5.118 +test_ftrc_11_input_a:
5.119 + .long 0x40FFFF11
5.120 +test_ftrc_11_input_b:
5.121 + .long 0x11111111
5.122 +test_ftrc_11_input_c:
5.123 + .long 0x42FFFF11
5.124 +test_ftrc_11_result:
5.125 + .long 0x00000000
5.126 +
5.127 test_ftrc_end:
5.128 end_test test_ftrc_str_k
5.129
6.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
6.2 +++ b/test/sh4/mac.s Thu Aug 23 12:31:31 2007 +0000
6.3 @@ -0,0 +1,262 @@
6.4 +.section .text
6.5 +.include "sh4/inc.s"
6.6 +!
6.7 +! Test MAC Rm,Rn operation
6.8 +!
6.9 +.global _test_mac
6.10 +_test_mac:
6.11 + start_test
6.12 +
6.13 +test_macl_1: ! Basic mac.l ops.
6.14 + add #1, r12
6.15 + clrmac
6.16 + clrs
6.17 + mov.l test_macl_1_inputs_k, r0
6.18 + mov.l test_macl_1_results_k, r6
6.19 + mov r0, r1
6.20 + mac.l @r0+, @r1+
6.21 + sts macl, r2
6.22 + sts mach, r3
6.23 + mov.l @r6+, r4
6.24 + cmp/eq r2, r4
6.25 + bf test_macl_1_fail
6.26 + xor r5, r5
6.27 + cmp/eq r3, r5
6.28 + bf test_macl_1_fail
6.29 + cmp/eq r0, r1
6.30 + bf test_macl_1_fail
6.31 + mov.l test_macl_1_inputs_k, r0
6.32 + cmp/eq r0, r1
6.33 + bt test_macl_1_fail
6.34 + add #-4, r1
6.35 + cmp/eq r0, r1
6.36 + bf test_macl_1_fail
6.37 +
6.38 + mac.l @r0+, @r0+
6.39 + sts macl, r2
6.40 + sts mach, r3
6.41 + mov.l @r6+, r4
6.42 + cmp/eq r2, r4
6.43 + bf test_macl_1_fail
6.44 + xor r5, r5
6.45 + cmp/eq r3, r5
6.46 + bf test_macl_1_fail
6.47 + add #8, r1
6.48 + cmp/eq r0, r1
6.49 + bf test_macl_1_fail
6.50 +
6.51 + mac.l @r0+, @r1+
6.52 + sts macl, r2
6.53 + sts mach, r3
6.54 + mov.l @r6+, r4
6.55 + cmp/eq r2, r4
6.56 + bf test_macl_1_fail
6.57 + mov.l @r6+, r5
6.58 + cmp/eq r3, r5
6.59 + bf test_macl_1_fail
6.60 + bra test_macl_2
6.61 + nop
6.62 +test_macl_1_fail:
6.63 + fail test_mac_str_k
6.64 + bra test_macl_2
6.65 + nop
6.66 +test_macl_1_inputs_k:
6.67 + .long test_macl_1_inputs
6.68 +test_macl_1_inputs:
6.69 + .long 0x00000010
6.70 + .long 0x00000021
6.71 + .long 0xF0000002
6.72 +test_macl_1_results_k:
6.73 + .long test_macl_1_results
6.74 +test_macl_1_results:
6.75 + .long 0x00000100
6.76 + .long 0x00000310
6.77 + .long 0xC0000314
6.78 + .long 0x00FFFFFF
6.79 +
6.80 +test_macl_2: ! Test saturation
6.81 + add #1, r12
6.82 + sets
6.83 + mova test_macl_2_results, r0
6.84 + mov r0, r3
6.85 + mova test_macl_2_inputs, r0
6.86 + mac.l @r0+, @r0+
6.87 + sts macl, r1
6.88 + mov.l @r3+, r2
6.89 + cmp/eq r1, r2
6.90 + bf test_macl_2_fail
6.91 + sts mach, r1
6.92 + mov.l @r3+, r2
6.93 + cmp/eq r1, r2
6.94 + bf test_macl_2_fail
6.95 + mov r0, r1
6.96 + mova test_macl_2_inputs, r0
6.97 + add #8, r0
6.98 + cmp/eq r0, r1
6.99 + bf test_macl_2_fail
6.100 +
6.101 + mac.l @r0+, @r0+
6.102 + sts macl, r1
6.103 + mov.l @r3+, r2
6.104 + cmp/eq r1, r2
6.105 + bf test_macl_2_fail
6.106 + sts mach, r1
6.107 + mov.l @r3+, r2
6.108 + cmp/eq r1, r2
6.109 + bt test_macw_1
6.110 +
6.111 +test_macl_2_fail:
6.112 + fail test_mac_str_k
6.113 + bra test_macw_1
6.114 + nop
6.115 +test_macl_2_inputs:
6.116 + .long 0x00000000
6.117 + .long 0x00000010
6.118 + .long 0x7FFFFFDB
6.119 + .long 0x800000EC
6.120 +
6.121 +test_macl_2_results:
6.122 + .long 0xFFFFFFFF
6.123 + .long 0x00007FFF
6.124 + .long 0x00000000
6.125 + .long 0xFFFF8000
6.126 +
6.127 +test_macw_1:
6.128 + add #1, r12
6.129 + clrs
6.130 + clrmac
6.131 +
6.132 + mova test_macw_1_results, r0
6.133 + mov r0, r4
6.134 + mova test_macw_1_inputs, r0
6.135 + mov r0, r1
6.136 + mac.w @r0+, @r1+
6.137 + sts macl, r2
6.138 + mov.l @r4+, r3
6.139 + cmp/eq r2, r3
6.140 + bf test_macw_1_fail
6.141 + sts mach, r2
6.142 + tst r2,r2
6.143 + bf test_macw_1_fail
6.144 + cmp/eq r0, r1
6.145 + bf test_macw_1_fail
6.146 + mova test_macw_1_inputs, r0
6.147 + add #-2, r1
6.148 + cmp/eq r0, r1
6.149 + bf test_macw_1_fail
6.150 +
6.151 + mac.w @r0+, @r0+
6.152 + sts macl, r2
6.153 + mov.l @r4+, r3
6.154 + cmp/eq r2, r3
6.155 + bf test_macw_1_fail
6.156 + sts mach, r2
6.157 + tst r2, r2
6.158 + bf test_macw_1_fail
6.159 + add #4, r1
6.160 + cmp/eq r0, r1
6.161 + bf test_macw_1_fail
6.162 +
6.163 + add #2, r1
6.164 + mac.w @r0+, @r1+
6.165 + sts macl, r2
6.166 + mov.l @r4+, r3
6.167 + cmp/eq r2, r3
6.168 + bf test_macw_1_fail
6.169 + sts mach, r2
6.170 + tst r2, r2
6.171 + bf test_macw_1_fail
6.172 + bra test_macw_2
6.173 + nop
6.174 +
6.175 +test_macw_1_fail:
6.176 + fail test_mac_str_k
6.177 + bra test_macw_2
6.178 + nop
6.179 +test_macw_1_inputs:
6.180 + .long 0x00210014
6.181 + .long 0x0002FFFF
6.182 +test_macw_1_results:
6.183 + .long 0x00000190
6.184 + .long 0x00000424
6.185 + .long 0x00000422
6.186 +
6.187 +test_macw_2:
6.188 + add #1, r12
6.189 + sets
6.190 + clrmac
6.191 + xor r0, r0
6.192 + not r0, r0
6.193 + lds r0, mach
6.194 +
6.195 + mova test_macw_2_results, r0
6.196 + mov r0, r3
6.197 + mova test_macw_2_inputs, r0
6.198 + mov #3, r6
6.199 +test_macw_2_loop:
6.200 + mac.w @r0+, @r0+
6.201 + sts macl, r1
6.202 + mov.l @r3+, r2
6.203 + cmp/eq r1, r2
6.204 + bf test_macw_2_fail
6.205 + sts mach, r1
6.206 + mov.l @r3+, r2
6.207 + cmp/eq r1, r2
6.208 + bf test_macw_2_fail
6.209 + dt r6
6.210 + bf test_macw_2_loop
6.211 +
6.212 + clrmac
6.213 + mov #3, r6
6.214 +test_macw_2_loop_2:
6.215 + mac.w @r0+, @r0+
6.216 + sts macl, r1
6.217 + mov.l @r3+, r2
6.218 + cmp/eq r1, r2
6.219 + bf test_macw_2_fail
6.220 + sts mach, r1
6.221 + mov.l @r3+, r2
6.222 + cmp/eq r1, r2
6.223 + bf test_macw_2_fail
6.224 + dt r6
6.225 + bf test_macw_2_loop_2
6.226 + bra test_mac_end
6.227 + nop
6.228 +
6.229 +test_macw_2_fail:
6.230 + fail test_mac_str_k
6.231 + bra test_mac_end
6.232 + nop
6.233 +test_macw_2_inputs:
6.234 + .long 0x7FFE7FFF
6.235 + .long 0x7FFF7FFD
6.236 + .long 0x7FFB7FFC
6.237 + .long 0x80007FF1
6.238 + .long 0x7FF28003
6.239 + .long 0x80047FF5
6.240 +test_macw_2_results:
6.241 + .long 0x3FFE8002
6.242 + .long 0xFFFFFFFF
6.243 + .long 0x7FFC8005
6.244 + .long 0xFFFFFFFF
6.245 + .long 0x7FFFFFFF
6.246 + .long 0x00000001
6.247 + .long 0xC0078000
6.248 + .long 0x00000000
6.249 + .long 0x800FFFD6
6.250 + .long 0x00000000
6.251 + .long 0x80000000
6.252 + .long 0x00000001
6.253 +
6.254 +test_mac_end:
6.255 + end_test test_mac_str_k
6.256 +
6.257 +test_mac_data_end:
6.258 + .align 4
6.259 +test_mac_data_end_k:
6.260 + .long test_mac_data_end
6.261 +test_mac_str_k:
6.262 + .long test_mac_str
6.263 +test_mac_str:
6.264 + .string "MAC"
6.265 +
6.266 \ No newline at end of file
7.1 --- a/test/sh4/testsh4.c Tue Feb 13 08:34:27 2007 +0000
7.2 +++ b/test/sh4/testsh4.c Thu Aug 23 12:31:31 2007 +0000
7.3 @@ -55,7 +55,9 @@
7.4 test_bt();
7.5 test_cmp();
7.6 test_float();
7.7 + test_fmov();
7.8 test_ftrc();
7.9 + test_mac();
7.10 fprintf( stdout, "--> %d/%d instruction tests passed (%d%%)\n\n",
7.11 total_tests-total_fails, total_tests,
7.12 ((total_tests-total_fails)*100)/total_tests );
8.1 --- a/test/sh4/undef.s Tue Feb 13 08:34:27 2007 +0000
8.2 +++ b/test/sh4/undef.s Thu Aug 23 12:31:31 2007 +0000
8.3 @@ -18,6 +18,28 @@
8.4 .word 0xFFFD
8.5 assert_exc_caught test_undef_str_k test_undef_1_pc
8.6
8.7 +test_undef_1a: ! 0xFFFD with FPU disabled - should still be an 0x180
8.8 + add #1, r12
8.9 + stc sr, r0
8.10 + xor r1, r1
8.11 + add #32, r1
8.12 + shll2 r1
8.13 + shll8 r1
8.14 + or r0, r1
8.15 + ldc r1, sr
8.16 + expect_exc 0x00000180
8.17 +test_undef_1a_pc:
8.18 + .word 0xFFFD
8.19 + assert_exc_caught test_undef_str_k test_undef_1a_pc
8.20 + stc sr, r0
8.21 + xor r1, r1
8.22 + add #32, r1
8.23 + shll2 r1
8.24 + shll8 r1
8.25 + not r1, r1
8.26 + and r0, r1
8.27 + ldc r1, sr
8.28 +
8.29 ! Gaps in the STC range (0x0nn2)
8.30 test_undef_2: ! 0x52
8.31 add #1, r12
.