Search
lxdream.org :: lxdream :: r1090:71e28626b358
lxdream 0.9.1
released Jun 29
Download Now
changeset1090:71e28626b358
parent1089:a3984d242909
child1091:186558374345
authornkeynes
dateMon Dec 07 17:44:27 2009 +1000 (11 years ago)
Prevent writes to the mmu page tables when the TLB is disabled.
src/sh4/mmu.c
test/sh4/testmmu.c
1.1 --- a/src/sh4/mmu.c Mon Dec 07 08:59:50 2009 +1000
1.2 +++ b/src/sh4/mmu.c Mon Dec 07 17:44:27 2009 +1000
1.3 @@ -208,7 +208,7 @@
1.4 void MMU_ldtlb()
1.5 {
1.6 int urc = mmu_read_urc();
1.7 - if( mmu_utlb[urc].flags & TLB_VALID )
1.8 + if( IS_TLB_ENABLED() && mmu_utlb[urc].flags & TLB_VALID )
1.9 mmu_utlb_remove_entry( urc );
1.10 mmu_utlb[urc].vpn = MMIO_READ(MMU, PTEH) & 0xFFFFFC00;
1.11 mmu_utlb[urc].asid = MMIO_READ(MMU, PTEH) & 0x000000FF;
1.12 @@ -216,7 +216,7 @@
1.13 mmu_utlb[urc].flags = MMIO_READ(MMU, PTEL) & 0x00001FF;
1.14 mmu_utlb[urc].pcmcia = MMIO_READ(MMU, PTEA);
1.15 mmu_utlb[urc].mask = get_tlb_size_mask(mmu_utlb[urc].flags);
1.16 - if( mmu_utlb[urc].flags & TLB_VALID )
1.17 + if( IS_TLB_ENABLED() && mmu_utlb[urc].flags & TLB_VALID )
1.18 mmu_utlb_insert_entry( urc );
1.19 }
1.20
1.21 @@ -1312,7 +1312,7 @@
1.22 ent->flags = ent->flags & ~(TLB_DIRTY|TLB_VALID);
1.23 ent->flags |= (val & TLB_VALID);
1.24 ent->flags |= ((val & 0x200)>>7);
1.25 - if( ((old_flags^ent->flags) & (TLB_VALID|TLB_DIRTY)) != 0 ) {
1.26 + if( IS_TLB_ENABLED() && ((old_flags^ent->flags) & (TLB_VALID|TLB_DIRTY)) != 0 ) {
1.27 if( old_flags & TLB_VALID )
1.28 mmu_utlb_remove_entry( utlb );
1.29 if( ent->flags & TLB_VALID )
1.30 @@ -1327,20 +1327,20 @@
1.31 }
1.32
1.33 if( itlb == -2 || utlb == -2 ) {
1.34 - RAISE_TLB_MULTIHIT_ERROR(addr);
1.35 + RAISE_TLB_MULTIHIT_ERROR(addr); /* FIXME: should this only be raised if TLB is enabled? */
1.36 EXCEPTION_EXIT();
1.37 return;
1.38 }
1.39 } else {
1.40 struct utlb_entry *ent = &mmu_utlb[UTLB_ENTRY(addr)];
1.41 - if( ent->flags & TLB_VALID )
1.42 + if( IS_TLB_ENABLED() && ent->flags & TLB_VALID )
1.43 mmu_utlb_remove_entry( UTLB_ENTRY(addr) );
1.44 ent->vpn = (val & 0xFFFFFC00);
1.45 ent->asid = (val & 0xFF);
1.46 ent->flags = (ent->flags & ~(TLB_DIRTY|TLB_VALID));
1.47 ent->flags |= (val & TLB_VALID);
1.48 ent->flags |= ((val & 0x200)>>7);
1.49 - if( ent->flags & TLB_VALID )
1.50 + if( IS_TLB_ENABLED() && ent->flags & TLB_VALID )
1.51 mmu_utlb_insert_entry( UTLB_ENTRY(addr) );
1.52 }
1.53 }
1.54 @@ -1351,12 +1351,12 @@
1.55 if( UTLB_DATA2(addr) ) {
1.56 ent->pcmcia = val & 0x0000000F;
1.57 } else {
1.58 - if( ent->flags & TLB_VALID )
1.59 + if( IS_TLB_ENABLED() && ent->flags & TLB_VALID )
1.60 mmu_utlb_remove_entry( UTLB_ENTRY(addr) );
1.61 ent->ppn = (val & 0x1FFFFC00);
1.62 ent->flags = (val & 0x000001FF);
1.63 ent->mask = get_tlb_size_mask(val);
1.64 - if( ent->flags & TLB_VALID )
1.65 + if( IS_TLB_ENABLED() && ent->flags & TLB_VALID )
1.66 mmu_utlb_insert_entry( UTLB_ENTRY(addr) );
1.67 }
1.68 }
2.1 --- a/test/sh4/testmmu.c Mon Dec 07 08:59:50 2009 +1000
2.2 +++ b/test/sh4/testmmu.c Mon Dec 07 17:44:27 2009 +1000
2.3 @@ -68,9 +68,14 @@
2.4 {
2.5 /* Non-TLB behaviour tests */
2.6
2.7 + install_utlb_test_handler();
2.8
2.9 + /* TLB off tests (make sure the MMU _stays_ off) */
2.10 + LOAD( 62, 0, 0x0C000000, 0x0CFFFC00, TLB_VALID|TLB_USERMODE|TLB_WRITABLE|TLB_SIZE_1K|TLB_CACHEABLE|TLB_DIRTY );
2.11 + TEST( "TLB OFF", 0, 0x0C000018, 0x0C000018, OK, OK, OK, OK );
2.12 + TEST( "TLB OFF", 1, 0x0C000018, 0x0C000018, OK, OK, OK, OK );
2.13 +
2.14 /* TLB tests */
2.15 - install_utlb_test_handler();
2.16 invalidate_tlb();
2.17 /* Permanently map the first and last MB of RAM into userspace - without
2.18 * this it's a bit hard to actually run any user-mode tests.
.