revision 914:72abecf5a315
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raw | bz2 | zip | gz changeset | 914:72abecf5a315 |
parent | 913:edc494bde24b |
child | 915:c989eb4c22d8 |
author | nkeynes |
date | Wed Nov 05 10:05:08 2008 +0000 (15 years ago) |
Fix (extremely boneheaded) failure to convert pc to physical address before
storing in the translation cache (in other words, the translation cache was
effectively disabled for MMU code). MMU code is now about 3 times faster...
storing in the translation cache (in other words, the translation cache was
effectively disabled for MMU code). MMU code is now about 3 times faster...
1.1 --- a/src/sh4/sh4trans.c Fri Oct 31 03:27:43 2008 +00001.2 +++ b/src/sh4/sh4trans.c Wed Nov 05 10:05:08 2008 +00001.3 @@ -78,6 +78,7 @@1.4 * Translate a linear basic block, ie all instructions from the start address1.5 * (inclusive) until the next branch/jump instruction or the end of the page1.6 * is reached.1.7 + * @param start VMA of the block start (which must already be in the icache)1.8 * @return the address of the translated block1.9 * eg due to lack of buffer space.1.10 */1.11 @@ -86,7 +87,7 @@1.12 sh4addr_t pc = start;1.13 sh4addr_t lastpc = (pc&0xFFFFF000)+0x1000;1.14 int done, i;1.15 - xlat_current_block = xlat_start_block( start );1.16 + xlat_current_block = xlat_start_block( GET_ICACHE_PHYS(start) );1.17 xlat_output = (uint8_t *)xlat_current_block->code;1.18 xlat_recovery_posn = 0;1.19 uint8_t *eob = xlat_output + xlat_current_block->size;
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