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lxdream.org :: lxdream :: r284:808617ee7135
lxdream 0.9.1
released Jun 29
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changeset284:808617ee7135
parent283:b1fbeaaff6bb
child285:4fefedafebc6
authornkeynes
dateMon Jan 15 08:32:09 2007 +0000 (12 years ago)
Break vram routines out into pvr2mem.c
Initial (untested) implementation of stride textures
Hookup YUV converter code in pvr2.c
src/Makefile.am
src/Makefile.in
src/pvr2/pvr2.c
src/pvr2/pvr2.h
src/pvr2/pvr2mem.c
src/pvr2/texcache.c
src/pvr2/yuv.c
1.1 --- a/src/Makefile.am Mon Jan 15 08:30:50 2007 +0000
1.2 +++ b/src/Makefile.am Mon Jan 15 08:32:09 2007 +0000
1.3 @@ -21,7 +21,7 @@
1.4 sh4/sh4mmio.c sh4/sh4mmio.h sh4/scif.c \
1.5 aica/armcore.c aica/armcore.h aica/armdasm.c aica/armmem.c \
1.6 aica/aica.c aica/aica.h aica/audio.c aica/audio.h \
1.7 - pvr2/pvr2.c pvr2/pvr2.h \
1.8 + pvr2/pvr2.c pvr2/pvr2.h pvr2/pvr2mem.c \
1.9 pvr2/tacore.c pvr2/render.c pvr2/rendcore.c pvr2/rendbkg.c pvr2/rendsort.c \
1.10 pvr2/texcache.c pvr2/yuv.c \
1.11 maple/maple.c maple/maple.h \
2.1 --- a/src/Makefile.in Mon Jan 15 08:30:50 2007 +0000
2.2 +++ b/src/Makefile.in Mon Jan 15 08:32:09 2007 +0000
2.3 @@ -155,7 +155,7 @@
2.4 sh4/sh4mmio.c sh4/sh4mmio.h sh4/scif.c \
2.5 aica/armcore.c aica/armcore.h aica/armdasm.c aica/armmem.c \
2.6 aica/aica.c aica/aica.h aica/audio.c aica/audio.h \
2.7 - pvr2/pvr2.c pvr2/pvr2.h \
2.8 + pvr2/pvr2.c pvr2/pvr2.h pvr2/pvr2mem.c \
2.9 pvr2/tacore.c pvr2/render.c pvr2/rendcore.c pvr2/rendbkg.c pvr2/rendsort.c \
2.10 pvr2/texcache.c pvr2/yuv.c \
2.11 maple/maple.c maple/maple.h \
2.12 @@ -192,16 +192,16 @@
2.13 timer.$(OBJEXT) dmac.$(OBJEXT) sh4core.$(OBJEXT) \
2.14 sh4dasm.$(OBJEXT) sh4mmio.$(OBJEXT) scif.$(OBJEXT) \
2.15 armcore.$(OBJEXT) armdasm.$(OBJEXT) armmem.$(OBJEXT) \
2.16 - aica.$(OBJEXT) audio.$(OBJEXT) pvr2.$(OBJEXT) tacore.$(OBJEXT) \
2.17 - render.$(OBJEXT) rendcore.$(OBJEXT) rendbkg.$(OBJEXT) \
2.18 - rendsort.$(OBJEXT) texcache.$(OBJEXT) yuv.$(OBJEXT) \
2.19 - maple.$(OBJEXT) controller.$(OBJEXT) support.$(OBJEXT) \
2.20 - interface.$(OBJEXT) callbacks.$(OBJEXT) gui.$(OBJEXT) \
2.21 - mmr_win.$(OBJEXT) debug_win.$(OBJEXT) dump_win.$(OBJEXT) \
2.22 - loader.$(OBJEXT) bootstrap.$(OBJEXT) util.$(OBJEXT) \
2.23 - display.$(OBJEXT) audio_null.$(OBJEXT) audio_esd.$(OBJEXT) \
2.24 - video_null.$(OBJEXT) video_gtk.$(OBJEXT) video_x11.$(OBJEXT) \
2.25 - video_gl.$(OBJEXT)
2.26 + aica.$(OBJEXT) audio.$(OBJEXT) pvr2.$(OBJEXT) pvr2mem.$(OBJEXT) \
2.27 + tacore.$(OBJEXT) render.$(OBJEXT) rendcore.$(OBJEXT) \
2.28 + rendbkg.$(OBJEXT) rendsort.$(OBJEXT) texcache.$(OBJEXT) \
2.29 + yuv.$(OBJEXT) maple.$(OBJEXT) controller.$(OBJEXT) \
2.30 + support.$(OBJEXT) interface.$(OBJEXT) callbacks.$(OBJEXT) \
2.31 + gui.$(OBJEXT) mmr_win.$(OBJEXT) debug_win.$(OBJEXT) \
2.32 + dump_win.$(OBJEXT) loader.$(OBJEXT) bootstrap.$(OBJEXT) \
2.33 + util.$(OBJEXT) display.$(OBJEXT) audio_null.$(OBJEXT) \
2.34 + audio_esd.$(OBJEXT) video_null.$(OBJEXT) video_gtk.$(OBJEXT) \
2.35 + video_x11.$(OBJEXT) video_gl.$(OBJEXT)
2.36 lxdream_OBJECTS = $(am_lxdream_OBJECTS)
2.37 lxdream_DEPENDENCIES =
2.38 lxdream_LDFLAGS =
2.39 @@ -225,17 +225,18 @@
2.40 @AMDEP_TRUE@ ./$(DEPDIR)/loader.Po ./$(DEPDIR)/main.Po \
2.41 @AMDEP_TRUE@ ./$(DEPDIR)/maple.Po ./$(DEPDIR)/mem.Po \
2.42 @AMDEP_TRUE@ ./$(DEPDIR)/mmr_win.Po ./$(DEPDIR)/nrg.Po \
2.43 -@AMDEP_TRUE@ ./$(DEPDIR)/pvr2.Po ./$(DEPDIR)/rendbkg.Po \
2.44 -@AMDEP_TRUE@ ./$(DEPDIR)/rendcore.Po ./$(DEPDIR)/render.Po \
2.45 -@AMDEP_TRUE@ ./$(DEPDIR)/rendsort.Po ./$(DEPDIR)/scif.Po \
2.46 -@AMDEP_TRUE@ ./$(DEPDIR)/sh4core.Po ./$(DEPDIR)/sh4dasm.Po \
2.47 -@AMDEP_TRUE@ ./$(DEPDIR)/sh4mem.Po ./$(DEPDIR)/sh4mmio.Po \
2.48 -@AMDEP_TRUE@ ./$(DEPDIR)/support.Po ./$(DEPDIR)/syscall.Po \
2.49 -@AMDEP_TRUE@ ./$(DEPDIR)/tacore.Po ./$(DEPDIR)/texcache.Po \
2.50 -@AMDEP_TRUE@ ./$(DEPDIR)/timer.Po ./$(DEPDIR)/util.Po \
2.51 -@AMDEP_TRUE@ ./$(DEPDIR)/video_gl.Po ./$(DEPDIR)/video_gtk.Po \
2.52 -@AMDEP_TRUE@ ./$(DEPDIR)/video_null.Po ./$(DEPDIR)/video_x11.Po \
2.53 -@AMDEP_TRUE@ ./$(DEPDIR)/watch.Po ./$(DEPDIR)/yuv.Po
2.54 +@AMDEP_TRUE@ ./$(DEPDIR)/pvr2.Po ./$(DEPDIR)/pvr2mem.Po \
2.55 +@AMDEP_TRUE@ ./$(DEPDIR)/rendbkg.Po ./$(DEPDIR)/rendcore.Po \
2.56 +@AMDEP_TRUE@ ./$(DEPDIR)/render.Po ./$(DEPDIR)/rendsort.Po \
2.57 +@AMDEP_TRUE@ ./$(DEPDIR)/scif.Po ./$(DEPDIR)/sh4core.Po \
2.58 +@AMDEP_TRUE@ ./$(DEPDIR)/sh4dasm.Po ./$(DEPDIR)/sh4mem.Po \
2.59 +@AMDEP_TRUE@ ./$(DEPDIR)/sh4mmio.Po ./$(DEPDIR)/support.Po \
2.60 +@AMDEP_TRUE@ ./$(DEPDIR)/syscall.Po ./$(DEPDIR)/tacore.Po \
2.61 +@AMDEP_TRUE@ ./$(DEPDIR)/texcache.Po ./$(DEPDIR)/timer.Po \
2.62 +@AMDEP_TRUE@ ./$(DEPDIR)/util.Po ./$(DEPDIR)/video_gl.Po \
2.63 +@AMDEP_TRUE@ ./$(DEPDIR)/video_gtk.Po ./$(DEPDIR)/video_null.Po \
2.64 +@AMDEP_TRUE@ ./$(DEPDIR)/video_x11.Po ./$(DEPDIR)/watch.Po \
2.65 +@AMDEP_TRUE@ ./$(DEPDIR)/yuv.Po
2.66 COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
2.67 $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
2.68 CCLD = $(CC)
2.69 @@ -320,6 +321,7 @@
2.70 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mmr_win.Po@am__quote@
2.71 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nrg.Po@am__quote@
2.72 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pvr2.Po@am__quote@
2.73 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pvr2mem.Po@am__quote@
2.74 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/rendbkg.Po@am__quote@
2.75 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/rendcore.Po@am__quote@
2.76 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/render.Po@am__quote@
2.77 @@ -782,6 +784,28 @@
2.78 @AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
2.79 @am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o pvr2.obj `if test -f 'pvr2/pvr2.c'; then $(CYGPATH_W) 'pvr2/pvr2.c'; else $(CYGPATH_W) '$(srcdir)/pvr2/pvr2.c'; fi`
2.80
2.81 +pvr2mem.o: pvr2/pvr2mem.c
2.82 +@am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT pvr2mem.o -MD -MP -MF "$(DEPDIR)/pvr2mem.Tpo" \
2.83 +@am__fastdepCC_TRUE@ -c -o pvr2mem.o `test -f 'pvr2/pvr2mem.c' || echo '$(srcdir)/'`pvr2/pvr2mem.c; \
2.84 +@am__fastdepCC_TRUE@ then mv -f "$(DEPDIR)/pvr2mem.Tpo" "$(DEPDIR)/pvr2mem.Po"; \
2.85 +@am__fastdepCC_TRUE@ else rm -f "$(DEPDIR)/pvr2mem.Tpo"; exit 1; \
2.86 +@am__fastdepCC_TRUE@ fi
2.87 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='pvr2/pvr2mem.c' object='pvr2mem.o' libtool=no @AMDEPBACKSLASH@
2.88 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ depfile='$(DEPDIR)/pvr2mem.Po' tmpdepfile='$(DEPDIR)/pvr2mem.TPo' @AMDEPBACKSLASH@
2.89 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
2.90 +@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o pvr2mem.o `test -f 'pvr2/pvr2mem.c' || echo '$(srcdir)/'`pvr2/pvr2mem.c
2.91 +
2.92 +pvr2mem.obj: pvr2/pvr2mem.c
2.93 +@am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT pvr2mem.obj -MD -MP -MF "$(DEPDIR)/pvr2mem.Tpo" \
2.94 +@am__fastdepCC_TRUE@ -c -o pvr2mem.obj `if test -f 'pvr2/pvr2mem.c'; then $(CYGPATH_W) 'pvr2/pvr2mem.c'; else $(CYGPATH_W) '$(srcdir)/pvr2/pvr2mem.c'; fi`; \
2.95 +@am__fastdepCC_TRUE@ then mv -f "$(DEPDIR)/pvr2mem.Tpo" "$(DEPDIR)/pvr2mem.Po"; \
2.96 +@am__fastdepCC_TRUE@ else rm -f "$(DEPDIR)/pvr2mem.Tpo"; exit 1; \
2.97 +@am__fastdepCC_TRUE@ fi
2.98 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='pvr2/pvr2mem.c' object='pvr2mem.obj' libtool=no @AMDEPBACKSLASH@
2.99 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ depfile='$(DEPDIR)/pvr2mem.Po' tmpdepfile='$(DEPDIR)/pvr2mem.TPo' @AMDEPBACKSLASH@
2.100 +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
2.101 +@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o pvr2mem.obj `if test -f 'pvr2/pvr2mem.c'; then $(CYGPATH_W) 'pvr2/pvr2mem.c'; else $(CYGPATH_W) '$(srcdir)/pvr2/pvr2mem.c'; fi`
2.102 +
2.103 tacore.o: pvr2/tacore.c
2.104 @am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tacore.o -MD -MP -MF "$(DEPDIR)/tacore.Tpo" \
2.105 @am__fastdepCC_TRUE@ -c -o tacore.o `test -f 'pvr2/tacore.c' || echo '$(srcdir)/'`pvr2/tacore.c; \
3.1 --- a/src/pvr2/pvr2.c Mon Jan 15 08:30:50 2007 +0000
3.2 +++ b/src/pvr2/pvr2.c Mon Jan 15 08:32:09 2007 +0000
3.3 @@ -1,5 +1,5 @@
3.4 /**
3.5 - * $Id: pvr2.c,v 1.38 2007-01-14 11:43:00 nkeynes Exp $
3.6 + * $Id: pvr2.c,v 1.39 2007-01-15 08:32:09 nkeynes Exp $
3.7 *
3.8 * PVR2 (Video) Core module implementation and MMIO registers.
3.9 *
3.10 @@ -137,6 +137,8 @@
3.11 pvr2_state.back_porch_ns = 4000;
3.12 mmio_region_PVR2_write( DISP_TOTAL, 0x0270035F );
3.13 mmio_region_PVR2_write( DISP_SYNCTIME, 0x07D6A53F );
3.14 + mmio_region_PVR2_write( YUV_ADDR, 0 );
3.15 + mmio_region_PVR2_write( YUV_CFG, 0 );
3.16 video_buffer_idx = 0;
3.17
3.18 pvr2_ta_init();
3.19 @@ -466,18 +468,19 @@
3.20 * 10: ???
3.21 * 16: enable FSAA
3.22 */
3.23 - DEBUG( "Scaler config set to %08X", val );
3.24 MMIO_WRITE( PVR2, reg, val&0x0007FFFF );
3.25 break;
3.26
3.27 case YUV_ADDR:
3.28 - MMIO_WRITE( PVR2, reg, val&0x00FFFFF8 );
3.29 + val = val & 0x00FFFFF8;
3.30 + MMIO_WRITE( PVR2, reg, val );
3.31 + pvr2_yuv_init( val );
3.32 break;
3.33 case YUV_CFG:
3.34 MMIO_WRITE( PVR2, reg, val&0x01013F3F );
3.35 + pvr2_yuv_set_config(val);
3.36 break;
3.37
3.38 -
3.39 /**************** Unknowns ***************/
3.40 case PVRUNK1:
3.41 MMIO_WRITE( PVR2, reg, val&0x000007FF );
3.42 @@ -634,155 +637,3 @@
3.43 pvr2_ta_write( (char *)&val, sizeof(uint32_t) );
3.44 }
3.45
3.46 -
3.47 -void pvr2_vram64_write( sh4addr_t destaddr, char *src, uint32_t length )
3.48 -{
3.49 - int bank_flag = (destaddr & 0x04) >> 2;
3.50 - uint32_t *banks[2];
3.51 - uint32_t *dwsrc;
3.52 - int i;
3.53 -
3.54 - destaddr = destaddr & 0x7FFFFF;
3.55 - if( destaddr + length > 0x800000 ) {
3.56 - length = 0x800000 - destaddr;
3.57 - }
3.58 -
3.59 - for( i=destaddr & 0xFFFFF000; i < destaddr + length; i+= PAGE_SIZE ) {
3.60 - texcache_invalidate_page( i );
3.61 - }
3.62 -
3.63 - banks[0] = ((uint32_t *)(video_base + ((destaddr & 0x007FFFF8) >>1)));
3.64 - banks[1] = banks[0] + 0x100000;
3.65 - if( bank_flag )
3.66 - banks[0]++;
3.67 -
3.68 - /* Handle non-aligned start of source */
3.69 - if( destaddr & 0x03 ) {
3.70 - char *dest = ((char *)banks[bank_flag]) + (destaddr & 0x03);
3.71 - for( i= destaddr & 0x03; i < 4 && length > 0; i++, length-- ) {
3.72 - *dest++ = *src++;
3.73 - }
3.74 - bank_flag = !bank_flag;
3.75 - }
3.76 -
3.77 - dwsrc = (uint32_t *)src;
3.78 - while( length >= 4 ) {
3.79 - *banks[bank_flag]++ = *dwsrc++;
3.80 - bank_flag = !bank_flag;
3.81 - length -= 4;
3.82 - }
3.83 -
3.84 - /* Handle non-aligned end of source */
3.85 - if( length ) {
3.86 - src = (char *)dwsrc;
3.87 - char *dest = (char *)banks[bank_flag];
3.88 - while( length-- > 0 ) {
3.89 - *dest++ = *src++;
3.90 - }
3.91 - }
3.92 -}
3.93 -
3.94 -/**
3.95 - * Write an image to 64-bit vram, with a line-stride different from the line-size.
3.96 - * The destaddr must be 32-bit aligned, and both line_bytes and line_stride_bytes
3.97 - * must be multiples of 4.
3.98 - */
3.99 -void pvr2_vram64_write_stride( sh4addr_t destaddr, char *src, uint32_t line_bytes,
3.100 - uint32_t line_stride_bytes, uint32_t line_count )
3.101 -{
3.102 - int bank_flag = (destaddr & 0x04) >> 2;
3.103 - uint32_t *banks[2];
3.104 - uint32_t *dwsrc;
3.105 - uint32_t line_gap;
3.106 - int line_gap_flag;
3.107 - int i,j;
3.108 -
3.109 - destaddr = destaddr & 0x7FFFF8;
3.110 - i = line_stride_bytes - line_bytes;
3.111 - line_gap_flag = i & 0x04;
3.112 - line_gap = i >> 3;
3.113 -
3.114 -
3.115 - for( i=destaddr & 0xFFFFF000; i < destaddr + line_stride_bytes*line_count; i+= PAGE_SIZE ) {
3.116 - texcache_invalidate_page( i );
3.117 - }
3.118 -
3.119 - banks[0] = (uint32_t *)(video_base + (destaddr >>1));
3.120 - banks[1] = banks[0] + 0x100000;
3.121 - if( bank_flag )
3.122 - banks[0]++;
3.123 -
3.124 - dwsrc = (uint32_t *)src;
3.125 - for( i=0; i<line_count; i++ ) {
3.126 - for( j=0; j<line_bytes; j++ ) {
3.127 - *banks[bank_flag]++ = *dwsrc++;
3.128 - bank_flag = !bank_flag;
3.129 - }
3.130 - *banks[0] += line_gap;
3.131 - *banks[1] += line_gap;
3.132 - if( line_gap_flag ) {
3.133 - *banks[bank_flag]++;
3.134 - bank_flag = !bank_flag;
3.135 - }
3.136 - }
3.137 -}
3.138 -
3.139 -void pvr2_vram_write_invert( sh4addr_t destaddr, char *src, uint32_t length, uint32_t line_length )
3.140 -{
3.141 - char *dest = video_base + (destaddr & 0x007FFFFF);
3.142 - char *p = src + length - line_length;
3.143 - while( p >= src ) {
3.144 - memcpy( dest, p, line_length );
3.145 - p -= line_length;
3.146 - dest += line_length;
3.147 - }
3.148 -}
3.149 -
3.150 -void pvr2_vram64_read( char *dest, sh4addr_t srcaddr, uint32_t length )
3.151 -{
3.152 - int bank_flag = (srcaddr & 0x04) >> 2;
3.153 - uint32_t *banks[2];
3.154 - uint32_t *dwdest;
3.155 - int i;
3.156 -
3.157 - srcaddr = srcaddr & 0x7FFFFF;
3.158 - if( srcaddr + length > 0x800000 )
3.159 - length = 0x800000 - srcaddr;
3.160 -
3.161 - banks[0] = ((uint32_t *)(video_base + ((srcaddr&0x007FFFF8)>>1)));
3.162 - banks[1] = banks[0] + 0x100000;
3.163 - if( bank_flag )
3.164 - banks[0]++;
3.165 -
3.166 - /* Handle non-aligned start of source */
3.167 - if( srcaddr & 0x03 ) {
3.168 - char *src = ((char *)banks[bank_flag]) + (srcaddr & 0x03);
3.169 - for( i= srcaddr & 0x03; i < 4 && length > 0; i++, length-- ) {
3.170 - *dest++ = *src++;
3.171 - }
3.172 - bank_flag = !bank_flag;
3.173 - }
3.174 -
3.175 - dwdest = (uint32_t *)dest;
3.176 - while( length >= 4 ) {
3.177 - *dwdest++ = *banks[bank_flag]++;
3.178 - bank_flag = !bank_flag;
3.179 - length -= 4;
3.180 - }
3.181 -
3.182 - /* Handle non-aligned end of source */
3.183 - if( length ) {
3.184 - dest = (char *)dwdest;
3.185 - char *src = (char *)banks[bank_flag];
3.186 - while( length-- > 0 ) {
3.187 - *dest++ = *src++;
3.188 - }
3.189 - }
3.190 -}
3.191 -
3.192 -void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f )
3.193 -{
3.194 - char tmp[length];
3.195 - pvr2_vram64_read( tmp, addr, length );
3.196 - fwrite_dump( tmp, length, f );
3.197 -}
4.1 --- a/src/pvr2/pvr2.h Mon Jan 15 08:30:50 2007 +0000
4.2 +++ b/src/pvr2/pvr2.h Mon Jan 15 08:32:09 2007 +0000
4.3 @@ -1,5 +1,5 @@
4.4 /**
4.5 - * $Id: pvr2.h,v 1.19 2007-01-14 11:43:00 nkeynes Exp $
4.6 + * $Id: pvr2.h,v 1.20 2007-01-15 08:32:09 nkeynes Exp $
4.7 *
4.8 * PVR2 (video chip) functions and macros.
4.9 *
4.10 @@ -100,11 +100,13 @@
4.11 #define PVR2_TEX_COMPRESSED 0x40000000
4.12 #define PVR2_TEX_FORMAT_MASK 0x38000000
4.13 #define PVR2_TEX_UNTWIDDLED 0x04000000
4.14 +#define PVR2_TEX_STRIDE 0x02000000
4.15
4.16 #define PVR2_TEX_ADDR(x) ( ((x)&0x01FFFFF)<<3 );
4.17 #define PVR2_TEX_IS_MIPMAPPED(x) ( (x) & PVR2_TEX_MIPMAP )
4.18 #define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED )
4.19 #define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0)
4.20 +#define PVR2_TEX_IS_STRIDE(x) (((x) & 0x06000000) == 0x06000000)
4.21
4.22 /****************************** Frame Buffer *****************************/
4.23
4.24 @@ -126,6 +128,15 @@
4.25 void pvr2_vram64_read( char *dest, sh4addr_t src, uint32_t length );
4.26
4.27 /**
4.28 + * Read an image from the interleaved memory address space (aka 64-bit address space)
4.29 + * where the source and destination line sizes may differ. Note that both byte
4.30 + * counts must be a multiple of 4, and the src address must be 32-bit aligned.
4.31 + */
4.32 +void pvr2_vram64_read_stride( char *dest, sh4addr_t src, uint32_t src_line_bytes,
4.33 + uint32_t dest_line_bytes, uint32_t line_count );
4.34 +
4.35 +
4.36 +/**
4.37 * Dump a portion of vram to a stream from the interleaved memory address
4.38 * space.
4.39 */
4.40 @@ -156,7 +167,9 @@
4.41 /**
4.42 * Initialize the YUV converter.
4.43 */
4.44 -void pvr2_yuv_init( uint32_t target_addr, uint32_t config );
4.45 +void pvr2_yuv_init( uint32_t target_addr );
4.46 +
4.47 +void pvr2_yuv_set_config( uint32_t config );
4.48
4.49 /********************************* Renderer ******************************/
4.50
5.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
5.2 +++ b/src/pvr2/pvr2mem.c Mon Jan 15 08:32:09 2007 +0000
5.3 @@ -0,0 +1,225 @@
5.4 +/**
5.5 + * $Id: pvr2mem.c,v 1.1 2007-01-15 08:32:09 nkeynes Exp $
5.6 + *
5.7 + * PVR2 (Video) VRAM handling routines (mainly for the 64-bit region)
5.8 + *
5.9 + * Copyright (c) 2005 Nathan Keynes.
5.10 + *
5.11 + * This program is free software; you can redistribute it and/or modify
5.12 + * it under the terms of the GNU General Public License as published by
5.13 + * the Free Software Foundation; either version 2 of the License, or
5.14 + * (at your option) any later version.
5.15 + *
5.16 + * This program is distributed in the hope that it will be useful,
5.17 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
5.18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5.19 + * GNU General Public License for more details.
5.20 + */
5.21 +#include "pvr2.h"
5.22 +
5.23 +extern char *video_base;
5.24 +
5.25 +void pvr2_vram64_write( sh4addr_t destaddr, char *src, uint32_t length )
5.26 +{
5.27 + int bank_flag = (destaddr & 0x04) >> 2;
5.28 + uint32_t *banks[2];
5.29 + uint32_t *dwsrc;
5.30 + int i;
5.31 +
5.32 + destaddr = destaddr & 0x7FFFFF;
5.33 + if( destaddr + length > 0x800000 ) {
5.34 + length = 0x800000 - destaddr;
5.35 + }
5.36 +
5.37 + for( i=destaddr & 0xFFFFF000; i < destaddr + length; i+= PAGE_SIZE ) {
5.38 + texcache_invalidate_page( i );
5.39 + }
5.40 +
5.41 + banks[0] = ((uint32_t *)(video_base + ((destaddr & 0x007FFFF8) >>1)));
5.42 + banks[1] = banks[0] + 0x100000;
5.43 + if( bank_flag )
5.44 + banks[0]++;
5.45 +
5.46 + /* Handle non-aligned start of source */
5.47 + if( destaddr & 0x03 ) {
5.48 + char *dest = ((char *)banks[bank_flag]) + (destaddr & 0x03);
5.49 + for( i= destaddr & 0x03; i < 4 && length > 0; i++, length-- ) {
5.50 + *dest++ = *src++;
5.51 + }
5.52 + bank_flag = !bank_flag;
5.53 + }
5.54 +
5.55 + dwsrc = (uint32_t *)src;
5.56 + while( length >= 4 ) {
5.57 + *banks[bank_flag]++ = *dwsrc++;
5.58 + bank_flag = !bank_flag;
5.59 + length -= 4;
5.60 + }
5.61 +
5.62 + /* Handle non-aligned end of source */
5.63 + if( length ) {
5.64 + src = (char *)dwsrc;
5.65 + char *dest = (char *)banks[bank_flag];
5.66 + while( length-- > 0 ) {
5.67 + *dest++ = *src++;
5.68 + }
5.69 + }
5.70 +}
5.71 +
5.72 +/**
5.73 + * Write an image to 64-bit vram, with a line-stride different from the line-size.
5.74 + * The destaddr must be 32-bit aligned, and both line_bytes and line_stride_bytes
5.75 + * must be multiples of 4.
5.76 + */
5.77 +void pvr2_vram64_write_stride( sh4addr_t destaddr, char *src, uint32_t line_bytes,
5.78 + uint32_t line_stride_bytes, uint32_t line_count )
5.79 +{
5.80 + int bank_flag = (destaddr & 0x04) >> 2;
5.81 + uint32_t *banks[2];
5.82 + uint32_t *dwsrc;
5.83 + uint32_t line_gap;
5.84 + int line_gap_flag;
5.85 + int i,j;
5.86 +
5.87 + destaddr = destaddr & 0x7FFFF8;
5.88 + i = line_stride_bytes - line_bytes;
5.89 + line_gap_flag = i & 0x04;
5.90 + line_gap = i >> 3;
5.91 + line_bytes >>= 2;
5.92 +
5.93 + for( i=destaddr & 0xFFFFF000; i < destaddr + line_stride_bytes*line_count; i+= PAGE_SIZE ) {
5.94 + texcache_invalidate_page( i );
5.95 + }
5.96 +
5.97 + banks[0] = (uint32_t *)(video_base + (destaddr >>1));
5.98 + banks[1] = banks[0] + 0x100000;
5.99 + if( bank_flag )
5.100 + banks[0]++;
5.101 +
5.102 + dwsrc = (uint32_t *)src;
5.103 + for( i=0; i<line_count; i++ ) {
5.104 + for( j=0; j<line_bytes; j++ ) {
5.105 + *banks[bank_flag]++ = *dwsrc++;
5.106 + bank_flag = !bank_flag;
5.107 + }
5.108 + *banks[0] += line_gap;
5.109 + *banks[1] += line_gap;
5.110 + if( line_gap_flag ) {
5.111 + *banks[bank_flag]++;
5.112 + bank_flag = !bank_flag;
5.113 + }
5.114 + }
5.115 +}
5.116 +
5.117 +/**
5.118 + * Read an image from 64-bit vram, with a destination line-stride different from the line-size.
5.119 + * The srcaddr must be 32-bit aligned, and both line_bytes and line_stride_bytes
5.120 + * must be multiples of 4. line_stride_bytes must be >= line_bytes.
5.121 + * This method is used to extract a "stride" texture from vram.
5.122 + */
5.123 +void pvr2_vram64_read_stride( char *dest, uint32_t dest_line_bytes, sh4addr_t srcaddr,
5.124 + uint32_t src_line_bytes, uint32_t line_count )
5.125 +{
5.126 + int bank_flag = (srcaddr & 0x04) >> 2;
5.127 + uint32_t *banks[2];
5.128 + uint32_t *dwdest;
5.129 + uint32_t dest_line_gap;
5.130 + uint32_t src_line_gap;
5.131 + uint32_t line_bytes;
5.132 + int src_line_gap_flag;
5.133 + int i,j;
5.134 +
5.135 + srcaddr = srcaddr & 0x7FFFF8;
5.136 + if( src_line_bytes <= dest_line_bytes ) {
5.137 + dest_line_gap = (dest_line_bytes - src_line_bytes) >> 2;
5.138 + src_line_gap = 0;
5.139 + src_line_gap_flag = 0;
5.140 + line_bytes = src_line_bytes >> 2;
5.141 + } else {
5.142 + i = (src_line_bytes - dest_line_bytes);
5.143 + src_line_gap_flag = i & 0x04;
5.144 + src_line_gap = i >> 3;
5.145 + line_bytes = dest_line_bytes >> 2;
5.146 + }
5.147 +
5.148 + banks[0] = (uint32_t *)(video_base + (srcaddr>>1));
5.149 + banks[1] = banks[0] + 0x100000;
5.150 + if( bank_flag )
5.151 + banks[0]++;
5.152 +
5.153 + dwdest = (uint32_t *)dest;
5.154 + for( i=0; i<line_count; i++ ) {
5.155 + for( j=0; j<line_bytes; j++ ) {
5.156 + *dwdest++ = *banks[bank_flag]++;
5.157 + bank_flag = !bank_flag;
5.158 + }
5.159 + dwdest += dest_line_gap;
5.160 + banks[0] += src_line_gap;
5.161 + banks[1] += src_line_gap;
5.162 + if( src_line_gap_flag ) {
5.163 + banks[bank_flag]++;
5.164 + bank_flag = !bank_flag;
5.165 + }
5.166 + }
5.167 +
5.168 +}
5.169 +
5.170 +void pvr2_vram_write_invert( sh4addr_t destaddr, char *src, uint32_t length, uint32_t line_length )
5.171 +{
5.172 + char *dest = video_base + (destaddr & 0x007FFFFF);
5.173 + char *p = src + length - line_length;
5.174 + while( p >= src ) {
5.175 + memcpy( dest, p, line_length );
5.176 + p -= line_length;
5.177 + dest += line_length;
5.178 + }
5.179 +}
5.180 +
5.181 +void pvr2_vram64_read( char *dest, sh4addr_t srcaddr, uint32_t length )
5.182 +{
5.183 + int bank_flag = (srcaddr & 0x04) >> 2;
5.184 + uint32_t *banks[2];
5.185 + uint32_t *dwdest;
5.186 + int i;
5.187 +
5.188 + srcaddr = srcaddr & 0x7FFFFF;
5.189 + if( srcaddr + length > 0x800000 )
5.190 + length = 0x800000 - srcaddr;
5.191 +
5.192 + banks[0] = ((uint32_t *)(video_base + ((srcaddr&0x007FFFF8)>>1)));
5.193 + banks[1] = banks[0] + 0x100000;
5.194 + if( bank_flag )
5.195 + banks[0]++;
5.196 +
5.197 + /* Handle non-aligned start of source */
5.198 + if( srcaddr & 0x03 ) {
5.199 + char *src = ((char *)banks[bank_flag]) + (srcaddr & 0x03);
5.200 + for( i= srcaddr & 0x03; i < 4 && length > 0; i++, length-- ) {
5.201 + *dest++ = *src++;
5.202 + }
5.203 + bank_flag = !bank_flag;
5.204 + }
5.205 +
5.206 + dwdest = (uint32_t *)dest;
5.207 + while( length >= 4 ) {
5.208 + *dwdest++ = *banks[bank_flag]++;
5.209 + bank_flag = !bank_flag;
5.210 + length -= 4;
5.211 + }
5.212 +
5.213 + /* Handle non-aligned end of source */
5.214 + if( length ) {
5.215 + dest = (char *)dwdest;
5.216 + char *src = (char *)banks[bank_flag];
5.217 + while( length-- > 0 ) {
5.218 + *dest++ = *src++;
5.219 + }
5.220 + }
5.221 +}
5.222 +
5.223 +void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f )
5.224 +{
5.225 + char tmp[length];
5.226 + pvr2_vram64_read( tmp, addr, length );
5.227 + fwrite_dump( tmp, length, f );
5.228 +}
6.1 --- a/src/pvr2/texcache.c Mon Jan 15 08:30:50 2007 +0000
6.2 +++ b/src/pvr2/texcache.c Mon Jan 15 08:32:09 2007 +0000
6.3 @@ -1,5 +1,5 @@
6.4 /**
6.5 - * $Id: texcache.c,v 1.10 2007-01-14 11:43:00 nkeynes Exp $
6.6 + * $Id: texcache.c,v 1.11 2007-01-15 08:32:09 nkeynes Exp $
6.7 *
6.8 * Texture cache. Responsible for maintaining a working set of OpenGL
6.9 * textures.
6.10 @@ -322,8 +322,7 @@
6.11 */
6.12 static texcache_load_texture( uint32_t texture_addr, int width, int height,
6.13 int mode ) {
6.14 - uint32_t bytes = width * height;
6.15 - int shift = 1;
6.16 + int bpp_shift = 1; /* bytes per (output) pixel as a power of 2 */
6.17 GLint intFormat, format, type;
6.18 int tex_format = mode & PVR2_TEX_FORMAT_MASK;
6.19 struct vq_codebook codebook;
6.20 @@ -334,52 +333,54 @@
6.21 case PVR2_TEX_FORMAT_IDX4:
6.22 ERROR( "4-bit indexed textures not supported" );
6.23 case PVR2_TEX_FORMAT_IDX8:
6.24 + /* For indexed-colour modes, we need to lookup the palette control
6.25 + * word to determine the de-indexed texture format.
6.26 + */
6.27 switch( MMIO_READ( PVR2, RENDER_PALETTE ) & 0x03 ) {
6.28 case 0: /* ARGB1555 */
6.29 intFormat = GL_RGB5_A1;
6.30 format = GL_RGBA;
6.31 type = GL_UNSIGNED_SHORT_1_5_5_5_REV;
6.32 break;
6.33 - case 1:
6.34 + case 1: /* RGB565 */
6.35 intFormat = GL_RGB;
6.36 format = GL_RGB;
6.37 type = GL_UNSIGNED_SHORT_5_6_5_REV;
6.38 break;
6.39 - case 2:
6.40 + case 2: /* ARGB4444 */
6.41 intFormat = GL_RGBA4;
6.42 format = GL_BGRA;
6.43 type = GL_UNSIGNED_SHORT_4_4_4_4_REV;
6.44 break;
6.45 - case 3:
6.46 + case 3: /* ARGB8888 */
6.47 intFormat = GL_RGBA8;
6.48 format = GL_BGRA;
6.49 type = GL_UNSIGNED_INT_8_8_8_8_REV;
6.50 - shift = 2;
6.51 + bpp_shift = 2;
6.52 break;
6.53 }
6.54 - bytes <<= shift;
6.55 break;
6.56
6.57 case PVR2_TEX_FORMAT_ARGB1555:
6.58 - bytes <<= 1;
6.59 intFormat = GL_RGB5_A1;
6.60 format = GL_RGBA;
6.61 type = GL_UNSIGNED_SHORT_1_5_5_5_REV;
6.62 break;
6.63 case PVR2_TEX_FORMAT_RGB565:
6.64 - bytes <<= 1;
6.65 intFormat = GL_RGB;
6.66 format = GL_RGB;
6.67 type = GL_UNSIGNED_SHORT_5_6_5_REV;
6.68 break;
6.69 case PVR2_TEX_FORMAT_ARGB4444:
6.70 - bytes <<= 1;
6.71 intFormat = GL_RGBA4;
6.72 format = GL_BGRA;
6.73 type = GL_UNSIGNED_SHORT_4_4_4_4_REV;
6.74 break;
6.75 case PVR2_TEX_FORMAT_YUV422:
6.76 - bytes <<= 2;
6.77 + /* YUV422 isn't directly supported by most implementations, so decode
6.78 + * it to a (reasonably) standard ARGB32.
6.79 + */
6.80 + bpp_shift = 2;
6.81 intFormat = GL_RGBA8;
6.82 format = GL_BGRA;
6.83 type = GL_UNSIGNED_INT_8_8_8_8_REV;
6.84 @@ -389,16 +390,33 @@
6.85 break;
6.86 }
6.87
6.88 - int level=0, last_level = 0, mip_width = width, mip_height = height, mip_bytes = bytes;
6.89 + if( PVR2_TEX_IS_STRIDE(mode) ) {
6.90 + /* Stride textures cannot be mip-mapped, compressed, indexed or twiddled */
6.91 + uint32_t stride = (MMIO_READ( PVR2, RENDER_TEXSIZE ) & 0x003F) << 5;
6.92 + char data[(width*height) << bpp_shift];
6.93 + if( tex_format == PVR2_TEX_FORMAT_YUV422 ) {
6.94 + char tmp[(width*height)<<1];
6.95 + pvr2_vram64_read_stride( &tmp, width<<1, texture_addr, stride<<1, height );
6.96 + yuv_decode(width, height, &tmp, &data );
6.97 + } else {
6.98 + pvr2_vram64_read_stride( &data, width<<bpp_shift, texture_addr, stride<<bpp_shift, height );
6.99 + }
6.100 + glTexImage2D( GL_TEXTURE_2D, 0, intFormat, width, height, 0, format, type, data );
6.101 + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, filter);
6.102 + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_LINEAR);
6.103 + return;
6.104 + }
6.105 +
6.106 + int level=0, last_level = 0, mip_width = width, mip_height = height, mip_bytes;
6.107 if( PVR2_TEX_IS_MIPMAPPED(mode) ) {
6.108 int i;
6.109 for( i=0; 1<<(i+1) < width; i++ );
6.110 last_level = i;
6.111 mip_width = width >> i;
6.112 mip_height= height >> i;
6.113 - mip_bytes = bytes >> (i*2);
6.114 filter = GL_LINEAR_MIPMAP_LINEAR;
6.115 }
6.116 + mip_bytes = (mip_width * mip_width) << bpp_shift;
6.117
6.118 if( PVR2_TEX_IS_COMPRESSED(mode) ) {
6.119 uint16_t tmp[VQ_CODEBOOK_SIZE];
6.120 @@ -411,13 +429,13 @@
6.121 char data[mip_bytes];
6.122 /* load data from image, detwiddling/uncompressing as required */
6.123 if( tex_format == PVR2_TEX_FORMAT_IDX8 ) {
6.124 - int inputlength = mip_bytes >> shift;
6.125 + int inputlength = mip_bytes >> bpp_shift;
6.126 int bank = (mode >> 25) &0x03;
6.127 - char *palette = mmio_region_PVR2PAL.mem + (bank * (256 << shift));
6.128 + char *palette = mmio_region_PVR2PAL.mem + (bank * (256 << bpp_shift));
6.129 char tmp[inputlength];
6.130 char *p = tmp;
6.131 pvr2_vram64_read( tmp, texture_addr, inputlength );
6.132 - if( shift == 2 ) {
6.133 + if( bpp_shift == 2 ) {
6.134 detwiddle_pal8_to_32( 0, 0, mip_width, mip_width, &p,
6.135 (uint32_t *)data, (uint32_t *)palette );
6.136 } else {
7.1 --- a/src/pvr2/yuv.c Mon Jan 15 08:30:50 2007 +0000
7.2 +++ b/src/pvr2/yuv.c Mon Jan 15 08:32:09 2007 +0000
7.3 @@ -1,5 +1,5 @@
7.4 /**
7.5 - * $Id: yuv.c,v 1.2 2007-01-14 11:43:00 nkeynes Exp $
7.6 + * $Id: yuv.c,v 1.3 2007-01-15 08:32:09 nkeynes Exp $
7.7 *
7.8 * YUV420 and YUV422 decoding
7.9 *
7.10 @@ -101,6 +101,7 @@
7.11 pvr2_yuv_state.y++;
7.12 if( pvr2_yuv_state.y >= pvr2_yuv_state.height ) {
7.13 asic_event( EVENT_PVR_YUV_DONE );
7.14 + pvr2_yuv_state.y = 0;
7.15 }
7.16 }
7.17
7.18 @@ -140,18 +141,22 @@
7.19 }
7.20 }
7.21
7.22 -void pvr2_yuv_init( uint32_t target, uint32_t config )
7.23 +void pvr2_yuv_init( uint32_t target )
7.24 {
7.25 pvr2_yuv_state.target = target;
7.26 - pvr2_yuv_state.width = (config & 0x3f) + 1;
7.27 - pvr2_yuv_state.height = ((config>>8) & 0x3f) +1;
7.28 pvr2_yuv_state.x = 0;
7.29 pvr2_yuv_state.y = 0;
7.30 pvr2_yuv_state.data_length = 0;
7.31 - pvr2_yuv_state.input_format = (config & 0x01000000) ? FORMAT_YUV420 : FORMAT_YUV422;
7.32 + MMIO_WRITE( PVR2, YUV_COUNT, 0 );
7.33 +}
7.34 +
7.35 +void pvr2_yuv_set_config( uint32_t config )
7.36 +{
7.37 + pvr2_yuv_state.width = (config & 0x3f) + 1;
7.38 + pvr2_yuv_state.height = ((config>>8) & 0x3f) +1;
7.39 + pvr2_yuv_state.input_format = (config & 0x01000000) ? FORMAT_YUV422 : FORMAT_YUV420;
7.40 if( config & 0x00010000 ) {
7.41 pvr2_yuv_state.height *= pvr2_yuv_state.width;
7.42 pvr2_yuv_state.width = 1;
7.43 }
7.44 - MMIO_WRITE( PVR2, YUV_COUNT, 0 );
7.45 }
.