1.1 --- a/src/aica/aica.c	Mon Dec 26 11:47:15 2005 +0000
     1.2 +++ b/src/aica/aica.c	Mon Dec 26 11:52:56 2005 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: aica.c,v 1.8 2005-12-26 11:47:15 nkeynes Exp $
     1.6 + * $Id: aica.c,v 1.9 2005-12-26 11:52:56 nkeynes Exp $
     1.7   * 
     1.8   * This is the core sound system (ie the bit which does the actual work)
     1.9   *
    1.10 @@ -67,7 +67,7 @@
    1.11  {
    1.12      /* Run arm instructions */
    1.13      int reset = MMIO_READ( AICA2, AICA_RESET );
    1.14 -    if( reset & 1 == 0 ) { 
    1.15 +    if( (reset & 1) == 0 ) { 
    1.16  	/* Running */
    1.17          nanosecs = arm_run_slice( nanosecs );
    1.18      }

     2.1 --- a/src/aica/aica.h	Mon Dec 26 11:47:15 2005 +0000
     2.2 +++ b/src/aica/aica.h	Mon Dec 26 11:52:56 2005 +0000
     2.3 @@ -1,5 +1,5 @@
     2.4  /**
     2.5 - * $Id: aica.h,v 1.2 2005-12-26 10:48:20 nkeynes Exp $
     2.6 + * $Id: aica.h,v 1.3 2005-12-26 11:52:56 nkeynes Exp $
     2.7   * 
     2.8   * MMIO definitions for the AICA sound chip. Note that the regions defined
     2.9   * here are relative to the SH4 memory map (0x00700000 based), rather than
    2.10 @@ -33,7 +33,7 @@
    2.11  LONG_PORT( 0x044, CDDA_VOL_R, PORT_MRW, 0, "CDDA Volume right" )
    2.12  LONG_PORT( 0x800, VOL_MASTER, PORT_MRW, UNDEFINED, "Master volume" )
    2.13  LONG_PORT( 0x890, AICA_TIMER, PORT_MRW, 0, "IRQ Timer (?)" )
    2.14 -LONG_PORT( 0xC00, AICA_RESET,PORT_MRW, 0, "AICA reset" )
    2.15 +LONG_PORT( 0xC00, AICA_RESET,PORT_MRW, 1, "AICA reset" )
    2.16  MMIO_REGION_END
    2.17  
    2.18  MMIO_REGION_LIST_BEGIN( spu )

     3.1 --- a/src/aica/armcore.c	Mon Dec 26 11:47:15 2005 +0000
     3.2 +++ b/src/aica/armcore.c	Mon Dec 26 11:52:56 2005 +0000
     3.3 @@ -1,5 +1,5 @@
     3.4  /**
     3.5 - * $Id: armcore.c,v 1.8 2005-12-26 11:47:15 nkeynes Exp $
     3.6 + * $Id: armcore.c,v 1.9 2005-12-26 11:52:56 nkeynes Exp $
     3.7   * 
     3.8   * ARM7TDMI CPU emulation core.
     3.9   *
    3.10 @@ -375,7 +375,7 @@
    3.11  #define SHIFT(ir) ((ir>>4)&0x07)
    3.12  #define DISP24(ir) ((ir&0x00FFFFFF))
    3.13  #define UNDEF(ir) do{ arm_raise_exception( EXC_UNDEFINED ); return TRUE; } while(0)
    3.14 -#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", PC, ir ); return FALSE; }while(0)
    3.15 +#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", PC-4, ir ); dreamcast_stop(); return FALSE; }while(0)
    3.16  
    3.17  /**
    3.18   * Determine the value of the shift-operand for a data processing instruction,