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lxdream.org :: lxdream :: r1197:904fba59a705
lxdream 0.9.1
released Jun 29
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changeset1197:904fba59a705
parent1196:a14dbddafd13
child1198:407659e01ef0
authorNathan Keynes <nkeynes@lxdream.org>
dateWed Dec 14 23:23:32 2011 +1000 (7 years ago)
Improve handling of NAN in fcmp/eq and ftrc
src/sh4/sh4x86.in
1.1 --- a/src/sh4/sh4x86.in Wed Dec 14 21:51:55 2011 +1000
1.2 +++ b/src/sh4/sh4x86.in Wed Dec 14 23:23:32 2011 +1000
1.3 @@ -304,18 +304,20 @@
1.4 #define JNA_label(label) JCC_cc_rel8(X86_COND_NA,-1); MARK_JMP8(label)
1.5 #define JNE_label(label) JCC_cc_rel8(X86_COND_NE,-1); MARK_JMP8(label)
1.6 #define JNO_label(label) JCC_cc_rel8(X86_COND_NO,-1); MARK_JMP8(label)
1.7 +#define JP_label(label) JCC_cc_rel8(X86_COND_P,-1); MARK_JMP8(label)
1.8 #define JS_label(label) JCC_cc_rel8(X86_COND_S,-1); MARK_JMP8(label)
1.9 #define JMP_label(label) JMP_rel8(-1); MARK_JMP8(label)
1.10 #define JNE_exc(exc) JCC_cc_rel32(X86_COND_NE,0); sh4_x86_add_backpatch(xlat_output, pc, exc)
1.11
1.12 +#define LOAD_t() if( sh4_x86.tstate == TSTATE_NONE ) { \
1.13 + CMPL_imms_rbpdisp( 1, R_T ); sh4_x86.tstate = TSTATE_E; }
1.14 +
1.15 /** Branch if T is set (either in the current cflags, or in sh4r.t) */
1.16 -#define JT_label(label) if( sh4_x86.tstate == TSTATE_NONE ) { \
1.17 - CMPL_imms_rbpdisp( 1, R_T ); sh4_x86.tstate = TSTATE_E; } \
1.18 +#define JT_label(label) LOAD_t() \
1.19 JCC_cc_rel8(sh4_x86.tstate,-1); MARK_JMP8(label)
1.20
1.21 /** Branch if T is clear (either in the current cflags or in sh4r.t) */
1.22 -#define JF_label(label) if( sh4_x86.tstate == TSTATE_NONE ) { \
1.23 - CMPL_imms_rbpdisp( 1, R_T ); sh4_x86.tstate = TSTATE_E; } \
1.24 +#define JF_label(label) LOAD_t() \
1.25 JCC_cc_rel8(sh4_x86.tstate^1, -1); MARK_JMP8(label)
1.26
1.27
1.28 @@ -1957,10 +1959,7 @@
1.29 sh4_x86.branch_taken = TRUE;
1.30 return 2;
1.31 } else {
1.32 - if( sh4_x86.tstate == TSTATE_NONE ) {
1.33 - CMPL_imms_rbpdisp( 1, R_T );
1.34 - sh4_x86.tstate = TSTATE_E;
1.35 - }
1.36 + LOAD_t();
1.37 sh4vma_t target = disp + pc + 4;
1.38 JCC_cc_rel32(sh4_x86.tstate,0);
1.39 uint32_t *patch = ((uint32_t *)xlat_output)-1;
1.40 @@ -2095,10 +2094,7 @@
1.41 sh4_x86.branch_taken = TRUE;
1.42 return 2;
1.43 } else {
1.44 - if( sh4_x86.tstate == TSTATE_NONE ) {
1.45 - CMPL_imms_rbpdisp( 1, R_T );
1.46 - sh4_x86.tstate = TSTATE_E;
1.47 - }
1.48 + LOAD_t();
1.49 JCC_cc_rel32(sh4_x86.tstate^1,0);
1.50 uint32_t *patch = ((uint32_t *)xlat_output)-1;
1.51
1.52 @@ -2431,14 +2427,15 @@
1.53 } else {
1.54 push_fr( FRm );
1.55 }
1.56 + MOVP_immptr_rptr( &min_int, REG_ECX );
1.57 + FILD_r32disp( REG_ECX, 0 );
1.58 + FCOMIP_st(1);
1.59 + JAE_label( sat );
1.60 + JP_label( sat2 );
1.61 MOVP_immptr_rptr( &max_int, REG_ECX );
1.62 FILD_r32disp( REG_ECX, 0 );
1.63 FCOMIP_st(1);
1.64 - JNA_label( sat );
1.65 - MOVP_immptr_rptr( &min_int, REG_ECX );
1.66 - FILD_r32disp( REG_ECX, 0 );
1.67 - FCOMIP_st(1);
1.68 - JAE_label( sat2 );
1.69 + JNA_label( sat3 );
1.70 MOVP_immptr_rptr( &save_fcw, REG_EAX );
1.71 FNSTCW_r32disp( REG_EAX, 0 );
1.72 MOVP_immptr_rptr( &trunc_fcw, REG_EDX );
1.73 @@ -2449,6 +2446,7 @@
1.74
1.75 JMP_TARGET(sat);
1.76 JMP_TARGET(sat2);
1.77 + JMP_TARGET(sat3);
1.78 MOVL_r32disp_r32( REG_ECX, 0, REG_ECX ); // 2
1.79 MOVL_r32_rbpdisp( REG_ECX, R_FPUL );
1.80 FPOP_st();
1.81 @@ -2626,10 +2624,14 @@
1.82 push_fr(FRm);
1.83 push_fr(FRn);
1.84 }
1.85 + XORL_r32_r32(REG_EAX, REG_EAX);
1.86 + XORL_r32_r32(REG_EDX, REG_EDX);
1.87 FCOMIP_st(1);
1.88 - SETE_t();
1.89 + SETCCB_cc_r8(X86_COND_NP, REG_DL);
1.90 + CMOVCCL_cc_r32_r32(X86_COND_E, REG_EDX, REG_EAX);
1.91 + MOVL_r32_rbpdisp(REG_EAX, R_T);
1.92 FPOP_st();
1.93 - sh4_x86.tstate = TSTATE_E;
1.94 + sh4_x86.tstate = TSTATE_NONE;
1.95 :}
1.96 FCMP/GT FRm, FRn {:
1.97 COUNT_INST(I_FCMPGT);
.