1.1 --- a/src/sh4/scif.c	Sun Aug 24 02:57:15 2008 +0000
     1.2 +++ b/src/sh4/scif.c	Mon Aug 25 09:15:42 2008 +0000
     1.3 @@ -546,8 +546,10 @@
     1.4          break;
     1.5      case SCSPTR2: /* Serial Port Register */
     1.6          MMIO_WRITE( SCIF, reg, val );
     1.7 -        /* NOT IMPLEMENTED */
     1.8 -        WARN( "SCSPTR2 not implemented: Write %08X", val );
     1.9 +        /* NOT IMPLEMENTED - 'direct' serial I/O */
    1.10 +        if( val != 0 ) {
    1.11 +            WARN( "SCSPTR2 not implemented: Write %08X", val );
    1.12 +        }
    1.13          break;
    1.14      case SCLSR2:
    1.15          val = val & SCLSR2_ORER;

     2.1 --- a/src/sh4/sh4mem.c	Sun Aug 24 02:57:15 2008 +0000
     2.2 +++ b/src/sh4/sh4mem.c	Mon Aug 25 09:15:42 2008 +0000
     2.3 @@ -114,7 +114,12 @@
     2.4          case 0x16000000: mmu_utlb_addr_write( addr, val ); break;
     2.5          case 0x17000000: mmu_utlb_data_write( addr, val ); break;
     2.6          default:
     2.7 -            WARN( "Attempted write to unknown P4 region: %08X", addr );
     2.8 +            if( (addr & 0xFFFF0000 ) == 0xFF940000 ||
     2.9 +                (addr & 0xFFFF0000 ) == 0xFF900000 ) {
    2.10 +                // SDRAM configuration, ignore for now
    2.11 +            } else {
    2.12 +                WARN( "Attempted write to unknown P4 region: %08X", addr );
    2.13 +            }
    2.14          }
    2.15      } else {
    2.16          TRACE_P4IO( "Long write %08X => %08X", io, (addr&0xFFF), val, addr );