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lxdream.org :: lxdream :: r181:bc28fd93e233
lxdream 0.9.1
released Jun 29
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changeset181:bc28fd93e233
parent180:e6dcf9b65658
child182:e3b513538548
authornkeynes
dateThu Jul 06 08:46:41 2006 +0000 (14 years ago)
FSCA, FSRRA, FIPR, FTRV should be treated as no-ops when PR=1.
At least according to the hardware
src/sh4/sh4core.c
1.1 --- a/src/sh4/sh4core.c Sun Jul 02 04:59:00 2006 +0000
1.2 +++ b/src/sh4/sh4core.c Thu Jul 06 08:46:41 2006 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: sh4core.c,v 1.28 2006-06-18 12:00:27 nkeynes Exp $
1.6 + * $Id: sh4core.c,v 1.29 2006-07-06 08:46:41 nkeynes Exp $
1.7 *
1.8 * SH4 emulation core, and parent module for all the SH4 peripheral
1.9 * modules.
1.10 @@ -1328,7 +1328,7 @@
1.11 DRN(ir) = sqrt(DRN(ir));
1.12 break;
1.13 case 7: /* FSRRA FRn */
1.14 - DRN(ir) = 1.0/sqrt(DRN(ir));
1.15 + /* NO-OP when PR=1 */
1.16 break;
1.17 case 8: /* FLDI0 FRn */
1.18 DRN(ir) = 0.0;
1.19 @@ -1337,25 +1337,23 @@
1.20 DRN(ir) = 1.0;
1.21 break;
1.22 case 10: /* FCNVSD FPUL, DRn */
1.23 - DRN(ir) = (double)FPULf;
1.24 + if( ! IS_FPU_DOUBLESIZE() )
1.25 + DRN(ir) = (double)FPULf;
1.26 break;
1.27 case 11: /* FCNVDS DRn, FPUL */
1.28 - FPULf = (float)DRN(ir);
1.29 + if( ! IS_FPU_DOUBLESIZE() )
1.30 + FPULf = (float)DRN(ir);
1.31 break;
1.32 case 14:/* FIPR FVm, FVn */
1.33 - UNDEF(ir);
1.34 + /* NO-OP when PR=1 */
1.35 break;
1.36 case 15:
1.37 if( (ir&0x0300) == 0x0100 ) { /* FTRV XMTRX,FVn */
1.38 + /* NO-OP when PR=1 */
1.39 break;
1.40 }
1.41 - else if( (ir&0x0100) == 0 ) { /* FSCA FPUL, DRn */
1.42 - float angle = (((float)(short)(FPULi>>16)) +
1.43 - ((float)(FPULi&16)/65536.0)) *
1.44 - 2 * M_PI;
1.45 - int reg = DRNn(ir);
1.46 - DR(reg) = sinf(angle);
1.47 - DR(reg+1) = cosf(angle);
1.48 + else if( (ir&0x0100) == 0 ) { /* FSCA FPUL, DRn */
1.49 + /* NO-OP when PR=1 */
1.50 break;
1.51 }
1.52 else if( ir == 0xFBFD ) {
1.53 @@ -1461,10 +1459,8 @@
1.54 FRN(ir) = 1.0;
1.55 break;
1.56 case 10: /* FCNVSD FPUL, DRn */
1.57 - UNDEF(ir);
1.58 break;
1.59 case 11: /* FCNVDS DRn, FPUL */
1.60 - UNDEF(ir);
1.61 break;
1.62 case 14:/* FIPR FVm, FVn */
1.63 /* FIXME: This is not going to be entirely accurate
.