revision 150:c728a442b43f
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raw | bz2 | zip | gz changeset | 150:c728a442b43f |
parent | 149:d88dd2e9a190 |
child | 151:3d3135644b8e |
author | nkeynes |
date | Tue May 23 13:10:28 2006 +0000 (17 years ago) |
Add texcache invalidates on direct writes to 64-bit vram.
Technically we should do it on direct writes to 32-bit vram as well, but
noone (sane) is going to try to write a texture there...
Technically we should do it on direct writes to 32-bit vram as well, but
noone (sane) is going to try to write a texture there...
src/sh4/sh4mem.c | view | annotate | diff | log |
1.1 --- a/src/sh4/sh4mem.c Sat May 20 06:24:49 2006 +00001.2 +++ b/src/sh4/sh4mem.c Tue May 23 13:10:28 2006 +00001.3 @@ -1,5 +1,5 @@1.4 /**1.5 - * $Id: sh4mem.c,v 1.10 2006-04-30 01:50:15 nkeynes Exp $1.6 + * $Id: sh4mem.c,v 1.11 2006-05-23 13:10:28 nkeynes Exp $1.7 * sh4mem.c is responsible for the SH4's access to memory (including memory1.8 * mapped I/O), using the page maps created in mem.c1.9 *1.10 @@ -221,6 +221,7 @@1.11 }1.12 if( (addr&0x1F800000) == 0x04000000 ||1.13 (addr&0x1F800000) == 0x11000000 ) {1.14 + texcache_invalidate_page(addr& 0x7FFFFF);1.15 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);1.16 }1.18 @@ -265,6 +266,7 @@1.19 }1.20 if( (addr&0x1F800000) == 0x04000000 ||1.21 (addr&0x1F800000) == 0x11000000 ) {1.22 + texcache_invalidate_page(addr& 0x7FFFFF);1.23 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);1.24 }1.25 if( IS_MMU_ENABLED() ) {1.26 @@ -297,6 +299,7 @@1.27 }1.28 if( (addr&0x1F800000) == 0x04000000 ||1.29 (addr&0x1F800000) == 0x11000000 ) {1.30 + texcache_invalidate_page(addr& 0x7FFFFF);1.31 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);1.32 }
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