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lxdream.org :: lxdream :: r384:c9d5c194984b
lxdream 0.9.1
released Jun 29
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changeset384:c9d5c194984b
parent383:f597b73474cb
child385:766eca01ef4d
authornkeynes
dateSun Sep 16 07:01:07 2007 +0000 (13 years ago)
Add DIV1 test cases
Update comment against opcode since it looks to be validated now
src/sh4/sh4core.c
src/sh4/sh4core.in
test/Makefile
test/sh4/div1.s
test/sh4/testsh4.c
1.1 --- a/src/sh4/sh4core.c Sun Sep 16 06:59:47 2007 +0000
1.2 +++ b/src/sh4/sh4core.c Sun Sep 16 07:01:07 2007 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: sh4core.c,v 1.45 2007-09-12 09:20:38 nkeynes Exp $
1.6 + * $Id: sh4core.c,v 1.46 2007-09-16 07:01:07 nkeynes Exp $
1.7 *
1.8 * SH4 emulation core, and parent module for all the SH4 peripheral
1.9 * modules.
1.10 @@ -823,10 +823,7 @@
1.11 case 0x4:
1.12 { /* DIV1 Rm, Rn */
1.13 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.14 - /* This is just from the sh4p manual with some
1.15 - * simplifications (someone want to check it's correct? :)
1.16 - * Why they couldn't just provide a real DIV instruction...
1.17 - */
1.18 + /* This is derived from the sh4 manual with some simplifications */
1.19 uint32_t tmp0, tmp1, tmp2, dir;
1.20
1.21 dir = sh4r.q ^ sh4r.m;
2.1 --- a/src/sh4/sh4core.in Sun Sep 16 06:59:47 2007 +0000
2.2 +++ b/src/sh4/sh4core.in Sun Sep 16 07:01:07 2007 +0000
2.3 @@ -1,5 +1,5 @@
2.4 /**
2.5 - * $Id: sh4core.in,v 1.5 2007-09-12 09:20:38 nkeynes Exp $
2.6 + * $Id: sh4core.in,v 1.6 2007-09-16 07:01:07 nkeynes Exp $
2.7 *
2.8 * SH4 emulation core, and parent module for all the SH4 peripheral
2.9 * modules.
2.10 @@ -575,10 +575,7 @@
2.11 sh4r.t = sh4r.q ^ sh4r.m;
2.12 :}
2.13 DIV1 Rm, Rn {:
2.14 - /* This is just from the sh4p manual with some
2.15 - * simplifications (someone want to check it's correct? :)
2.16 - * Why they couldn't just provide a real DIV instruction...
2.17 - */
2.18 + /* This is derived from the sh4 manual with some simplifications */
2.19 uint32_t tmp0, tmp1, tmp2, dir;
2.20
2.21 dir = sh4r.q ^ sh4r.m;
3.1 --- a/test/Makefile Sun Sep 16 06:59:47 2007 +0000
3.2 +++ b/test/Makefile Sun Sep 16 07:01:07 2007 +0000
3.3 @@ -74,7 +74,7 @@
3.4 testsh4: crt0.so sh4/testsh4.so timer.so interrupt.so \
3.5 sh4/add.so sh4/addc.so sh4/addv.so sh4/and.so sh4/andi.so \
3.6 sh4/bf.so sh4/bt.so sh4/cmp.so sh4/cmpstr.so sh4/div0.so \
3.7 - sh4/float.so sh4/fmov.so sh4/ftrc.so sh4/mac.s \
3.8 + sh4/div1.so sh4/float.so sh4/fmov.so sh4/ftrc.so sh4/mac.s \
3.9 sh4/shld.so \
3.10 sh4/excslot.so sh4/undef.so
3.11 $(SH4CC) $(SH4LDFLAGS) $^ -o $@ $(SH4LIBS)
4.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
4.2 +++ b/test/sh4/div1.s Sun Sep 16 07:01:07 2007 +0000
4.3 @@ -0,0 +1,137 @@
4.4 +.section .text
4.5 +.include "sh4/inc.s"
4.6 +!
4.7 +! Test DIV1 operation
4.8 +!
4.9 +.global _test_div1
4.10 +_test_div1:
4.11 + start_test
4.12 + mov.l r11, @-r15
4.13 + mov.l r10, @-r15
4.14 +
4.15 + mova test_div1_data, r0
4.16 + mov r0, r11
4.17 + mov #12, r10
4.18 +test_div1_loop:
4.19 + add #1, r12
4.20 +
4.21 + mov.l @r11+, r4
4.22 + mov.l @r11+, r5
4.23 + mov.l @r11+, r6
4.24 +
4.25 + stc sr, r2
4.26 + mov.l test_div1_sr_mask, r0
4.27 + not r0, r1
4.28 + and r1, r2
4.29 + or r6, r2
4.30 + ldc r2, sr
4.31 + mov r4, r3
4.32 +
4.33 + div1 r4, r5
4.34 +
4.35 + stc sr, r2
4.36 + and r0, r2
4.37 + cmp/eq r3, r4
4.38 + bf test_div1_fail
4.39 + mov.l @r11+, r3
4.40 + cmp/eq r3, r5
4.41 + bf test_div1_fail
4.42 + mov.l @r11+, r3
4.43 + cmp/eq r3, r2
4.44 + bt test_div1_next
4.45 +test_div1_fail:
4.46 + fail test_div1_str_k
4.47 +
4.48 +test_div1_next:
4.49 + dt r10
4.50 + bf test_div1_loop
4.51 +
4.52 +test_div1_end:
4.53 + mov.l @r15+, r10
4.54 + mov.l @r15+, r11
4.55 + end_test test_div1_str_k
4.56 +
4.57 +test_div1_data:
4.58 + .long 0x12345678
4.59 + .long 0x01234123
4.60 + .long 0x00000001
4.61 + .long 0xF0122BCF
4.62 + .long 0x00000100
4.63 +
4.64 + .long 0x11223344
4.65 + .long 0xF0122BCF
4.66 + .long 0x00000100
4.67 + .long 0xF1468AE2
4.68 + .long 0x00000100
4.69 +
4.70 + .long 0x20103040
4.71 + .long 0xF1468AE2
4.72 + .long 0x00000101
4.73 + .long 0x029D4605
4.74 + .long 0x00000001
4.75 +
4.76 + .long 0x01231231
4.77 + .long 0x029D4605
4.78 + .long 0x00000000
4.79 + .long 0x041779D9
4.80 + .long 0x00000001
4.81 +
4.82 + .long 0xF1234123
4.83 + .long 0x13434454
4.84 + .long 0x00000100
4.85 + .long 0x17A9C9CB
4.86 + .long 0x00000100
4.87 +
4.88 + .long 0x65432123
4.89 + .long 0x12312312
4.90 + .long 0x00000101
4.91 + .long 0x89A56748
4.92 + .long 0x00000001
4.93 +
4.94 +! and now the m=1 cases
4.95 + .long 0x12345678
4.96 + .long 0x01234123
4.97 + .long 0x00000301
4.98 + .long 0xF0122BCF
4.99 + .long 0x00000200
4.100 +
4.101 + .long 0x11223344
4.102 + .long 0xF0122BCF
4.103 + .long 0x00000200
4.104 + .long 0xF1468AE2
4.105 + .long 0x00000200
4.106 +
4.107 + .long 0x20103040
4.108 + .long 0xF1468AE2
4.109 + .long 0x00000201
4.110 + .long 0x029D4605
4.111 + .long 0x00000301
4.112 +
4.113 + .long 0x01231231
4.114 + .long 0x029D4605
4.115 + .long 0x00000300
4.116 + .long 0x041779D9
4.117 + .long 0x00000301
4.118 +
4.119 + .long 0xF1234123
4.120 + .long 0x13434454
4.121 + .long 0x00000200
4.122 + .long 0x17A9C9CB
4.123 + .long 0x00000200
4.124 +
4.125 + .long 0x65432123
4.126 + .long 0x12312312
4.127 + .long 0x00000201
4.128 + .long 0x89A56748
4.129 + .long 0x00000301
4.130 +
4.131 +test_div1_data_end:
4.132 +
4.133 +test_div1_sr_mask:
4.134 + .long 0x00000301
4.135 +
4.136 +test_div1_str_k:
4.137 + .long test_div1_str
4.138 +test_div1_str:
4.139 + .string "DIV1"
4.140 +
4.141 \ No newline at end of file
5.1 --- a/test/sh4/testsh4.c Sun Sep 16 06:59:47 2007 +0000
5.2 +++ b/test/sh4/testsh4.c Sun Sep 16 07:01:07 2007 +0000
5.3 @@ -56,6 +56,7 @@
5.4 test_cmp();
5.5 test_cmpstr();
5.6 test_div0();
5.7 + test_div1();
5.8 test_float();
5.9 test_fmov();
5.10 test_ftrc();
.