1.1 --- a/test/Makefile.in	Sat Aug 09 07:39:47 2008 +0000
     1.2 +++ b/test/Makefile.in	Sat Aug 09 09:13:29 2008 +0000
     1.3 @@ -79,7 +79,7 @@
     1.4  	 sh4/mac.so \
     1.5  	 sh4/rot.so sh4/shl.so sh4/shld.so sh4/sub.so sh4/subc.so \
     1.6  	 sh4/trapa.so sh4/tas.so sh4/xtrct.so \
     1.7 -	 sh4/excslot.so sh4/undef.so sh4/tlb.so
     1.8 +	 sh4/excslot.so sh4/undef.so sh4/tlb.so sh4/vmexit.so
     1.9  	$(SH4CC) $(SH4LDFLAGS) $^ -o $@ $(SH4LIBS)
    1.10  	$(SH4OBJCOPY) testsh4 testsh4.bin
    1.11  
    1.12 @@ -157,7 +157,7 @@
    1.13          sh4/addv.s sh4/and.s sh4/andi.s sh4/bf.s sh4/bsr.s sh4/bt.s sh4/cmp.s \
    1.14          sh4/cmpstr.s sh4/div0.s sh4/div1.s sh4/excslot.s sh4/float.s sh4/fmov.s \
    1.15          sh4/ftrc.s sh4/inc.s sh4/mac.s sh4/rot.s sh4/shl.s sh4/shld.s sh4/sub.s \
    1.16 -        sh4/subc.s sh4/tas.s sh4/testsh4.c sh4/tlb.s sh4/trapa.s sh4/undef.s \
    1.17 +        sh4/subc.s sh4/tas.s sh4/testsh4.c sh4/tlb.s sh4/vmexit.s sh4/trapa.s sh4/undef.s \
    1.18          sh4/xtrct.s testdata.c testdata.h testdisp.c testide.c testmath.c \
    1.19          testmmu.c testregs.c testrend.c testspu.c testta.c testyuv.c timer.c timer.h \
    1.20          testta.data testta2.data testta3.data testta4.data testta5.data testsort.data \

     2.1 --- a/test/sh4/testsh4.c	Sat Aug 09 07:39:47 2008 +0000
     2.2 +++ b/test/sh4/testsh4.c	Sat Aug 09 09:13:29 2008 +0000
     2.3 @@ -102,6 +102,7 @@
     2.4      test_slot_illegal();
     2.5      test_undefined();
     2.6      test_tlb();
     2.7 +    test_vmexit();
     2.8      remove_interrupt_handler();
     2.9  
    2.10      fprintf( stdout, "Total: %d/%d tests passed (%d%%)\n", total_tests-total_fails,

     3.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     3.2 +++ b/test/sh4/vmexit.s	Sat Aug 09 09:13:29 2008 +0000
     3.3 @@ -0,0 +1,70 @@
     3.4 +.section .text
     3.5 +.include "sh4/inc.s"
     3.6 +!
     3.7 +! Test for correct performance of the continuation-type core exit - that is,
     3.8 +! the memory write instruction finishes completely, and the following 
     3.9 +! instruction is only executed once. Note that we assume the exit actually
    3.10 +! takes place, but the mmu tests are unlikely to pass if it doesn't.
    3.11 +!
    3.12 +! Reserved:
    3.13 +!   r11 Original value of MMUCR
    3.14 +!   r10 Address of MMUCR
    3.15 +!   r9  Current value of MMUCR
    3.16 +
    3.17 +.global _test_vmexit
    3.18 +_test_vmexit:	
    3.19 +	start_test
    3.20 +
    3.21 +	mov.l r11, @-r15
    3.22 +	mov.l r10, @-r15
    3.23 +	mov.l r9, @-r15
    3.24 +
    3.25 +	mov.l test_vmexit_mmucr, r10
    3.26 +	mov.l @r10, r11
    3.27 +	mov r11, r9
    3.28 +
    3.29 +test_vmexit_1:
    3.30 +	add #1, r12
    3.31 +	mov r10, r0
    3.32 +	mov r10, r2
    3.33 +	mov #1, r1
    3.34 +    add #4, r0
    3.35 +	xor r1, r9
    3.36 +	mov.l r9, @-r0
    3.37 +	add #1, r1
    3.38 +	cmp/eq r0, r2
    3.39 +	bt test_vmexit_1a
    3.40 +	fail test_vmexit_str_k
    3.41 +	bra test_vmexit_2
    3.42 +	nop
    3.43 +test_vmexit_1a:
    3.44 +	mov #2, r0
    3.45 +	cmp/eq r1, r0
    3.46 +	bt test_vmexit_2
    3.47 +	fail test_vmexit_str_k	
    3.48 +
    3.49 +test_vmexit_2:
    3.50 +	add #1, r12
    3.51 +	mov #1, r1
    3.52 +	xor r1, r9
    3.53 +	bra test_vmexit_2_ok
    3.54 +	mov.l r9, @r10
    3.55 +	fail test_vmexit_str_k
    3.56 +	bra test_vmexit_end
    3.57 +	nop
    3.58 +
    3.59 +test_vmexit_2_ok:
    3.60 +
    3.61 +test_vmexit_end:
    3.62 +	mov.l r11, @r10
    3.63 +	mov.l @r15+, r9
    3.64 +	mov.l @r15+, r10
    3.65 +	mov.l @r15+, r11
    3.66 +	end_test test_vmexit_str_k
    3.67 +
    3.68 +test_vmexit_mmucr:
    3.69 +	.long 0xFF000010
    3.70 +test_vmexit_str_k:
    3.71 +	.long test_vmexit_str
    3.72 +test_vmexit_str:
    3.73 +	.string "VM-EXIT"