Search
lxdream.org :: lxdream :: r48:de09cb63b4d0
lxdream 0.9.1
released Jun 29
Download Now
changeset48:de09cb63b4d0
parent47:da09bcb7ce69
child49:6290c467cfbd
authornkeynes
dateTue Dec 27 12:42:00 2005 +0000 (14 years ago)
Fix disassembly of TST, TEQ, CMP, CMN
src/aica/armdasm.c
1.1 --- a/src/aica/armdasm.c Tue Dec 27 12:41:33 2005 +0000
1.2 +++ b/src/aica/armdasm.c Tue Dec 27 12:42:00 2005 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: armdasm.c,v 1.7 2005-12-26 11:47:15 nkeynes Exp $
1.6 + * $Id: armdasm.c,v 1.8 2005-12-27 12:42:00 nkeynes Exp $
1.7 *
1.8 * armdasm.c 21 Aug 2004 - ARM7tdmi (ARMv4) disassembler
1.9 *
1.10 @@ -66,7 +66,8 @@
1.11 (char *)&armr, sizeof(armr), arm_reg_map,
1.12 &armr.r[15], &armr.icount };
1.13 const struct cpu_desc_struct armt_cpu_desc =
1.14 - { "ARM7T", armt_disasm_instruction, arm_execute_instruction, arm_has_page, 2,
1.15 + { "ARM7T", armt_disasm_instruction, arm_execute_instruction, arm_has_page,
1.16 + arm_set_breakpoint, arm_clear_breakpoint, arm_get_breakpoint, 2,
1.17 (char*)&armr, sizeof(armr), arm_reg_map,
1.18 &armr.r[15], &armr.icount };
1.19
1.20 @@ -161,8 +162,9 @@
1.21 return snprintf( buf, len, "[R%d], R%d %c= %04X", RN(ir), RN(ir), sign, IMM12(ir) );
1.22 case 8: /* Rn - imm offset [5.2.2 A5-20] */
1.23 if( RN(ir) == 15 ) { /* PC relative - decode here */
1.24 - return snprintf( buf, len, "[$%08Xh]", pc + 8 +
1.25 - (UFLAG(ir) ? IMM12(ir) : -IMM12(ir)) );
1.26 + uint32_t addr = pc + 8 + (UFLAG(ir) ? IMM12(ir) : -IMM12(ir));
1.27 + return snprintf( buf, len, "[$%08Xh] <- #%08Xh", addr,
1.28 + arm_read_long( addr ) );
1.29 } else {
1.30 return snprintf( buf, len, "[R%d %c %04X]", RN(ir), sign, IMM12(ir) );
1.31 }
1.32 @@ -185,7 +187,7 @@
1.33
1.34 uint32_t arm_disasm_instruction( uint32_t pc, char *buf, int len, char *opcode )
1.35 {
1.36 - char operand[32];
1.37 + char operand[64];
1.38 uint32_t ir = arm_read_long(pc);
1.39 int i,j;
1.40
1.41 @@ -280,20 +282,21 @@
1.42 } else {
1.43 /* STRH */
1.44 }
1.45 + UNIMP(ir);
1.46 break;
1.47 case 2:
1.48 if( LFLAG(ir) ) {
1.49 /* LDRSB */
1.50 } else {
1.51 - UNIMP(ir);
1.52 }
1.53 + UNIMP(ir);
1.54 break;
1.55 case 3:
1.56 if( LFLAG(ir) ) {
1.57 /* LDRSH */
1.58 } else {
1.59 - UNIMP(ir);
1.60 }
1.61 + UNIMP(ir);
1.62 break;
1.63 }
1.64 } else {
1.65 @@ -364,19 +367,19 @@
1.66 arm_disasm_shift_operand(ir, operand, sizeof(operand));
1.67 snprintf(buf, len, "RSCS%s R%d, R%d, %s", cond, RD(ir), RN(ir), operand);
1.68 break;
1.69 - case 16: /* TST Rd, Rn, operand */
1.70 + case 17: /* TST Rd, Rn, operand */
1.71 arm_disasm_shift_operand(ir, operand, sizeof(operand));
1.72 snprintf(buf, len, "TST%s R%d, R%d, %s", cond, RD(ir), RN(ir), operand);
1.73 break;
1.74 - case 18: /* TEQ Rd, Rn, operand */
1.75 + case 19: /* TEQ Rd, Rn, operand */
1.76 arm_disasm_shift_operand(ir, operand, sizeof(operand));
1.77 snprintf(buf, len, "TEQ%s R%d, R%d, %s", cond, RD(ir), RN(ir), operand);
1.78 break;
1.79 - case 20: /* CMP Rd, Rn, operand */
1.80 + case 21: /* CMP Rd, Rn, operand */
1.81 arm_disasm_shift_operand(ir, operand, sizeof(operand));
1.82 snprintf(buf, len, "CMP%s R%d, R%d, %s", cond, RD(ir), RN(ir), operand);
1.83 break;
1.84 - case 22: /* CMN Rd, Rn, operand */
1.85 + case 23: /* CMN Rd, Rn, operand */
1.86 arm_disasm_shift_operand(ir, operand, sizeof(operand));
1.87 snprintf(buf, len, "CMN%s R%d, R%d, %s", cond, RD(ir), RN(ir), operand);
1.88 break;
.