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lxdream.org :: lxdream :: r225:e5cea6125580
lxdream 0.9.1
released Jun 29
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changeset225:e5cea6125580
parent224:289ddaeeebb3
child226:0eeeb25447d3
authornkeynes
dateWed Sep 20 09:52:32 2006 +0000 (14 years ago)
Commit start of SH4 test cases
test/Makefile
test/sh4/README
test/sh4/add.s
test/sh4/testsh4.c
test/timer.c
test/timer.h
1.1 --- a/test/Makefile Tue Sep 12 13:33:18 2006 +0000
1.2 +++ b/test/Makefile Wed Sep 20 09:52:32 2006 +0000
1.3 @@ -71,6 +71,9 @@
1.4
1.5 build-tests: testmath testide testta testregs
1.6
1.7 +testsh4: crt0.so sh4/testsh4.so sh4/timer.so sh4/add.so
1.8 + $(SH4CC) $(SH4LDFLAGS) $^ -o $@ $(SH4LIBS)
1.9 +
1.10 testide: crt0.so testide.so ide.so
1.11 $(SH4CC) $(SH4LDFLAGS) $^ -o $@ $(SH4LIBS)
1.12
2.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
2.2 +++ b/test/sh4/README Wed Sep 20 09:52:32 2006 +0000
2.3 @@ -0,0 +1,11 @@
2.4 +SH4 instruction set tests.
2.5 +Each core instruction has its own set of tests that are assembled into the
2.6 +main test executable.
2.7 +
2.8 +Note: Since each instruction's tests obviously depends on other
2.9 +instructions, its possible for multiple bugs to cancel each other out.
2.10 +However the tests are structured as much as possible to prevent this.
2.11 +
2.12 +Each test loops repeatedly for a constant number of times (currently 1000)
2.13 +to a) ensure that dynamic recompilation kicks in and recompiles the block,
2.14 +and b) allow the code to be timed (to a first approximation anyway).
3.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
3.2 +++ b/test/sh4/add.s Wed Sep 20 09:52:32 2006 +0000
3.3 @@ -0,0 +1,145 @@
3.4 + .section .text
3.5 +.global _test_add
3.6 +_test_add:
3.7 + mov.l r14, @-r15
3.8 + sts.l pr, @-r15
3.9 + mov.l r12, @-r15
3.10 + mov.l r13, @-r15
3.11 + mov r15, r14
3.12 + xor r12,r12
3.13 + xor r13,r13
3.14 +# r12 is the test counter
3.15 +# r13 is the failed-test counter
3.16 +
3.17 +test_add_1: # test adding 0+0 = 0
3.18 + add #1, r12
3.19 + xor r0,r0
3.20 + xor r1,r1
3.21 + xor r2,r2
3.22 + add r0,r1
3.23 + cmp/eq r1, r2
3.24 + bt test_add_2
3.25 + add #1, r13
3.26 +
3.27 +test_add_2: # test 0+ constant 1 = 1
3.28 + add #1, r12
3.29 + xor r0, r0
3.30 + xor r1, r1
3.31 + add #1, r1
3.32 + mov.l test_add_2_result, r2
3.33 + cmp/eq r1, r2
3.34 + bt test_add_3
3.35 + add #1, r13
3.36 + bra test_add_3
3.37 + nop
3.38 +
3.39 + .align 4
3.40 +test_add_2_result:
3.41 + .long 0x00000001
3.42 +
3.43 +test_add_3: # test 0 + constant -1 = -1
3.44 + add #1, r12
3.45 + xor r0, r0
3.46 + xor r1, r1
3.47 + add #-1, r1
3.48 + mov.l test_add_3_result, r2
3.49 + cmp/eq r1, r2
3.50 + bt test_add_4
3.51 + add #1, r13
3.52 + bra test_add_4
3.53 + nop
3.54 +
3.55 + .align 4
3.56 +test_add_3_result:
3.57 + .long 0xFFFFFFFF
3.58 +
3.59 +test_add_4: # test a+b = c w/ overflow
3.60 + add #1, r12
3.61 + mov.l test_add_4_op1, r4
3.62 + mov.l test_add_4_op2, r5
3.63 + mov.l test_add_4_result, r0
3.64 + add r4, r5
3.65 + cmp/eq r5, r0
3.66 + bt test_add_5
3.67 + add #1, r13
3.68 + bra test_add_5
3.69 + nop
3.70 +
3.71 + .align 4
3.72 +test_add_4_op1:
3.73 + .long 0x98765432
3.74 +test_add_4_op2:
3.75 + .long 0xA1234567
3.76 +test_add_4_result:
3.77 + .long 0x39999999
3.78 +
3.79 +test_add_5: # test carry neither used nor set (ala ADDC)
3.80 + add #1, r12
3.81 + mov.l test_add_5_op1, r8
3.82 + mov.l test_add_5_op2, r9
3.83 + stc sr, r10
3.84 + xor r0,r0
3.85 + add #1, r0
3.86 + or r0,r10
3.87 + ldc r10, sr
3.88 + add r9,r8
3.89 + mov.l test_add_5_result, r11
3.90 + cmp/eq r11, r8
3.91 + bt test_add_5_b
3.92 + add #1, r13
3.93 + mov.l test_print_failure_k, r3
3.94 + mov r12, r5
3.95 + mov.l test_add_str_k, r4
3.96 + jsr @r3
3.97 + nop
3.98 + bra test_add_6
3.99 + nop
3.100 +test_add_5_b:
3.101 + stc sr, r1
3.102 + and r0, r1
3.103 + cmp/eq r0, r1
3.104 + bt test_add_6
3.105 + add #1, r13
3.106 + mov.l test_print_failure_k, r3
3.107 + mov r12, r5
3.108 + mov.l test_add_str_k, r4
3.109 + jsr @r3
3.110 + nop
3.111 + bra test_add_6
3.112 + nop
3.113 +
3.114 +test_add_5_op1:
3.115 + .long 0x11111111
3.116 +test_add_5_op2:
3.117 + .long 0x1000FFFF
3.118 +test_add_5_result:
3.119 + .long 0x21121110
3.120 +
3.121 +test_add_6:
3.122 +
3.123 +test_add_end:
3.124 + mov.l test_add_str_k, r4
3.125 + mov r13, r5
3.126 + mov r12, r6
3.127 + mov.l test_print_result_k, r1
3.128 + jsr @r1
3.129 + mov r14, r15
3.130 + mov.l @r15+, r13
3.131 + mov.l @r15+, r12
3.132 + lds.l @r15+, pr
3.133 + mov.l @r15+, r14
3.134 + rts
3.135 + nop
3.136 +
3.137 + .align 2
3.138 +test_add_str:
3.139 + .string "ADD"
3.140 + .align 2
3.141 +
3.142 +test_add_str_k:
3.143 + .long test_add_str
3.144 +test_print_result_k:
3.145 + .long _test_print_result
3.146 +test_print_failure_k:
3.147 + .long _test_print_failure
3.148 +
3.149 \ No newline at end of file
4.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
4.2 +++ b/test/sh4/testsh4.c Wed Sep 20 09:52:32 2006 +0000
4.3 @@ -0,0 +1,18 @@
4.4 +#include <stdio.h>
4.5 +
4.6 +int test_print_result( char *testname, int failed, int total )
4.7 +{
4.8 + fprintf( stderr, "%s: %d/%d tests passed\n", testname, total-failed, total );
4.9 + return failed;
4.10 +}
4.11 +
4.12 +void test_print_failure( char *testname, int number )
4.13 +{
4.14 + fprintf( stderr, "%s: Test %d failed!\n", testname, number );
4.15 +}
4.16 +
4.17 +int main()
4.18 +{
4.19 +
4.20 + test_add();
4.21 +}
5.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
5.2 +++ b/test/timer.c Wed Sep 20 09:52:32 2006 +0000
5.3 @@ -0,0 +1,45 @@
5.4 +#include "../lib.h"
5.5 +#define TMU_CHANNEL 2
5.6 +
5.7 +#define TOCR 0xFFD80000 /* Output control register */
5.8 +#define TSTR 0xFFD80004 /* Start register */
5.9 +#define TCOR(c) (0xFFD80008 + (c*12)) /* Constant register */
5.10 +#define TCNT(c) (0xFFD8000C + (c*12)) /* Count register */
5.11 +#define TCR(c) (0xFFD80010 + (c*12)) /* Control register */
5.12 +
5.13 +/**
5.14 + * Initialize the on-chip timer controller. We snag TMU channel 2 in its
5.15 + * highest resolution mode, and start it counting down from max_int.
5.16 + */
5.17 +void timer_start() {
5.18 + unsigned int val = long_read(TSTR);
5.19 + long_write( TSTR, val & (~(1<<TMU_CHANNEL)) ); /* Stop counter */
5.20 + long_write( TCOR(TMU_CHANNEL), 0xFFFFFFFF );
5.21 + long_write( TCNT(TMU_CHANNEL), 0xFFFFFFFF );
5.22 + long_write( TCR(TMU_CHANNEL), 0x00000000 );
5.23 + long_write( TSTR, val | (1<<TMU_CHANNEL) );
5.24 +}
5.25 +
5.26 +/**
5.27 + * Report the current value of TMU2.
5.28 + */
5.29 +long timer_gettime() {
5.30 + return long_read(TCNT(TMU_CHANNEL));
5.31 +}
5.32 +
5.33 +/**
5.34 + * Stop TMU2 and report the current value.
5.35 + */
5.36 +long timer_stop() {
5.37 + long_write( TSTR, long_read(TSTR) & (~(1<<TMU_CHANNEL)) );
5.38 + return long_read( TCNT(TMU_CHANNEL) );
5.39 +}
5.40 +
5.41 +
5.42 +/**
5.43 + * Convert the supplied timer value to a number of micro seconds since the timer
5.44 + * was started.
5.45 + */
5.46 +long timer_to_microsecs( long value ) {
5.47 + return value;
5.48 +}
6.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
6.2 +++ b/test/timer.h Wed Sep 20 09:52:32 2006 +0000
6.3 @@ -0,0 +1,5 @@
6.4 +
6.5 +void timer_start();
6.6 +long timer_gettime();
6.7 +long timer_stop();
6.8 +long timer_to_microsecs( long value );
.