revision 378:f10fbdd4e24b
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raw | bz2 | zip | gz changeset | 378:f10fbdd4e24b |
parent | 377:fa18743f6905 |
child | 379:7e1c33a184d8 |
author | nkeynes |
date | Wed Sep 12 09:20:38 2007 +0000 (16 years ago) |
Start splitting the common SH4 parts into sh4.c, with sh4core.c to become
just the emulation core.
just the emulation core.
src/Makefile.am | view | annotate | diff | log | ||
src/Makefile.in | view | annotate | diff | log | ||
src/sh4/sh4.c | view | annotate | diff | log | ||
src/sh4/sh4core.c | view | annotate | diff | log | ||
src/sh4/sh4core.h | view | annotate | diff | log | ||
src/sh4/sh4core.in | view | annotate | diff | log |
1.1 --- a/src/Makefile.am Wed Sep 12 09:17:52 2007 +00001.2 +++ b/src/Makefile.am Wed Sep 12 09:20:38 2007 +00001.3 @@ -20,10 +20,12 @@1.4 gdrom/ide.c gdrom/ide.h gdrom/packet.h gdrom/gdimage.c \1.5 gdrom/gdrom.c gdrom/gdrom.h gdrom/nrg.c gdrom/cdi.c gdrom/linux.c \1.6 dreamcast.c dreamcast.h eventq.c eventq.h \1.7 - sh4/intc.c sh4/intc.h sh4/sh4mem.c sh4/timer.c sh4/dmac.c \1.8 + sh4/sh4.c sh4/intc.c sh4/intc.h sh4/sh4mem.c sh4/timer.c sh4/dmac.c \1.9 sh4/sh4core.c sh4/sh4core.h sh4/sh4dasm.c sh4/sh4dasm.h \1.10 sh4/sh4mmio.c sh4/sh4mmio.h sh4/scif.c sh4/xltcache.c sh4/xltcache.h \1.11 sh4/sh4trans.c sh4/sh4trans.h sh4/sh4x86.c \1.12 + x86dasm/x86dasm.c x86dasm/x86dasm.h \1.13 + x86dasm/i386-dis.c x86dasm/dis-init.c x86dasm/dis-buf.c \1.14 aica/armcore.c aica/armcore.h aica/armdasm.c aica/armmem.c \1.15 aica/aica.c aica/aica.h aica/audio.c aica/audio.h \1.16 pvr2/pvr2.c pvr2/pvr2.h pvr2/pvr2mem.c \
2.1 --- a/src/Makefile.in Wed Sep 12 09:17:52 2007 +00002.2 +++ b/src/Makefile.in Wed Sep 12 09:20:38 2007 +00002.3 @@ -154,10 +154,12 @@2.4 gdrom/ide.c gdrom/ide.h gdrom/packet.h gdrom/gdimage.c \2.5 gdrom/gdrom.c gdrom/gdrom.h gdrom/nrg.c gdrom/cdi.c gdrom/linux.c \2.6 dreamcast.c dreamcast.h eventq.c eventq.h \2.7 - sh4/intc.c sh4/intc.h sh4/sh4mem.c sh4/timer.c sh4/dmac.c \2.8 + sh4/sh4.c sh4/intc.c sh4/intc.h sh4/sh4mem.c sh4/timer.c sh4/dmac.c \2.9 sh4/sh4core.c sh4/sh4core.h sh4/sh4dasm.c sh4/sh4dasm.h \2.10 sh4/sh4mmio.c sh4/sh4mmio.h sh4/scif.c sh4/xltcache.c sh4/xltcache.h \2.11 sh4/sh4trans.c sh4/sh4trans.h sh4/sh4x86.c \2.12 + x86dasm/x86dasm.c x86dasm/x86dasm.h \2.13 + x86dasm/i386-dis.c x86dasm/dis-init.c x86dasm/dis-buf.c \2.14 aica/armcore.c aica/armcore.h aica/armdasm.c aica/armmem.c \2.15 aica/aica.c aica/aica.h aica/audio.c aica/audio.h \2.16 pvr2/pvr2.c pvr2/pvr2.h pvr2/pvr2mem.c \2.17 @@ -215,22 +217,24 @@2.18 asic.$(OBJEXT) syscall.$(OBJEXT) bios.$(OBJEXT) \2.19 dcload.$(OBJEXT) ide.$(OBJEXT) gdimage.$(OBJEXT) \2.20 gdrom.$(OBJEXT) nrg.$(OBJEXT) cdi.$(OBJEXT) linux.$(OBJEXT) \2.21 - dreamcast.$(OBJEXT) eventq.$(OBJEXT) intc.$(OBJEXT) \2.22 - sh4mem.$(OBJEXT) timer.$(OBJEXT) dmac.$(OBJEXT) \2.23 + dreamcast.$(OBJEXT) eventq.$(OBJEXT) sh4.$(OBJEXT) \2.24 + intc.$(OBJEXT) sh4mem.$(OBJEXT) timer.$(OBJEXT) dmac.$(OBJEXT) \2.25 sh4core.$(OBJEXT) sh4dasm.$(OBJEXT) sh4mmio.$(OBJEXT) \2.26 scif.$(OBJEXT) xltcache.$(OBJEXT) sh4trans.$(OBJEXT) \2.27 - sh4x86.$(OBJEXT) armcore.$(OBJEXT) armdasm.$(OBJEXT) \2.28 - armmem.$(OBJEXT) aica.$(OBJEXT) audio.$(OBJEXT) pvr2.$(OBJEXT) \2.29 - pvr2mem.$(OBJEXT) tacore.$(OBJEXT) render.$(OBJEXT) \2.30 - rendcore.$(OBJEXT) rendbkg.$(OBJEXT) rendsort.$(OBJEXT) \2.31 - texcache.$(OBJEXT) yuv.$(OBJEXT) rendsave.$(OBJEXT) \2.32 - maple.$(OBJEXT) controller.$(OBJEXT) support.$(OBJEXT) \2.33 - interface.$(OBJEXT) callbacks.$(OBJEXT) gui.$(OBJEXT) \2.34 - mmr_win.$(OBJEXT) debug_win.$(OBJEXT) dump_win.$(OBJEXT) \2.35 - loader.$(OBJEXT) bootstrap.$(OBJEXT) util.$(OBJEXT) \2.36 - display.$(OBJEXT) audio_null.$(OBJEXT) audio_esd.$(OBJEXT) \2.37 - video_null.$(OBJEXT) video_gtk.$(OBJEXT) video_x11.$(OBJEXT) \2.38 - gl_common.$(OBJEXT) gl_fbo.$(OBJEXT)2.39 + sh4x86.$(OBJEXT) x86dasm.$(OBJEXT) i386-dis.$(OBJEXT) \2.40 + dis-init.$(OBJEXT) dis-buf.$(OBJEXT) armcore.$(OBJEXT) \2.41 + armdasm.$(OBJEXT) armmem.$(OBJEXT) aica.$(OBJEXT) \2.42 + audio.$(OBJEXT) pvr2.$(OBJEXT) pvr2mem.$(OBJEXT) \2.43 + tacore.$(OBJEXT) render.$(OBJEXT) rendcore.$(OBJEXT) \2.44 + rendbkg.$(OBJEXT) rendsort.$(OBJEXT) texcache.$(OBJEXT) \2.45 + yuv.$(OBJEXT) rendsave.$(OBJEXT) maple.$(OBJEXT) \2.46 + controller.$(OBJEXT) support.$(OBJEXT) interface.$(OBJEXT) \2.47 + callbacks.$(OBJEXT) gui.$(OBJEXT) mmr_win.$(OBJEXT) \2.48 + debug_win.$(OBJEXT) dump_win.$(OBJEXT) loader.$(OBJEXT) \2.49 + bootstrap.$(OBJEXT) util.$(OBJEXT) display.$(OBJEXT) \2.50 + audio_null.$(OBJEXT) audio_esd.$(OBJEXT) video_null.$(OBJEXT) \2.51 + video_gtk.$(OBJEXT) video_x11.$(OBJEXT) gl_common.$(OBJEXT) \2.52 + gl_fbo.$(OBJEXT)2.53 lxdream_OBJECTS = $(am_lxdream_OBJECTS)2.54 lxdream_DEPENDENCIES =2.55 lxdream_LDFLAGS =2.56 @@ -275,17 +279,18 @@2.57 @AMDEP_TRUE@ ./$(DEPDIR)/pvr2mem.Po ./$(DEPDIR)/rendbkg.Po \2.58 @AMDEP_TRUE@ ./$(DEPDIR)/rendcore.Po ./$(DEPDIR)/render.Po \2.59 @AMDEP_TRUE@ ./$(DEPDIR)/rendsave.Po ./$(DEPDIR)/rendsort.Po \2.60 -@AMDEP_TRUE@ ./$(DEPDIR)/scif.Po ./$(DEPDIR)/sh4core.Po \2.61 -@AMDEP_TRUE@ ./$(DEPDIR)/sh4dasm.Po ./$(DEPDIR)/sh4mem.Po \2.62 -@AMDEP_TRUE@ ./$(DEPDIR)/sh4mmio.Po ./$(DEPDIR)/sh4trans.Po \2.63 -@AMDEP_TRUE@ ./$(DEPDIR)/sh4x86.Po ./$(DEPDIR)/support.Po \2.64 -@AMDEP_TRUE@ ./$(DEPDIR)/syscall.Po ./$(DEPDIR)/tacore.Po \2.65 -@AMDEP_TRUE@ ./$(DEPDIR)/testsh4x86.Po ./$(DEPDIR)/testxlt.Po \2.66 -@AMDEP_TRUE@ ./$(DEPDIR)/texcache.Po ./$(DEPDIR)/timer.Po \2.67 -@AMDEP_TRUE@ ./$(DEPDIR)/util.Po ./$(DEPDIR)/video_gtk.Po \2.68 -@AMDEP_TRUE@ ./$(DEPDIR)/video_null.Po ./$(DEPDIR)/video_x11.Po \2.69 -@AMDEP_TRUE@ ./$(DEPDIR)/watch.Po ./$(DEPDIR)/x86dasm.Po \2.70 -@AMDEP_TRUE@ ./$(DEPDIR)/xltcache.Po ./$(DEPDIR)/yuv.Po2.71 +@AMDEP_TRUE@ ./$(DEPDIR)/scif.Po ./$(DEPDIR)/sh4.Po \2.72 +@AMDEP_TRUE@ ./$(DEPDIR)/sh4core.Po ./$(DEPDIR)/sh4dasm.Po \2.73 +@AMDEP_TRUE@ ./$(DEPDIR)/sh4mem.Po ./$(DEPDIR)/sh4mmio.Po \2.74 +@AMDEP_TRUE@ ./$(DEPDIR)/sh4trans.Po ./$(DEPDIR)/sh4x86.Po \2.75 +@AMDEP_TRUE@ ./$(DEPDIR)/support.Po ./$(DEPDIR)/syscall.Po \2.76 +@AMDEP_TRUE@ ./$(DEPDIR)/tacore.Po ./$(DEPDIR)/testsh4x86.Po \2.77 +@AMDEP_TRUE@ ./$(DEPDIR)/testxlt.Po ./$(DEPDIR)/texcache.Po \2.78 +@AMDEP_TRUE@ ./$(DEPDIR)/timer.Po ./$(DEPDIR)/util.Po \2.79 +@AMDEP_TRUE@ ./$(DEPDIR)/video_gtk.Po ./$(DEPDIR)/video_null.Po \2.80 +@AMDEP_TRUE@ ./$(DEPDIR)/video_x11.Po ./$(DEPDIR)/watch.Po \2.81 +@AMDEP_TRUE@ ./$(DEPDIR)/x86dasm.Po ./$(DEPDIR)/xltcache.Po \2.82 +@AMDEP_TRUE@ ./$(DEPDIR)/yuv.Po2.83 COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \2.84 $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)2.85 CCLD = $(CC)2.86 @@ -403,6 +408,7 @@2.87 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/rendsave.Po@am__quote@2.88 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/rendsort.Po@am__quote@2.89 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/scif.Po@am__quote@2.90 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/sh4.Po@am__quote@2.91 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/sh4core.Po@am__quote@2.92 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/sh4dasm.Po@am__quote@2.93 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/sh4mem.Po@am__quote@2.94 @@ -645,6 +651,28 @@2.95 @AMDEP_TRUE@@am__fastdepCC_FALSE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@2.96 @am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o linux.obj `if test -f 'gdrom/linux.c'; then $(CYGPATH_W) 'gdrom/linux.c'; else $(CYGPATH_W) '$(srcdir)/gdrom/linux.c'; fi`2.98 +sh4.o: sh4/sh4.c2.99 +@am__fastdepCC_TRUE@ if $(CC) $(DEFS) $(DEFAULT_INCLUDES) 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3.1 --- /dev/null Thu Jan 01 00:00:00 1970 +00003.2 +++ b/src/sh4/sh4.c Wed Sep 12 09:20:38 2007 +00003.3 @@ -0,0 +1,150 @@3.4 +/**3.5 + * $Id: sh4.c,v 1.1 2007-09-12 09:20:38 nkeynes Exp $3.6 + *3.7 + * SH4 parent module for all CPU modes and SH4 peripheral3.8 + * modules.3.9 + *3.10 + * Copyright (c) 2005 Nathan Keynes.3.11 + *3.12 + * This program is free software; you can redistribute it and/or modify3.13 + * it under the terms of the GNU General Public License as published by3.14 + * the Free Software Foundation; either version 2 of the License, or3.15 + * (at your option) any later version.3.16 + *3.17 + * This program is distributed in the hope that it will be useful,3.18 + * but WITHOUT ANY WARRANTY; without even the implied warranty of3.19 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the3.20 + * GNU General Public License for more details.3.21 + */3.22 +3.23 +#define MODULE sh4_module3.24 +#include <math.h>3.25 +#include "dream.h"3.26 +#include "sh4/sh4core.h"3.27 +#include "sh4/sh4mmio.h"3.28 +#include "sh4/intc.h"3.29 +#include "mem.h"3.30 +#include "clock.h"3.31 +#include "syscall.h"3.32 +3.33 +void sh4_init( void );3.34 +void sh4_reset( void );3.35 +void sh4_start( void );3.36 +void sh4_stop( void );3.37 +void sh4_save_state( FILE *f );3.38 +int sh4_load_state( FILE *f );3.39 +3.40 +uint32_t sh4_run_slice( uint32_t );3.41 +uint32_t sh4_xlat_run_slice( uint32_t );3.42 +3.43 +struct dreamcast_module sh4_module = { "SH4", sh4_init, sh4_reset,3.44 + NULL, sh4_run_slice, sh4_stop,3.45 + sh4_save_state, sh4_load_state };3.46 +3.47 +struct sh4_registers sh4r;3.48 +struct breakpoint_struct sh4_breakpoints[MAX_BREAKPOINTS];3.49 +int sh4_breakpoint_count = 0;3.50 +3.51 +void sh4_set_use_xlat( gboolean use )3.52 +{3.53 + if( use ) {3.54 + xlat_cache_init();3.55 + sh4_x86_init();3.56 + sh4_module.run_time_slice = sh4_xlat_run_slice;3.57 + } else {3.58 + sh4_module.run_time_slice = sh4_run_slice;3.59 + }3.60 +}3.61 +3.62 +void sh4_init(void)3.63 +{3.64 + register_io_regions( mmio_list_sh4mmio );3.65 + MMU_init();3.66 + sh4_reset();3.67 +}3.68 +3.69 +void sh4_reset(void)3.70 +{3.71 + /* zero everything out, for the sake of having a consistent state. */3.72 + memset( &sh4r, 0, sizeof(sh4r) );3.73 +3.74 + /* Resume running if we were halted */3.75 + sh4r.sh4_state = SH4_STATE_RUNNING;3.76 +3.77 + sh4r.pc = 0xA0000000;3.78 + sh4r.new_pc= 0xA0000002;3.79 + sh4r.vbr = 0x00000000;3.80 + sh4r.fpscr = 0x00040001;3.81 + sh4r.sr = 0x700000F0;3.82 + sh4r.fr_bank = &sh4r.fr[0][0];3.83 +3.84 + /* Mem reset will do this, but if we want to reset _just_ the SH4... */3.85 + MMIO_WRITE( MMU, EXPEVT, EXC_POWER_RESET );3.86 +3.87 + /* Peripheral modules */3.88 + CPG_reset();3.89 + INTC_reset();3.90 + MMU_reset();3.91 + TMU_reset();3.92 + SCIF_reset();3.93 +}3.94 +3.95 +void sh4_stop(void)3.96 +{3.97 +3.98 +}3.99 +3.100 +void sh4_save_state( FILE *f )3.101 +{3.102 + fwrite( &sh4r, sizeof(sh4r), 1, f );3.103 + MMU_save_state( f );3.104 + INTC_save_state( f );3.105 + TMU_save_state( f );3.106 + SCIF_save_state( f );3.107 +}3.108 +3.109 +int sh4_load_state( FILE * f )3.110 +{3.111 + fread( &sh4r, sizeof(sh4r), 1, f );3.112 + MMU_load_state( f );3.113 + INTC_load_state( f );3.114 + TMU_load_state( f );3.115 + return SCIF_load_state( f );3.116 +}3.117 +3.118 +3.119 +void sh4_set_breakpoint( uint32_t pc, int type )3.120 +{3.121 + sh4_breakpoints[sh4_breakpoint_count].address = pc;3.122 + sh4_breakpoints[sh4_breakpoint_count].type = type;3.123 + sh4_breakpoint_count++;3.124 +}3.125 +3.126 +gboolean sh4_clear_breakpoint( uint32_t pc, int type )3.127 +{3.128 + int i;3.129 +3.130 + for( i=0; i<sh4_breakpoint_count; i++ ) {3.131 + if( sh4_breakpoints[i].address == pc &&3.132 + sh4_breakpoints[i].type == type ) {3.133 + while( ++i < sh4_breakpoint_count ) {3.134 + sh4_breakpoints[i-1].address = sh4_breakpoints[i].address;3.135 + sh4_breakpoints[i-1].type = sh4_breakpoints[i].type;3.136 + }3.137 + sh4_breakpoint_count--;3.138 + return TRUE;3.139 + }3.140 + }3.141 + return FALSE;3.142 +}3.143 +3.144 +int sh4_get_breakpoint( uint32_t pc )3.145 +{3.146 + int i;3.147 + for( i=0; i<sh4_breakpoint_count; i++ ) {3.148 + if( sh4_breakpoints[i].address == pc )3.149 + return sh4_breakpoints[i].type;3.150 + }3.151 + return 0;3.152 +}3.153 +
4.1 --- a/src/sh4/sh4core.c Wed Sep 12 09:17:52 2007 +00004.2 +++ b/src/sh4/sh4core.c Wed Sep 12 09:20:38 2007 +00004.3 @@ -1,5 +1,5 @@4.4 /**4.5 - * $Id: sh4core.c,v 1.44 2007-09-11 02:14:46 nkeynes Exp $4.6 + * $Id: sh4core.c,v 1.45 2007-09-12 09:20:38 nkeynes Exp $4.7 *4.8 * SH4 emulation core, and parent module for all the SH4 peripheral4.9 * modules.4.10 @@ -40,94 +40,11 @@4.12 /********************** SH4 Module Definition ****************************/4.14 -void sh4_init( void );4.15 -void sh4_reset( void );4.16 uint32_t sh4_run_slice( uint32_t );4.17 -void sh4_start( void );4.18 -void sh4_stop( void );4.19 -void sh4_save_state( FILE *f );4.20 -int sh4_load_state( FILE *f );4.21 -void sh4_accept_interrupt( void );4.23 -struct dreamcast_module sh4_module = { "SH4", sh4_init, sh4_reset,4.24 - NULL, sh4_run_slice, sh4_stop,4.25 - sh4_save_state, sh4_load_state };4.26 -4.27 -struct sh4_registers sh4r;4.28 -4.29 -void sh4_init(void)4.30 -{4.31 - register_io_regions( mmio_list_sh4mmio );4.32 - MMU_init();4.33 - sh4_reset();4.34 -}4.35 -4.36 -void sh4_reset(void)4.37 -{4.38 - /* zero everything out, for the sake of having a consistent state. */4.39 - memset( &sh4r, 0, sizeof(sh4r) );4.40 -4.41 - /* Resume running if we were halted */4.42 - sh4r.sh4_state = SH4_STATE_RUNNING;4.43 -4.44 - sh4r.pc = 0xA0000000;4.45 - sh4r.new_pc= 0xA0000002;4.46 - sh4r.vbr = 0x00000000;4.47 - sh4r.fpscr = 0x00040001;4.48 - sh4r.sr = 0x700000F0;4.49 - sh4r.fr_bank = &sh4r.fr[0][0];4.50 -4.51 - /* Mem reset will do this, but if we want to reset _just_ the SH4... */4.52 - MMIO_WRITE( MMU, EXPEVT, EXC_POWER_RESET );4.53 -4.54 - /* Peripheral modules */4.55 - CPG_reset();4.56 - INTC_reset();4.57 - MMU_reset();4.58 - TMU_reset();4.59 - SCIF_reset();4.60 -}4.61 -4.62 -static struct breakpoint_struct sh4_breakpoints[MAX_BREAKPOINTS];4.63 -static int sh4_breakpoint_count = 0;4.64 static uint16_t *sh4_icache = NULL;4.65 static uint32_t sh4_icache_addr = 0;4.67 -void sh4_set_breakpoint( uint32_t pc, int type )4.68 -{4.69 - sh4_breakpoints[sh4_breakpoint_count].address = pc;4.70 - sh4_breakpoints[sh4_breakpoint_count].type = type;4.71 - sh4_breakpoint_count++;4.72 -}4.73 -4.74 -gboolean sh4_clear_breakpoint( uint32_t pc, int type )4.75 -{4.76 - int i;4.77 -4.78 - for( i=0; i<sh4_breakpoint_count; i++ ) {4.79 - if( sh4_breakpoints[i].address == pc &&4.80 - sh4_breakpoints[i].type == type ) {4.81 - while( ++i < sh4_breakpoint_count ) {4.82 - sh4_breakpoints[i-1].address = sh4_breakpoints[i].address;4.83 - sh4_breakpoints[i-1].type = sh4_breakpoints[i].type;4.84 - }4.85 - sh4_breakpoint_count--;4.86 - return TRUE;4.87 - }4.88 - }4.89 - return FALSE;4.90 -}4.91 -4.92 -int sh4_get_breakpoint( uint32_t pc )4.93 -{4.94 - int i;4.95 - for( i=0; i<sh4_breakpoint_count; i++ ) {4.96 - if( sh4_breakpoints[i].address == pc )4.97 - return sh4_breakpoints[i].type;4.98 - }4.99 - return 0;4.100 -}4.101 -4.102 uint32_t sh4_run_slice( uint32_t nanosecs )4.103 {4.104 int i;4.105 @@ -199,29 +116,6 @@4.106 return nanosecs;4.107 }4.109 -void sh4_stop(void)4.110 -{4.111 -4.112 -}4.113 -4.114 -void sh4_save_state( FILE *f )4.115 -{4.116 - fwrite( &sh4r, sizeof(sh4r), 1, f );4.117 - MMU_save_state( f );4.118 - INTC_save_state( f );4.119 - TMU_save_state( f );4.120 - SCIF_save_state( f );4.121 -}4.122 -4.123 -int sh4_load_state( FILE * f )4.124 -{4.125 - fread( &sh4r, sizeof(sh4r), 1, f );4.126 - MMU_load_state( f );4.127 - INTC_load_state( f );4.128 - TMU_load_state( f );4.129 - return SCIF_load_state( f );4.130 -}4.131 -4.132 /********************** SH4 emulation core ****************************/4.134 void sh4_set_pc( int pc )
5.1 --- a/src/sh4/sh4core.h Wed Sep 12 09:17:52 2007 +00005.2 +++ b/src/sh4/sh4core.h Wed Sep 12 09:20:38 2007 +00005.3 @@ -1,5 +1,5 @@5.4 /**5.5 - * $Id: sh4core.h,v 1.22 2007-09-11 02:14:46 nkeynes Exp $5.6 + * $Id: sh4core.h,v 1.23 2007-09-12 09:20:38 nkeynes Exp $5.7 *5.8 * This file defines the internal functions exported/used by the SH4 core,5.9 * except for disassembly functions defined in sh4dasm.h5.10 @@ -23,6 +23,7 @@5.11 #include <glib/gtypes.h>5.12 #include <stdint.h>5.13 #include <stdio.h>5.14 +#include "mem.h"5.16 #ifdef __cplusplus5.17 extern "C" {5.18 @@ -80,9 +81,12 @@5.19 };5.21 extern struct sh4_registers sh4r;5.22 +extern struct breakpoint_struct sh4_breakpoints[MAX_BREAKPOINTS];5.23 +extern int sh4_breakpoint_count;5.24 +5.26 /* Public functions */5.27 -5.28 +void sh4_set_use_xlat( gboolean use );5.29 void sh4_init( void );5.30 void sh4_reset( void );5.31 void sh4_run( void );5.32 @@ -91,6 +95,7 @@5.33 int sh4_isrunning( void );5.34 void sh4_stop( void );5.35 void sh4_set_pc( int );5.36 +5.37 gboolean sh4_execute_instruction( void );5.38 gboolean sh4_raise_exception( int );5.39 gboolean sh4_raise_slot_exception( int, int );5.40 @@ -98,6 +103,7 @@5.41 void sh4_set_breakpoint( uint32_t pc, int type );5.42 gboolean sh4_clear_breakpoint( uint32_t pc, int type );5.43 int sh4_get_breakpoint( uint32_t pc );5.44 +void sh4_accept_interrupt( void );5.46 #define BREAK_ONESHOT 15.47 #define BREAK_PERM 2
6.1 --- a/src/sh4/sh4core.in Wed Sep 12 09:17:52 2007 +00006.2 +++ b/src/sh4/sh4core.in Wed Sep 12 09:20:38 2007 +00006.3 @@ -1,5 +1,5 @@6.4 /**6.5 - * $Id: sh4core.in,v 1.4 2007-09-11 02:14:46 nkeynes Exp $6.6 + * $Id: sh4core.in,v 1.5 2007-09-12 09:20:38 nkeynes Exp $6.7 *6.8 * SH4 emulation core, and parent module for all the SH4 peripheral6.9 * modules.6.10 @@ -40,94 +40,11 @@6.12 /********************** SH4 Module Definition ****************************/6.14 -void sh4_init( void );6.15 -void sh4_reset( void );6.16 uint32_t sh4_run_slice( uint32_t );6.17 -void sh4_start( void );6.18 -void sh4_stop( void );6.19 -void sh4_save_state( FILE *f );6.20 -int sh4_load_state( FILE *f );6.21 -void sh4_accept_interrupt( void );6.23 -struct dreamcast_module sh4_module = { "SH4", sh4_init, sh4_reset,6.24 - NULL, sh4_run_slice, sh4_stop,6.25 - sh4_save_state, sh4_load_state };6.26 -6.27 -struct sh4_registers sh4r;6.28 -6.29 -void sh4_init(void)6.30 -{6.31 - register_io_regions( mmio_list_sh4mmio );6.32 - MMU_init();6.33 - sh4_reset();6.34 -}6.35 -6.36 -void sh4_reset(void)6.37 -{6.38 - /* zero everything out, for the sake of having a consistent state. */6.39 - memset( &sh4r, 0, sizeof(sh4r) );6.40 -6.41 - /* Resume running if we were halted */6.42 - sh4r.sh4_state = SH4_STATE_RUNNING;6.43 -6.44 - sh4r.pc = 0xA0000000;6.45 - sh4r.new_pc= 0xA0000002;6.46 - sh4r.vbr = 0x00000000;6.47 - sh4r.fpscr = 0x00040001;6.48 - sh4r.sr = 0x700000F0;6.49 - sh4r.fr_bank = &sh4r.fr[0][0];6.50 -6.51 - /* Mem reset will do this, but if we want to reset _just_ the SH4... */6.52 - MMIO_WRITE( MMU, EXPEVT, EXC_POWER_RESET );6.53 -6.54 - /* Peripheral modules */6.55 - CPG_reset();6.56 - INTC_reset();6.57 - MMU_reset();6.58 - TMU_reset();6.59 - SCIF_reset();6.60 -}6.61 -6.62 -static struct breakpoint_struct sh4_breakpoints[MAX_BREAKPOINTS];6.63 -static int sh4_breakpoint_count = 0;6.64 static uint16_t *sh4_icache = NULL;6.65 static uint32_t sh4_icache_addr = 0;6.67 -void sh4_set_breakpoint( uint32_t pc, int type )6.68 -{6.69 - sh4_breakpoints[sh4_breakpoint_count].address = pc;6.70 - sh4_breakpoints[sh4_breakpoint_count].type = type;6.71 - sh4_breakpoint_count++;6.72 -}6.73 -6.74 -gboolean sh4_clear_breakpoint( uint32_t pc, int type )6.75 -{6.76 - int i;6.77 -6.78 - for( i=0; i<sh4_breakpoint_count; i++ ) {6.79 - if( sh4_breakpoints[i].address == pc &&6.80 - sh4_breakpoints[i].type == type ) {6.81 - while( ++i < sh4_breakpoint_count ) {6.82 - sh4_breakpoints[i-1].address = sh4_breakpoints[i].address;6.83 - sh4_breakpoints[i-1].type = sh4_breakpoints[i].type;6.84 - }6.85 - sh4_breakpoint_count--;6.86 - return TRUE;6.87 - }6.88 - }6.89 - return FALSE;6.90 -}6.91 -6.92 -int sh4_get_breakpoint( uint32_t pc )6.93 -{6.94 - int i;6.95 - for( i=0; i<sh4_breakpoint_count; i++ ) {6.96 - if( sh4_breakpoints[i].address == pc )6.97 - return sh4_breakpoints[i].type;6.98 - }6.99 - return 0;6.100 -}6.101 -6.102 uint32_t sh4_run_slice( uint32_t nanosecs )6.103 {6.104 int i;6.105 @@ -199,29 +116,6 @@6.106 return nanosecs;6.107 }6.109 -void sh4_stop(void)6.110 -{6.111 -6.112 -}6.113 -6.114 -void sh4_save_state( FILE *f )6.115 -{6.116 - fwrite( &sh4r, sizeof(sh4r), 1, f );6.117 - MMU_save_state( f );6.118 - INTC_save_state( f );6.119 - TMU_save_state( f );6.120 - SCIF_save_state( f );6.121 -}6.122 -6.123 -int sh4_load_state( FILE * f )6.124 -{6.125 - fread( &sh4r, sizeof(sh4r), 1, f );6.126 - MMU_load_state( f );6.127 - INTC_load_state( f );6.128 - TMU_load_state( f );6.129 - return SCIF_load_state( f );6.130 -}6.131 -6.132 /********************** SH4 emulation core ****************************/6.134 void sh4_set_pc( int pc )
.