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revision 814:f1a21df54e19
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changeset814:f1a21df54e19
parent813:262efed79218
child815:866c103d72cd
authornkeynes
dateMon Aug 18 12:18:10 2008 +0000 (15 years ago)
Move arm clock rate back to clock.h where it's supposed to be
Fix STM with R15 (should be current pc +12, was +8...) - not sure how this managed
to work as long as it did
src/aica/armcore.cview | annotate | diff | log
src/aica/armcore.hview | annotate | diff | log
src/clock.hview | annotate | diff | log
     1.1 --- a/src/aica/armcore.c	Mon Aug 18 12:16:55 2008 +0000

     1.2 +++ b/src/aica/armcore.c	Mon Aug 18 12:18:10 2008 +0000

     1.3 @@ -19,6 +19,7 @@

     1.4  #define MODULE aica_module

     1.5  #include "dream.h"

     1.6  #include "dreamcast.h"

     1.7 +#include "clock.h"

     1.8  #include "mem.h"

     1.9  #include "aica/armcore.h"

    1.10  #include "aica/aica.h"

    1.11 @@ -1230,7 +1231,7 @@

    1.12                      switch( (ir & 0x01D00000) >> 20 ) {

    1.13                      case 0: /* STMDA */

    1.14                          if( ir & 0x8000 ) {

    1.15 -                            arm_write_long( operand, armr.r[15]+4 );

    1.16 +                            arm_write_long( operand, armr.r[15]+8 );

    1.17                              operand -= 4;

    1.18                          }

    1.19                          for( i=14; i>= 0; i-- ) {

    1.20 @@ -1250,7 +1251,7 @@

    1.21                          break;

    1.22                      case 4: /* STMDA (S) */

    1.23                          if( ir & 0x8000 ) {

    1.24 -                            arm_write_long( operand, armr.r[15]+4 );

    1.25 +                            arm_write_long( operand, armr.r[15]+8 );

    1.26                              operand -= 4;

    1.27                          }

    1.28                          for( i=14; i>= 0; i-- ) {

    1.29 @@ -1286,7 +1287,7 @@

    1.30                              }

    1.31                          }

    1.32                          if( ir & 0x8000 ) {

    1.33 -                            arm_write_long( operand, armr.r[15]+4 );

    1.34 +                            arm_write_long( operand, armr.r[15]+8 );

    1.35                              operand += 4;

    1.36                          }

    1.37                          break;

    1.38 @@ -1306,7 +1307,7 @@

    1.39                              }

    1.40                          }

    1.41                          if( ir & 0x8000 ) {

    1.42 -                            arm_write_long( operand, armr.r[15]+4 );

    1.43 +                            arm_write_long( operand, armr.r[15]+8 );

    1.44                              operand += 4;

    1.45                          }

    1.46                          break;

    1.47 @@ -1331,7 +1332,7 @@

    1.48                      case 16: /* STMDB */

    1.49                          if( ir & 0x8000 ) {

    1.50                              operand -= 4;

    1.51 -                            arm_write_long( operand, armr.r[15]+4 );

    1.52 +                            arm_write_long( operand, armr.r[15]+8 );

    1.53                          }

    1.54                          for( i=14; i>= 0; i-- ) {

    1.55                              if( (ir & (1<<i)) ) {

    1.56 @@ -1351,7 +1352,7 @@

    1.57                      case 20: /* STMDB (S) */

    1.58                          if( ir & 0x8000 ) {

    1.59                              operand -= 4;

    1.60 -                            arm_write_long( operand, armr.r[15]+4 );

    1.61 +                            arm_write_long( operand, armr.r[15]+8 );

    1.62                          }

    1.63                          for( i=14; i>= 0; i-- ) {

    1.64                              if( (ir & (1<<i)) ) {

    1.65 @@ -1387,7 +1388,7 @@

    1.66                          }

    1.67                          if( ir & 0x8000 ) {

    1.68                              operand += 4;

    1.69 -                            arm_write_long( operand, armr.r[15]+4 );

    1.70 +                            arm_write_long( operand, armr.r[15]+8 );

    1.71                          }

    1.72                          break;

    1.73                      case 25: /* LDMIB */

    1.74 @@ -1407,7 +1408,7 @@

    1.75                          }

    1.76                          if( ir & 0x8000 ) {

    1.77                              operand += 4;

    1.78 -                            arm_write_long( operand, armr.r[15]+4 );

    1.79 +                            arm_write_long( operand, armr.r[15]+8 );

    1.80                          }

    1.81                          break;

    1.82                      case 29: /* LDMIB (S) */

     2.1 --- a/src/aica/armcore.h	Mon Aug 18 12:16:55 2008 +0000

     2.2 +++ b/src/aica/armcore.h	Mon Aug 18 12:18:10 2008 +0000

     2.3 @@ -28,7 +28,6 @@

     2.4  extern "C" {

     2.5  #endif

     2.6  

     2.7 -#define ARM_BASE_RATE 2 /* MHZ */

     2.8  extern uint32_t arm_cpu_freq;

     2.9  extern uint32_t arm_cpu_period;

    2.10  

     3.1 --- a/src/clock.h	Mon Aug 18 12:16:55 2008 +0000

     3.2 +++ b/src/clock.h	Mon Aug 18 12:18:10 2008 +0000

     3.3 @@ -29,7 +29,7 @@

     3.4  #define MHZ

     3.5  #define KHZ

     3.6  #define SH4_BASE_RATE 200 MHZ

     3.7 -#define ARM_BASE_RATE 33 MHZ

     3.8 +#define ARM_BASE_RATE 2 MHZ

     3.9  #define PVR2_DOT_CLOCK 27068 KHZ

    3.10  

    3.11  extern uint32_t sh4_freq;
.