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lxdream.org :: lxdream :: r936:f394309c399a
lxdream 0.9.1
released Jun 29
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changeset936:f394309c399a lxdream-mem
parent935:45246788ca00
child937:81b0c79d9788
authornkeynes
dateSat Dec 27 02:59:35 2008 +0000 (12 years ago)
branchlxdream-mem
Replace fpscr_mask/fpscr flags in xlat_cache_block with a single xlat_sh4_mode,
which tracks the field of the same name in sh4r - actually a little faster this way.
Now depends on SR.MD, FPSCR.PR and FPSCR.SZ (although it doesn't benefit from the SR
flag yet).

Also fixed the failure to check the flags in the common case (code address returned
by previous block) which took away the performance benefits, but oh well.
src/sh4/sh4.c
src/sh4/sh4.h
src/sh4/sh4trans.c
src/sh4/sh4x86.in
src/sh4/x86op.h
src/sh4/xltcache.h
1.1 --- a/src/sh4/sh4.c Sat Dec 27 02:18:17 2008 +0000
1.2 +++ b/src/sh4/sh4.c Sat Dec 27 02:59:35 2008 +0000
1.3 @@ -233,7 +233,7 @@
1.4 sh4r.in_delay_slot = FALSE;
1.5 }
1.6
1.7 - fwrite( &sh4r, sizeof(sh4r), 1, f );
1.8 + fwrite( &sh4r, offsetof(struct sh4_registers, xlat_sh4_mode), 1, f );
1.9 MMU_save_state( f );
1.10 CCN_save_state( f );
1.11 PMM_save_state( f );
1.12 @@ -247,7 +247,8 @@
1.13 if( sh4_use_translator ) {
1.14 xlat_flush_cache();
1.15 }
1.16 - fread( &sh4r, sizeof(sh4r), 1, f );
1.17 + fread( &sh4r, offsetof(struct sh4_registers, xlat_sh4_mode), 1, f );
1.18 + sh4r.xlat_sh4_mode = (sh4r.sr & SR_MD) | (sh4r.fpscr & (FPSCR_SZ|FPSCR_PR));
1.19 MMU_load_state( f );
1.20 CCN_load_state( f );
1.21 PMM_load_state( f );
1.22 @@ -336,6 +337,7 @@
1.23 sh4r.s = (newval&SR_S) ? 1 : 0;
1.24 sh4r.m = (newval&SR_M) ? 1 : 0;
1.25 sh4r.q = (newval&SR_Q) ? 1 : 0;
1.26 + sh4r.xlat_sh4_mode = (sh4r.sr & SR_MD) | (sh4r.fpscr & (FPSCR_SZ|FPSCR_PR));
1.27 intc_mask_changed();
1.28 }
1.29
1.30 @@ -345,6 +347,7 @@
1.31 sh4_switch_fr_banks();
1.32 }
1.33 sh4r.fpscr = newval & FPSCR_MASK;
1.34 + sh4r.xlat_sh4_mode = (sh4r.sr & SR_MD) | (sh4r.fpscr & (FPSCR_SZ|FPSCR_PR));
1.35 }
1.36
1.37 uint32_t FASTCALL sh4_read_sr( void )
2.1 --- a/src/sh4/sh4.h Sat Dec 27 02:18:17 2008 +0000
2.2 +++ b/src/sh4/sh4.h Sat Dec 27 02:59:35 2008 +0000
2.3 @@ -87,6 +87,9 @@
2.4 * a delay slot (certain rules apply) */
2.5 uint32_t slice_cycle; /* Current nanosecond within the timeslice */
2.6 int sh4_state; /* Current power-on state (one of the SH4_STATE_* values ) */
2.7 +
2.8 + /* Not saved */
2.9 + int xlat_sh4_mode; /* Collection of execution mode flags (derived) from fpscr, sr, etc */
2.10 };
2.11
2.12 extern struct sh4_registers sh4r;
3.1 --- a/src/sh4/sh4trans.c Sat Dec 27 02:18:17 2008 +0000
3.2 +++ b/src/sh4/sh4trans.c Sat Dec 27 02:59:35 2008 +0000
3.3 @@ -52,9 +52,11 @@
3.4 }
3.5
3.6 code = xlat_get_code_by_vma( sh4r.pc );
3.7 - if( code == NULL || (sh4r.fpscr & (FPSCR_PR|FPSCR_SZ)) != XLAT_BLOCK_FPSCR(code) ) {
3.8 + if( code == NULL || sh4r.xlat_sh4_mode != XLAT_BLOCK_MODE(code) ) {
3.9 code = sh4_translate_basic_block( sh4r.pc );
3.10 }
3.11 + } else if( sh4r.xlat_sh4_mode != XLAT_BLOCK_MODE(code) ) {
3.12 + code = sh4_translate_basic_block( sh4r.pc );
3.13 }
3.14 code = code();
3.15 }
3.16 @@ -139,8 +141,7 @@
3.17 memcpy( xlat_output, xlat_recovery, recovery_size);
3.18 xlat_current_block->recover_table_offset = xlat_output - (uint8_t *)xlat_current_block->code;
3.19 xlat_current_block->recover_table_size = xlat_recovery_posn;
3.20 - xlat_current_block->fpscr = sh4r.fpscr & (FPSCR_PR|FPSCR_SZ);
3.21 - xlat_current_block->fpscr_mask = (FPSCR_PR|FPSCR_SZ);
3.22 + xlat_current_block->xlat_sh4_mode = sh4r.xlat_sh4_mode;
3.23 xlat_commit_block( finalsize, pc-start );
3.24 return xlat_current_block->code;
3.25 }
4.1 --- a/src/sh4/sh4x86.in Sat Dec 27 02:18:17 2008 +0000
4.2 +++ b/src/sh4/sh4x86.in Sat Dec 27 02:59:35 2008 +0000
4.3 @@ -2301,18 +2301,15 @@
4.4 FRCHG {:
4.5 COUNT_INST(I_FRCHG);
4.6 check_fpuen();
4.7 - load_spreg( R_ECX, R_FPSCR );
4.8 - XOR_imm32_r32( FPSCR_FR, R_ECX );
4.9 - store_spreg( R_ECX, R_FPSCR );
4.10 + XOR_imm32_sh4r( FPSCR_FR, R_FPSCR );
4.11 call_func0( sh4_switch_fr_banks );
4.12 sh4_x86.tstate = TSTATE_NONE;
4.13 :}
4.14 FSCHG {:
4.15 COUNT_INST(I_FSCHG);
4.16 check_fpuen();
4.17 - load_spreg( R_ECX, R_FPSCR );
4.18 - XOR_imm32_r32( FPSCR_SZ, R_ECX );
4.19 - store_spreg( R_ECX, R_FPSCR );
4.20 + XOR_imm32_sh4r( FPSCR_SZ, R_FPSCR);
4.21 + XOR_imm32_sh4r( FPSCR_SZ, REG_OFFSET(xlat_sh4_mode) );
4.22 sh4_x86.tstate = TSTATE_NONE;
4.23 sh4_x86.double_size = !sh4_x86.double_size;
4.24 :}
5.1 --- a/src/sh4/x86op.h Sat Dec 27 02:18:17 2008 +0000
5.2 +++ b/src/sh4/x86op.h Sat Dec 27 02:59:35 2008 +0000
5.3 @@ -206,6 +206,7 @@
5.4 #define XOR_r32_r32(r1,r2) OP(0x33); MODRM_rm32_r32(r1,r2)
5.5 #define XOR_sh4r_r32(disp,r1) OP(0x33); MODRM_r32_sh4r(r1,disp)
5.6 #define XOR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,6); OP32(imm)
5.7 +#define XOR_imm32_sh4r(imm,disp) OP(0x81); MODRM_r32_sh4r(6, disp); OP32(imm)
5.8
5.9
5.10 /* Floating point ops */
6.1 --- a/src/sh4/xltcache.h Sat Dec 27 02:18:17 2008 +0000
6.2 +++ b/src/sh4/xltcache.h Sat Dec 27 02:59:35 2008 +0000
6.3 @@ -41,7 +41,7 @@
6.4 int active; /* 0 = deleted, 1 = normal. 2 = accessed (temp-space only) */
6.5 uint32_t size;
6.6 void **lut_entry; /* For deletion */
6.7 - uint32_t fpscr_mask, fpscr; /* fpscr condition check */
6.8 + uint32_t xlat_sh4_mode; /* comparison with sh4r.xlat_sh4_mode */
6.9 uint32_t recover_table_offset; // Offset from code[0] of the recovery table;
6.10 uint32_t recover_table_size;
6.11 unsigned char code[0];
6.12 @@ -51,8 +51,7 @@
6.13
6.14 #define XLAT_BLOCK_FOR_CODE(code) (((xlat_cache_block_t)code)-1)
6.15
6.16 -#define XLAT_BLOCK_FPSCR_MASK(code) (XLAT_BLOCK_FOR_CODE(code)->fpscr_mask)
6.17 -#define XLAT_BLOCK_FPSCR(code) (XLAT_BLOCK_FOR_CODE(code)->fpscr_mask)
6.18 +#define XLAT_BLOCK_MODE(code) (XLAT_BLOCK_FOR_CODE(code)->xlat_sh4_mode)
6.19
6.20 /**
6.21 * Initialize the translation cache
.