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lxdream.org :: lxdream :: r272:fb6be85235e8
lxdream 0.9.1
released Jun 29
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changeset272:fb6be85235e8
parent271:2ec052d24881
child273:48eb3304a41e
authornkeynes
dateThu Jan 11 06:53:31 2007 +0000 (17 years ago)
Fix hsync timing checks
Add timer_init and timer_run to preset the timer ahead of time
test/testdisp.c
test/timer.c
1.1 --- a/test/testdisp.c Thu Jan 11 06:51:52 2007 +0000
1.2 +++ b/test/testdisp.c Thu Jan 11 06:53:31 2007 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: testdisp.c,v 1.2 2007-01-06 04:08:11 nkeynes Exp $
1.6 + * $Id: testdisp.c,v 1.3 2007-01-11 06:53:31 nkeynes Exp $
1.7 *
1.8 * Display (2D) tests. Mainly tests video timing / sync (obviously
1.9 * it can't actually test display output since there's no way of
1.10 @@ -207,14 +207,13 @@
1.11 uint32_t last_line = t->total_lines - 1;
1.12 int i;
1.13
1.14 + timer_init();
1.15 WAIT_LINE( t->total_lines - 1 );
1.16 - asic_clear();
1.17 for( i=0; i< MAX_FRAME_WAIT; i++ ) {
1.18 stat = long_read(SYNCSTAT) & 0x07FF;
1.19 if( stat == 0 ) {
1.20 break;
1.21 } else if( (stat & 0x03FF) != last_line ) {
1.22 - asic_clear();
1.23 last_line = stat & 0x03FF;
1.24 }
1.25 }
1.26 @@ -222,22 +221,52 @@
1.27 fprintf( stderr, "Timeout waiting for line 0 field 0\n" );
1.28 return -1;
1.29 }
1.30 - timer_start();
1.31 - asic_clear();
1.32 - if( asic_check( EVENT_RETRACE ) != 0 ) {
1.33 - fprintf( stderr, "Failed to clear retrace event ?\n" );
1.34 - return -1;
1.35 + timer_run();
1.36 + CHECK_IEQUALS( stat, 0 ); /* VSYNC, HSYNC, no display */
1.37 +
1.38 + uint32_t start_of_line = 0;
1.39 + uint32_t laststat = stat;
1.40 + uint32_t lastline = 0;
1.41 + int hsync_count = 0;
1.42 + while(1) { /* for each line */
1.43 + stat = long_read(SYNCSTAT);
1.44 + if( stat != laststat ) {
1.45 + uint32_t cur_time = timer_gettime_us();
1.46 + uint32_t time = cur_time - start_of_line;
1.47 + uint32_t line = stat & 0x03FF;
1.48 + if( line != lastline ) {
1.49 + if( time != t->line_time_us && /* Allow variance of +1 us */
1.50 + time-1 != t->line_time_us ) {
1.51 + fprintf( stderr, "Assertion failed: Expected line time %dus on line %d but was %dus: %d, %d, %d\n",
1.52 + t->line_time_us, lastline, time, start_of_line, cur_time, line );
1.53 + return -1;
1.54 + }
1.55 + if( line == 0 ) {
1.56 + CHECK_IEQUALS( t->total_lines-1, lastline );
1.57 + break;
1.58 + }
1.59 + start_of_line = cur_time;
1.60 + lastline = line;
1.61 + } else if( (stat ^ laststat) == 0x1000 && (stat&0x1000) ) {
1.62 + hsync_count++;
1.63 + if( time != t->hsync_width_us &&
1.64 + time-1 != t->hsync_width_us ) {
1.65 + fprintf( stderr, "Assertion failed: Expected hsync width %dus on line %d but was %dus, stat = %08X, count=%d\n",
1.66 + t->hsync_width_us, lastline, time, stat, hsync_count );
1.67 + return -1;
1.68 + }
1.69 + } else {
1.70 + // fprintf( stderr, "Change %08X to %08X\n", laststat, stat );
1.71 + }
1.72 + laststat = stat;
1.73 + }
1.74 }
1.75 - CHECK_IEQUALS( stat, 0 ); /* VSYNC, HSYNC, no display */
1.76 - WAIT_LINE(1);
1.77 - line_time = timer_gettime_us();
1.78 - WAIT_LASTLINE(t->total_lines-1);
1.79 +
1.80 field_time = timer_gettime_us();
1.81
1.82 - if( line_time != t->line_time_us ||
1.83 - field_time != t->field_time_us ) {
1.84 - fprintf( stderr, "Assertion failed: Expected Timing %d,%d but was %d,%d\n",
1.85 - t->line_time_us, t->field_time_us, line_time, field_time );
1.86 + if( field_time != t->field_time_us ) {
1.87 + fprintf( stderr, "Assertion failed: Expected field time %dus but was %dus\n",
1.88 + t->field_time_us, field_time );
1.89 return -1;
1.90 }
1.91 return 0;
2.1 --- a/test/timer.c Thu Jan 11 06:51:52 2007 +0000
2.2 +++ b/test/timer.c Thu Jan 11 06:53:31 2007 +0000
2.3 @@ -12,13 +12,21 @@
2.4 * Initialize the on-chip timer controller. We snag TMU channel 2 in its
2.5 * highest resolution mode, and start it counting down from max_int.
2.6 */
2.7 -void timer_start() {
2.8 +void timer_init() {
2.9 unsigned int val = byte_read(TSTR);
2.10 byte_write( TSTR, val & (~(1<<TMU_CHANNEL)) ); /* Stop counter */
2.11 long_write( TCOR(TMU_CHANNEL), 0xFFFFFFFF );
2.12 long_write( TCNT(TMU_CHANNEL), 0xFFFFFFFF );
2.13 word_write( TCR(TMU_CHANNEL), 0x00000000 );
2.14 - byte_write( TSTR, val | (1<<TMU_CHANNEL) );
2.15 +}
2.16 +
2.17 +void timer_run() {
2.18 + byte_write( TSTR, byte_read(TSTR) | (1<<TMU_CHANNEL) );
2.19 +}
2.20 +
2.21 +void timer_start() {
2.22 + timer_init();
2.23 + timer_run();
2.24 }
2.25
2.26 /**
.