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lxdream.org :: Forums :: View topic - Homebrew development
lxdream.org :: Forums :: View topic - Homebrew development
lxdream 0.9.1
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 Post subject: Homebrew development
PostPosted: Sat Jan 02, 2010 12:46 pm 
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Posts: 17
Hey! I've got a question in homebrew.
I'm using lxdream for testing my binaries and it works like a charm, so congrats!

But I've got a question. Do you know KallistiOS? It has a function named dbglog or silimar that it's called when you make an "assert" and in NULLDC (win emulator) shows those messages in the commandline, but lxdream does not. Is there any way I can see those messages? They're quite important for debugging pruposes.

Another question! My game breaks after 2 or 4 seconds of perfect working and jumps to address AC00E0B2 which is a BRA AC00E0B2. This is BIOS code, am I wrong? Why this loop in BIOS? Maybe a default exception handler?

Thanks a lot for the work!!!!

David


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 Post subject: Re: Homebrew development
PostPosted: Mon Jan 04, 2010 12:04 am 
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 Post subject: Re: Homebrew development
PostPosted: Thu Feb 18, 2010 10:03 pm 
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 Post subject: Re: Homebrew development
PostPosted: Thu Feb 25, 2010 2:47 am 
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 Post subject: Re: Homebrew development
PostPosted: Wed Mar 03, 2010 12:39 pm 
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Posts: 17
My aim is to boot up lxdream with an ELF file and some data folder as the CDROM.
So I have blabla.elf data.bin and IP.BIN. I could create a CDROM and then boot it, but I want to do that easily. So the Load Binary option has no place to choos the CDROM root folder!

By the way, my game is for PC and PSP. In PSP port I have two processors (the PSP). THe secondary is used for audio decoding. How can this be done in DC? I know it has an ARM audio chip. DO you know where can I find more information???
Also I'll need info about the hardware, specially the cache (writeback and invalidate) as the processors will share memory.

Thanks a lot!


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 Post subject: Re: Homebrew development
PostPosted: Fri Mar 05, 2010 2:26 am 
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 Post subject: Re: Homebrew development
PostPosted: Sat Mar 06, 2010 12:18 am 
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Posts: 17
I found something that might help me.
First is OCBWB instruction to writeback cache and OCBI which invalidates it. But I don't know well what the register means!!!
Another thing is that ORing the addresses with 0x20000000 makes memory bypass the cache (as the PSP does), this is good for writing to external ram safely.
But where is this memory mapped? I assume that the start address of the ARM core is the begining of its memory, am I correct? Can the ARM access all the RAM? The ARM has no cache, this is good too.
And how can I reset the ARM core? I'd be nice a hardware scheme of the connections.

So where can I find answers?

Thanks a lot!


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 Post subject: Re: Homebrew development
PostPosted: Sat Mar 06, 2010 4:15 am 
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 Post subject: Re: Homebrew development
PostPosted: Mon Mar 08, 2010 12:43 am 
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Posts: 17
I had a look at the website you talk about and there's an example of player (it seems).
What is the G2 Bus? I've seen that the code uses functions like G2Read(address,value_ptr).
What is this bus and why we need to read through special functions!?

Thanks a lot! This information is so useful!


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 Post subject: Re: Homebrew development
PostPosted: Wed Mar 10, 2010 2:03 am 
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