lxdream 0.9.1| filename | STATUS |
| changeset | 896:433ac65ca5eb |
| prev | 354:8bf6587e1f9b |
| next | 1047:e29dd1564277 |
| author | nkeynes |
| date | Wed Nov 05 10:05:08 2008 +0000 (15 years ago) |
| permissions | -rw-r--r-- |
| last change | Fix (extremely boneheaded) failure to convert pc to physical address before storing in the translation cache (in other words, the translation cache was effectively disabled for MMU code). MMU code is now about 3 times faster... |
| file | annotate | diff | log | raw |
| nkeynes@176 | 1 | Current status |
| nkeynes@176 | 2 | ============== |
| nkeynes@176 | 3 | |
| nkeynes@176 | 4 | General issues |
| nkeynes@896 | 5 | - Slow |
| nkeynes@354 | 6 | - No I/O timing whatsoever except for video events. |
| nkeynes@176 | 7 | (ie DMA, rendering, GD-Rom operations need to take > 0 ms to complete) |
| nkeynes@176 | 8 | |
| nkeynes@176 | 9 | SH4 Core |
| nkeynes@896 | 10 | + Base instruction set |
| nkeynes@354 | 11 | - no FPU exceptions |
| nkeynes@176 | 12 | - Not remotely cycle-correct timing |
| nkeynes@176 | 13 | |
| nkeynes@176 | 14 | SH4 On-chip peripherals |
| nkeynes@176 | 15 | BSC |
| nkeynes@176 | 16 | * Not implemented except for PCTRA/PDTRA, and that part is quite dodgy. |
| nkeynes@176 | 17 | CPG |
| nkeynes@176 | 18 | * Complete? |
| nkeynes@176 | 19 | DMAC |
| nkeynes@176 | 20 | * Implemented to extent needed by ASIC DMA, not fully complete |
| nkeynes@176 | 21 | INTC |
| nkeynes@176 | 22 | * Complete? |
| nkeynes@176 | 23 | RTC |
| nkeynes@176 | 24 | * Not implemented |
| nkeynes@176 | 25 | SCI |
| nkeynes@176 | 26 | * Not implemented (not even hooked up in the hardware?) |
| nkeynes@176 | 27 | SCIF |
| nkeynes@176 | 28 | * Complete? (not heavily tested) |
| nkeynes@176 | 29 | TMU |
| nkeynes@176 | 30 | * Complete? |
| nkeynes@176 | 31 | UBC |
| nkeynes@176 | 32 | * Not implemented |
| nkeynes@176 | 33 | |
| nkeynes@176 | 34 | AICA SPU |
| nkeynes@176 | 35 | ARM core |
| nkeynes@176 | 36 | + Base instruction set (Complete?) |
| nkeynes@176 | 37 | - No thumb support |
| nkeynes@176 | 38 | - No system coprocessor support |
| nkeynes@176 | 39 | - No cycle-correct timing |
| nkeynes@176 | 40 | DSP |
| nkeynes@176 | 41 | + Basic sound generation |
| nkeynes@896 | 42 | - Really bad sound |
| nkeynes@176 | 43 | - No waveform support |
| nkeynes@176 | 44 | - No LFO support |
| nkeynes@176 | 45 | |
| nkeynes@176 | 46 | PVR2 GPU |
| nkeynes@176 | 47 | TA |
| nkeynes@354 | 48 | - Functionally complete |
| nkeynes@354 | 49 | - Some bugs/error behaviour not implemented |
| nkeynes@354 | 50 | - No timing support |
| nkeynes@176 | 51 | Render |
| nkeynes@176 | 52 | + Basic opaque and translucent polygon support |
| nkeynes@176 | 53 | + Depth buffer, alpha blend, most poly modes |
| nkeynes@896 | 54 | + Opaque shadow volumes |
| nkeynes@354 | 55 | - Basic translucent poly sorting |
| nkeynes@896 | 56 | - Y-scaler |
| nkeynes@176 | 57 | - No modifier volumes |
| nkeynes@176 | 58 | Texture |
| nkeynes@354 | 59 | + All texture formats supported except bump maps |
| nkeynes@176 | 60 | |
| nkeynes@176 | 61 | GD-Rom |
| nkeynes@176 | 62 | IDE interface |
| nkeynes@176 | 63 | + Supports Ident, Set feature, and Packet (and no other IDE commands) |
| nkeynes@176 | 64 | + Supports PIO and DMA modes |
| nkeynes@176 | 65 | GD-Rom interface |
| nkeynes@176 | 66 | + Supports Test ready, Ident, Read TOC, Read Session info, Sense request, and Read CD |
| nkeynes@176 | 67 | commands |
| nkeynes@176 | 68 | - other 20-odd commands not supported |
| nkeynes@176 | 69 | |
| nkeynes@176 | 70 | Maple |
| nkeynes@176 | 71 | + Maple bus complete? |
| nkeynes@176 | 72 | + Standard DC controllers |
| nkeynes@176 | 73 | - No support for VMU |
| nkeynes@896 | 74 | - No dynamic timing |
| nkeynes@176 | 75 | |
| nkeynes@176 | 76 | Network |
| nkeynes@176 | 77 | - Not implemented |
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