filename | test/sh4/tlb.s |
changeset | 586:2a3ba82cf243 |
next | 976:e57a25d9eb7d |
author | nkeynes |
date | Thu Feb 14 13:54:11 2008 +0000 (16 years ago) |
branch | lxdream-render |
permissions | -rw-r--r-- |
last change | Commit render work in progress. Main changes: * Preliminary OSMesa support * Move the generic gl code out to pvr2/ * Implement scene data structure + reader * Remove the 1/z adjustments |
file | annotate | diff | log | raw |
nkeynes@586 | 1 | .section .text |
nkeynes@586 | 2 | .include "sh4/inc.s" |
nkeynes@586 | 3 | ! |
nkeynes@586 | 4 | ! Test for correct UTLB operation. |
nkeynes@586 | 5 | ! |
nkeynes@586 | 6 | ! Note we don't test triggering a TLB multiple-hit exception - it's a reset |
nkeynes@586 | 7 | ! rather than a regular exception. |
nkeynes@586 | 8 | |
nkeynes@586 | 9 | .global _test_tlb |
nkeynes@586 | 10 | _test_tlb: |
nkeynes@586 | 11 | start_test |
nkeynes@586 | 12 | |
nkeynes@586 | 13 | ! Turn on AT, and flush the current TLB (if any) |
nkeynes@586 | 14 | ! Initialize to SV=0, SQMD=0, URB=URC=LRUI=0 |
nkeynes@586 | 15 | mov.l test_tlb_mmucr, r0 |
nkeynes@586 | 16 | mov #5, r1 |
nkeynes@586 | 17 | mov.l r1, @r0 |
nkeynes@586 | 18 | |
nkeynes@586 | 19 | ! Privileged mode tests first (much easier) |
nkeynes@586 | 20 | add #1, r12 |
nkeynes@586 | 21 | mov.l test_tlb1_pteh, r1 |
nkeynes@586 | 22 | mov.l test_tlb_pteh, r2 |
nkeynes@586 | 23 | mov.l r1, @r2 |
nkeynes@586 | 24 | mov.l test_tlb1_ptel, r1 |
nkeynes@586 | 25 | mov.l test_tlb_ptel, r2 |
nkeynes@586 | 26 | mov.l r1, @r2 |
nkeynes@586 | 27 | ldtlb |
nkeynes@586 | 28 | |
nkeynes@586 | 29 | ! Simple read |
nkeynes@586 | 30 | mov.l test_tlb1_direct, r3 |
nkeynes@586 | 31 | mov #42, r2 |
nkeynes@586 | 32 | mov.l r2, @r3 |
nkeynes@586 | 33 | mov.l test_tlb1_mmu, r0 |
nkeynes@586 | 34 | mov.l @r0, r1 |
nkeynes@586 | 35 | cmp/eq r1, r2 |
nkeynes@586 | 36 | bt test_tlb_2 |
nkeynes@586 | 37 | fail test_tlb_str_k |
nkeynes@586 | 38 | bra test_tlb_2 |
nkeynes@586 | 39 | nop |
nkeynes@586 | 40 | test_tlb1_pteh: |
nkeynes@586 | 41 | .long 0x12345012 |
nkeynes@586 | 42 | test_tlb1_ptel: |
nkeynes@586 | 43 | .long 0x005F8120 |
nkeynes@586 | 44 | |
nkeynes@586 | 45 | test_tlb_2: |
nkeynes@586 | 46 | ! Trigger an initial-page-write exception |
nkeynes@586 | 47 | add #1, r12 |
nkeynes@586 | 48 | expect_exc 0x00000080 |
nkeynes@586 | 49 | mov.l test_tlb1_mmu, r0 |
nkeynes@586 | 50 | test_tlb2_exc: |
nkeynes@586 | 51 | mov.l r0, @r0 |
nkeynes@586 | 52 | assert_tlb_exc_caught test_tlb_str_k test_tlb2_exc test_tlb1_mmu |
nkeynes@586 | 53 | |
nkeynes@586 | 54 | test_tlb_3: |
nkeynes@586 | 55 | ! Trigger a missing page read exception by invalidation |
nkeynes@586 | 56 | add #1, r12 |
nkeynes@586 | 57 | mov.l test_tlb3_addr, r1 |
nkeynes@586 | 58 | mov.l test_tlb3_data, r2 |
nkeynes@586 | 59 | mov.l r2, @r1 |
nkeynes@586 | 60 | |
nkeynes@586 | 61 | expect_exc 0x00000040 |
nkeynes@586 | 62 | mov.l test_tlb1_mmu, r0 |
nkeynes@586 | 63 | test_tlb3_exc: |
nkeynes@586 | 64 | mov.l @r0, r2 |
nkeynes@586 | 65 | assert_tlb_exc_caught test_tlb_str_k, test_tlb3_exc, test_tlb1_mmu |
nkeynes@586 | 66 | bra test_tlb_4 |
nkeynes@586 | 67 | nop |
nkeynes@586 | 68 | |
nkeynes@586 | 69 | test_tlb3_addr: |
nkeynes@586 | 70 | .long 0xF6000F80 |
nkeynes@586 | 71 | test_tlb3_data: |
nkeynes@586 | 72 | .long 0x12345212 |
nkeynes@586 | 73 | |
nkeynes@586 | 74 | test_tlb_4: |
nkeynes@586 | 75 | ! Test missing page write exception on the same page |
nkeynes@586 | 76 | add #1, r12 |
nkeynes@586 | 77 | expect_exc 0x00000060 |
nkeynes@586 | 78 | mov.l test_tlb1_mmu, r0 |
nkeynes@586 | 79 | test_tlb4_exc: |
nkeynes@586 | 80 | mov.l r2, @r0 |
nkeynes@586 | 81 | assert_tlb_exc_caught test_tlb_str_k, test_tlb4_exc, test_tlb1_mmu |
nkeynes@586 | 82 | |
nkeynes@586 | 83 | test_tlb_5: ! Test initial write exception |
nkeynes@586 | 84 | add #1, r12 |
nkeynes@586 | 85 | |
nkeynes@586 | 86 | mov.l test_tlb5_addr, r1 |
nkeynes@586 | 87 | mov.l test_tlb5_data, r2 |
nkeynes@586 | 88 | mov.l r2, @r1 |
nkeynes@586 | 89 | |
nkeynes@586 | 90 | expect_exc 0x00000080 |
nkeynes@586 | 91 | mov.l test_tlb1_mmu, r0 |
nkeynes@586 | 92 | mov #63, r3 |
nkeynes@586 | 93 | test_tlb5_exc: |
nkeynes@586 | 94 | mov.l r3, @r0 |
nkeynes@586 | 95 | assert_tlb_exc_caught test_tlb_str_k, test_tlb5_exc, test_tlb1_mmu |
nkeynes@586 | 96 | mov.l test_tlb1_direct, r3 |
nkeynes@586 | 97 | mov.l @r3, r4 |
nkeynes@586 | 98 | mov #42, r2 |
nkeynes@586 | 99 | cmp/eq r2, r4 |
nkeynes@586 | 100 | bf test_tlb5_fail |
nkeynes@586 | 101 | mov.l test_tlb1_mmu, r0 |
nkeynes@586 | 102 | mov.l @r0, r3 |
nkeynes@586 | 103 | cmp/eq r2, r3 |
nkeynes@586 | 104 | bt test_tlb_6 |
nkeynes@586 | 105 | test_tlb5_fail: |
nkeynes@586 | 106 | fail test_tlb_str_k |
nkeynes@586 | 107 | |
nkeynes@586 | 108 | test_tlb5_addr: |
nkeynes@586 | 109 | .long 0xF6000000 |
nkeynes@586 | 110 | test_tlb5_data: |
nkeynes@586 | 111 | .long 0x12345112 |
nkeynes@586 | 112 | |
nkeynes@586 | 113 | test_tlb_6:! Test successful write. |
nkeynes@586 | 114 | add #1, r12 |
nkeynes@586 | 115 | |
nkeynes@586 | 116 | mov.l test_tlb6_addr, r1 |
nkeynes@586 | 117 | mov.l test_tlb6_data, r2 |
nkeynes@586 | 118 | mov.l r2, @r1 |
nkeynes@586 | 119 | |
nkeynes@586 | 120 | mov.l test_tlb1_mmu, r0 |
nkeynes@586 | 121 | mov #77, r3 |
nkeynes@586 | 122 | mov.l r3, @r0 |
nkeynes@586 | 123 | mov.l test_tlb1_direct, r1 |
nkeynes@586 | 124 | mov.l @r1, r2 |
nkeynes@586 | 125 | cmp/eq r2, r3 |
nkeynes@586 | 126 | bt test_tlb_7 |
nkeynes@586 | 127 | fail test_tlb_str_k |
nkeynes@586 | 128 | bra test_tlb_7 |
nkeynes@586 | 129 | nop |
nkeynes@586 | 130 | |
nkeynes@586 | 131 | test_tlb_7: |
nkeynes@586 | 132 | bra test_tlb_end |
nkeynes@586 | 133 | nop |
nkeynes@586 | 134 | |
nkeynes@586 | 135 | test_tlb6_addr: |
nkeynes@586 | 136 | .long 0xF6000F80 |
nkeynes@586 | 137 | test_tlb6_data: |
nkeynes@586 | 138 | .long 0x12345312 |
nkeynes@586 | 139 | |
nkeynes@586 | 140 | |
nkeynes@586 | 141 | test_tlb1_mmu: |
nkeynes@586 | 142 | .long 0x12345040 |
nkeynes@586 | 143 | test_tlb1_direct: |
nkeynes@586 | 144 | .long 0xA05F8040 ! Display border colour |
nkeynes@586 | 145 | |
nkeynes@586 | 146 | test_tlb_end: |
nkeynes@586 | 147 | xor r0, r0 |
nkeynes@586 | 148 | mov.l test_tlb_mmucr, r1 |
nkeynes@586 | 149 | mov.l r0, @r1 |
nkeynes@586 | 150 | |
nkeynes@586 | 151 | end_test test_tlb_str_k |
nkeynes@586 | 152 | |
nkeynes@586 | 153 | test_tlb_mmucr: |
nkeynes@586 | 154 | .long 0xFF000010 |
nkeynes@586 | 155 | test_tlb_pteh: |
nkeynes@586 | 156 | .long 0xFF000000 |
nkeynes@586 | 157 | test_tlb_ptel: |
nkeynes@586 | 158 | .long 0xFF000004 |
nkeynes@586 | 159 | test_tlb_tea: |
nkeynes@586 | 160 | .long 0xFF00000C |
nkeynes@586 | 161 | test_tlb_str: |
nkeynes@586 | 162 | .string "TLB" |
nkeynes@586 | 163 | .align 4 |
nkeynes@586 | 164 | test_tlb_str_k: |
nkeynes@586 | 165 | .long test_tlb_str |
.