Search
lxdream.org :: lxdream/src/clock.h
lxdream 0.9.1
released Jun 29
Download Now
filename src/clock.h
changeset 814:f1a21df54e19
prev736:a02d1475ccfd
author nkeynes
date Sat Dec 27 02:59:35 2008 +0000 (15 years ago)
branchlxdream-mem
permissions -rw-r--r--
last change Replace fpscr_mask/fpscr flags in xlat_cache_block with a single xlat_sh4_mode,
which tracks the field of the same name in sh4r - actually a little faster this way.
Now depends on SR.MD, FPSCR.PR and FPSCR.SZ (although it doesn't benefit from the SR
flag yet).

Also fixed the failure to check the flags in the common case (code address returned
by previous block) which took away the performance benefits, but oh well.
file annotate diff log raw
nkeynes@19
     1
/**
nkeynes@561
     2
 * $Id$
nkeynes@736
     3
 * 
nkeynes@19
     4
 * External interface to the dreamcast serial port, implemented by 
nkeynes@19
     5
 * sh4/scif.c
nkeynes@19
     6
 *
nkeynes@19
     7
 * Copyright (c) 2005 Nathan Keynes.
nkeynes@19
     8
 *
nkeynes@19
     9
 * This program is free software; you can redistribute it and/or modify
nkeynes@19
    10
 * it under the terms of the GNU General Public License as published by
nkeynes@19
    11
 * the Free Software Foundation; either version 2 of the License, or
nkeynes@19
    12
 * (at your option) any later version.
nkeynes@19
    13
 *
nkeynes@19
    14
 * This program is distributed in the hope that it will be useful,
nkeynes@19
    15
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
nkeynes@19
    16
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
nkeynes@19
    17
 * GNU General Public License for more details.
nkeynes@19
    18
 */
nkeynes@736
    19
nkeynes@736
    20
#ifndef lxdream_clock_H
nkeynes@736
    21
#define lxdream_clock_H 1
nkeynes@19
    22
nkeynes@19
    23
#include <stdint.h>
nkeynes@19
    24
nkeynes@19
    25
#ifdef __cplusplus
nkeynes@19
    26
extern "C" {
nkeynes@19
    27
#endif
nkeynes@19
    28
nkeynes@23
    29
#define MHZ
nkeynes@265
    30
#define KHZ
nkeynes@19
    31
#define SH4_BASE_RATE 200 MHZ
nkeynes@814
    32
#define ARM_BASE_RATE 2 MHZ
nkeynes@265
    33
#define PVR2_DOT_CLOCK 27068 KHZ
nkeynes@19
    34
nkeynes@23
    35
extern uint32_t sh4_freq;
nkeynes@23
    36
extern uint32_t sh4_peripheral_freq;
nkeynes@23
    37
extern uint32_t sh4_bus_freq;
nkeynes@30
    38
extern uint32_t sh4_cpu_period;
nkeynes@30
    39
extern uint32_t sh4_peripheral_period;
nkeynes@30
    40
extern uint32_t sh4_bus_period;
nkeynes@23
    41
extern uint32_t arm_freq;
nkeynes@19
    42
nkeynes@19
    43
#ifdef __cplusplus
nkeynes@19
    44
}
nkeynes@19
    45
#endif
nkeynes@19
    46
nkeynes@19
    47
#endif
.