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lxdream.org :: lxdream/src/asic.h :: diff
lxdream 0.9.1
released Jun 29
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filename src/asic.h
changeset 125:49bf45f8210a
prev65:9f124c245fc6
next137:41907543d890
author nkeynes
date Thu Mar 30 11:26:45 2006 +0000 (18 years ago)
permissions -rw-r--r--
last change Treat the 0x11000000 region as write-only texture ram (appears to be correct)
file annotate diff log raw
1.1 --- a/src/asic.h Tue Jan 03 12:21:45 2006 +0000
1.2 +++ b/src/asic.h Thu Mar 30 11:26:45 2006 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: asic.h,v 1.5 2006-01-03 12:21:45 nkeynes Exp $
1.6 + * $Id: asic.h,v 1.6 2006-03-22 14:29:00 nkeynes Exp $
1.7 *
1.8 * Support for the miscellaneous ASIC functions (Primarily event multiplexing,
1.9 * and DMA). Includes MMIO definitions for the 5f6000 and 5f7000 regions,
1.10 @@ -94,11 +94,11 @@
1.11 BYTE_PORT( 0x094, IDELBA2, PORT_RW, 0, "IDE LBA hi" ) /* AKA Cyl hi */
1.12 BYTE_PORT( 0x098, IDEDEV, PORT_RW, 0, "IDE Device" )
1.13 BYTE_PORT( 0x09C, IDECMD, PORT_RW, 0, "IDE Command/Status" )
1.14 - LONG_PORT( 0x404, EXTDMASH4, PORT_MRW, 0, "Ext DMA SH4 address" )
1.15 - LONG_PORT( 0x408, EXTDMASIZ, PORT_MRW, 0, "Ext DMA Size" )
1.16 - LONG_PORT( 0x40C, EXTDMADIR, PORT_MRW, 0, "Ext DMA Direction" )
1.17 - LONG_PORT( 0x414, EXTDMACTL1, PORT_MRW, 0, "Ext DMA Control 1" )
1.18 - LONG_PORT( 0x418, EXTDMACTL2, PORT_MRW, 0, "Ext DMA Control 2" )
1.19 + LONG_PORT( 0x404, IDEDMASH4, PORT_MRW, 0, "IDE DMA SH4 address" )
1.20 + LONG_PORT( 0x408, IDEDMASIZ, PORT_MRW, 0, "IDE DMA Size" )
1.21 + LONG_PORT( 0x40C, IDEDMADIR, PORT_MRW, 0, "IDE DMA Direction" )
1.22 + LONG_PORT( 0x414, IDEDMACTL1, PORT_MRW, 0, "IDE DMA Control 1" )
1.23 + LONG_PORT( 0x418, IDEDMACTL2, PORT_MRW, 0, "IDE DMA Control 2" )
1.24 WORD_PORT( 0x480, EXTDMAUNK0, PORT_MRW, 0, "Ext DMA <unknown0>" )
1.25 LONG_PORT( 0x484, EXTDMAUNK1, PORT_MRW, 0, "Ext DMA <unknown1>" )
1.26 LONG_PORT( 0x488, EXTDMAUNK2, PORT_MRW, 0, "Ext DMA <unknown2>" )
1.27 @@ -176,7 +176,7 @@
1.28 #define EVENT_PVR_TRANSMOD_DONE 10
1.29 #define EVENT_MAPLE_DMA 12
1.30 #define EVENT_MAPLE_ERR 13 /* ??? */
1.31 -#define EVENT_GDROM_DMA 14
1.32 +#define EVENT_IDE_DMA 14
1.33 #define EVENT_SPU_DMA0 15
1.34 #define EVENT_SPU_DMA1 16
1.35 #define EVENT_SPU_DMA2 17
1.36 @@ -184,8 +184,18 @@
1.37 #define EVENT_PVR_DMA 19
1.38 #define EVENT_PVR_PUNCHOUT_DONE 21
1.39
1.40 -#define EVENT_GDROM_CMD 32
1.41 +#define EVENT_IDE 32
1.42 #define EVENT_AICA 33
1.43
1.44 +/**
1.45 + * Raise an ASIC event
1.46 + */
1.47 void asic_event( int event );
1.48 +
1.49 +/**
1.50 + * Clear an ASIC event. Currently only the IDE controller is known to use
1.51 + * this functionality.
1.52 + */
1.53 +void asic_clear_event( int event );
1.54 +
1.55 void asic_init( void );
.