filename | test/timer.c |
changeset | 225:e5cea6125580 |
next | 262:bc96e0b79308 |
author | nkeynes |
date | Wed Dec 20 11:24:16 2006 +0000 (17 years ago) |
permissions | -rw-r--r-- |
last change | Tidy up the core IDE test case - now passes (usually) on the real thing. Main surprise was that it seems to always fail the first packet command after a reset with code 06,29 (drive reset), no matter how long its been since the reset. |
file | annotate | diff | log | raw |
1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +00001.2 +++ b/test/timer.c Wed Dec 20 11:24:16 2006 +00001.3 @@ -0,0 +1,45 @@1.4 +#include "../lib.h"1.5 +#define TMU_CHANNEL 21.6 +1.7 +#define TOCR 0xFFD80000 /* Output control register */1.8 +#define TSTR 0xFFD80004 /* Start register */1.9 +#define TCOR(c) (0xFFD80008 + (c*12)) /* Constant register */1.10 +#define TCNT(c) (0xFFD8000C + (c*12)) /* Count register */1.11 +#define TCR(c) (0xFFD80010 + (c*12)) /* Control register */1.12 +1.13 +/**1.14 + * Initialize the on-chip timer controller. We snag TMU channel 2 in its1.15 + * highest resolution mode, and start it counting down from max_int.1.16 + */1.17 +void timer_start() {1.18 + unsigned int val = long_read(TSTR);1.19 + long_write( TSTR, val & (~(1<<TMU_CHANNEL)) ); /* Stop counter */1.20 + long_write( TCOR(TMU_CHANNEL), 0xFFFFFFFF );1.21 + long_write( TCNT(TMU_CHANNEL), 0xFFFFFFFF );1.22 + long_write( TCR(TMU_CHANNEL), 0x00000000 );1.23 + long_write( TSTR, val | (1<<TMU_CHANNEL) );1.24 +}1.25 +1.26 +/**1.27 + * Report the current value of TMU2.1.28 + */1.29 +long timer_gettime() {1.30 + return long_read(TCNT(TMU_CHANNEL));1.31 +}1.32 +1.33 +/**1.34 + * Stop TMU2 and report the current value.1.35 + */1.36 +long timer_stop() {1.37 + long_write( TSTR, long_read(TSTR) & (~(1<<TMU_CHANNEL)) );1.38 + return long_read( TCNT(TMU_CHANNEL) );1.39 +}1.40 +1.41 +1.42 +/**1.43 + * Convert the supplied timer value to a number of micro seconds since the timer1.44 + * was started.1.45 + */1.46 +long timer_to_microsecs( long value ) {1.47 + return value;1.48 +}
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