1.1 --- a/src/sh4/sh4x86.c	Sun Nov 18 11:12:44 2007 +0000
     1.2 +++ b/src/sh4/sh4x86.c	Mon Nov 19 08:51:03 2007 +0000
     1.3 @@ -266,6 +266,9 @@
     1.4  
     1.5  #if SH4_TRANSLATOR == TARGET_X86_64
     1.6  /* X86-64 has different calling conventions... */
     1.7 +
     1.8 +#define load_ptr( reg, ptr ) load_imm64( reg, (uint64_t)ptr );
     1.9 +    
    1.10  /**
    1.11   * Note: clobbers EAX to make the indirect call - this isn't usually
    1.12   * a problem since the callee will usually clobber it anyway.
    1.13 @@ -407,6 +410,8 @@
    1.14  
    1.15  #else /* SH4_TRANSLATOR == TARGET_X86 */
    1.16  
    1.17 +#define load_ptr( reg, ptr ) load_imm32( reg, (uint32_t)ptr );
    1.18 +
    1.19  /**
    1.20   * Note: clobbers EAX to make the indirect call - this isn't usually
    1.21   * a problem since the callee will usually clobber it anyway.
    1.22 @@ -643,7 +648,7 @@
    1.23  {
    1.24      PUSH_r32(R_EBP);
    1.25      /* mov &sh4r, ebp */
    1.26 -    load_imm32( R_EBP, (uint32_t)&sh4r );
    1.27 +    load_ptr( R_EBP, &sh4r );
    1.28      
    1.29      sh4_x86.in_delay_slot = FALSE;
    1.30      sh4_x86.priv_checked = FALSE;
    1.31 @@ -809,13 +814,12 @@
    1.32                                  { /* PREF @Rn */
    1.33                                  uint32_t Rn = ((ir>>8)&0xF); 
    1.34                                  load_reg( R_EAX, Rn );
    1.35 -                                PUSH_r32( R_EAX );
    1.36 +                                MOV_r32_r32( R_EAX, R_ECX );
    1.37                                  AND_imm32_r32( 0xFC000000, R_EAX );
    1.38                                  CMP_imm32_r32( 0xE0000000, R_EAX );
    1.39 -                                JNE_rel8(CALL_FUNC0_SIZE, end);
    1.40 -                                call_func0( sh4_flush_store_queue );
    1.41 +                                JNE_rel8(CALL_FUNC1_SIZE, end);
    1.42 +                                call_func1( sh4_flush_store_queue, R_ECX );
    1.43                                  JMP_TARGET(end);
    1.44 -                                ADD_imm8s_r32( 4, R_ESP );
    1.45                                  sh4_x86.tstate = TSTATE_NONE;
    1.46                                  }
    1.47                                  break;