1.1 --- a/src/asic.c Wed Aug 27 09:42:16 2008 +0000
1.2 +++ b/src/asic.c Thu Dec 11 21:33:08 2008 +0000
1.4 asic_event( EVENT_PVR_DMA );
1.7 +void pvr_dma2_transfer()
1.9 + if( MMIO_READ( EXTDMA, PVRDMA2CTL2 ) == 1 ) {
1.10 + if( MMIO_READ( EXTDMA, PVRDMA2CTL1 ) == 1 ) {
1.11 + sh4addr_t extaddr = MMIO_READ( EXTDMA, PVRDMA2EXT );
1.12 + sh4addr_t sh4addr = MMIO_READ( EXTDMA, PVRDMA2SH4 );
1.13 + int dir = MMIO_READ( EXTDMA, PVRDMA2DIR );
1.14 + uint32_t length = MMIO_READ( EXTDMA, PVRDMA2SIZ );
1.15 + unsigned char buf[length];
1.16 + if( dir == 0 ) { /* SH4 to PVR */
1.17 + mem_copy_from_sh4( buf, sh4addr, length );
1.18 + mem_copy_to_sh4( extaddr, buf, length );
1.19 + } else { /* PVR to SH4 */
1.20 + mem_copy_from_sh4( buf, extaddr, length );
1.21 + mem_copy_to_sh4( sh4addr, buf, length );
1.23 + MMIO_WRITE( EXTDMA, PVRDMA2CTL2, 0 );
1.24 + asic_event( EVENT_PVR_DMA2 );
1.29 void sort_dma_transfer( )
1.31 sh4addr_t table_addr = MMIO_READ( ASIC, SORTDMATBL );
1.37 - ERROR( "Write to unimplemented DMA control register %08X", reg );
1.39 + MMIO_WRITE( EXTDMA, reg, val & 1 );
1.40 + pvr_dma2_transfer();
1.43 MMIO_WRITE( EXTDMA, reg, val );