1.1 --- a/src/sh4/sh4core.c	Tue Sep 04 08:38:33 2007 +0000
     1.2 +++ b/src/sh4/sh4core.c	Sat Sep 08 04:38:38 2007 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: sh4core.c,v 1.42 2007-09-04 08:38:33 nkeynes Exp $
     1.6 + * $Id: sh4core.c,v 1.43 2007-09-08 03:11:53 nkeynes Exp $
     1.7   * 
     1.8   * SH4 emulation core, and parent module for all the SH4 peripheral
     1.9   * modules.
    1.10 @@ -540,12 +540,7 @@
    1.11                                  uint32_t Rn = ((ir>>8)&0xF); 
    1.12                                  tmp = sh4r.r[Rn];
    1.13                                  if( (tmp & 0xFC000000) == 0xE0000000 ) {
    1.14 -                           	 /* Store queue operation */
    1.15 -                           	 int queue = (tmp&0x20)>>2;
    1.16 -                           	 int32_t *src = &sh4r.store_queue[queue];
    1.17 -                           	 uint32_t hi = (MMIO_READ( MMU, (queue == 0 ? QACR0 : QACR1) ) & 0x1C) << 24;
    1.18 -                           	 uint32_t target = tmp&0x03FFFFE0 | hi;
    1.19 -                           	 mem_copy_to_sh4( target, src, 32 );
    1.20 +                           	 sh4_flush_store_queue(tmp);
    1.21                                  }
    1.22                                  }
    1.23                                  break;