filename | src/asic.h |
changeset | 56:3224dceaf2a3 |
prev | 31:495e480360d7 |
next | 65:9f124c245fc6 |
author | nkeynes |
date | Mon Jan 02 23:07:17 2006 +0000 (18 years ago) |
permissions | -rw-r--r-- |
last change | Fix exception return address Accidentally left UNIMP() on entire arith extension block, removed |
file | annotate | diff | log | raw |
1.1 --- a/src/asic.h Sun Dec 25 08:24:11 2005 +00001.2 +++ b/src/asic.h Mon Jan 02 23:07:17 2006 +00001.3 @@ -1,5 +1,5 @@1.4 /**1.5 - * $Id: asic.h,v 1.3 2005-12-25 08:24:07 nkeynes Exp $1.6 + * $Id: asic.h,v 1.4 2006-01-01 08:09:42 nkeynes Exp $1.7 *1.8 * Support for the miscellaneous ASIC functions (Primarily event multiplexing,1.9 * and DMA). Includes MMIO definitions for the 5f6000 and 5f7000 regions,1.10 @@ -26,10 +26,20 @@1.11 */1.13 MMIO_REGION_BEGIN( 0x005F6000, ASIC, "System ASIC" )1.14 - LONG_PORT( 0x884, ASICUNK1, PORT_MRW, 0, "ASIC <unknown1>" )1.15 - LONG_PORT( 0x888, ASICUNK2, PORT_MRW, 0, "ASIC <unknown2>" )1.16 + LONG_PORT( 0x800, PVRDMADEST, PORT_MRW, 0, "PVR DMA Dest Address" )1.17 + LONG_PORT( 0x804, PVRDMACNT, PORT_MRW, 0, "PVR DMA Byte Count" )1.18 + LONG_PORT( 0x808, PVRDMACTL, PORT_MRW, 0, "PVR DMA Control" )1.19 + LONG_PORT( 0x810, ASICUNK1, PORT_MRW, 0, "ASIC <unknown1>" )1.20 + LONG_PORT( 0x814, ASICUNK2, PORT_MRW, 0, "ASIC <unknown2>" )1.21 + LONG_PORT( 0x818, ASICUNK3, PORT_MRW, 0, "ASIC <unknown3>" )1.22 + LONG_PORT( 0x81C, ASICUNK4, PORT_MRW, 0, "ASIC <unknown4>" )1.23 + LONG_PORT( 0x884, ASICUNK5, PORT_MRW, 0, "ASIC <unknown5>" )1.24 + LONG_PORT( 0x888, ASICUNK6, PORT_MRW, 0, "ASIC <unknown6>" )1.25 LONG_PORT( 0x88C, G2STATUS, PORT_MR, 0, "G2 Bus status" )1.26 - LONG_PORT( 0x89C, ASICUNK3, PORT_MRW, 0xB, "Unknown, always 0xB?" )1.27 + LONG_PORT( 0x89C, ASICUNK7, PORT_MRW, 0xB, "Unknown, always 0xB?" )1.28 + LONG_PORT( 0x8A0, ASICUNK8, PORT_MRW, 0, "ASIC <unknown8>" )1.29 + LONG_PORT( 0x8A4, ASICUNK9, PORT_MRW, 0, "ASIC <unknown9>" )1.30 + LONG_PORT( 0x8AC, ASICUNKA, PORT_MRW, 0, "ASIC <unknownA>" )1.31 LONG_PORT( 0x900, PIRQ0, PORT_MRW, 0, "Pending interrupts 0" )1.32 LONG_PORT( 0x904, PIRQ1, PORT_MRW, 0, "Pending interrupts 1" )1.33 LONG_PORT( 0x908, PIRQ2, PORT_MRW, 0, "Pending interrupts 2" )1.34 @@ -52,7 +62,7 @@1.35 * what any of it means (nor have I seen any of it accessed), they're not1.36 * listed above.1.37 */1.38 -1.39 +1.41 LONG_PORT( 0xC04, MAPLE_DMA, PORT_MRW, UNDEFINED, "Maple DMA Address" )1.42 LONG_PORT( 0xC10, MAPLE_RESET2, PORT_MRW, UNDEFINED, "Maple Reset 2" )1.43 @@ -144,27 +154,35 @@1.44 LONG_PORT( 0x8B4, SPUDMAUN9, PORT_MRW, 0, "SPU DMA <unknown9>" )1.45 LONG_PORT( 0x8B8, SPUDMAUN10, PORT_MRW, 0, "SPU DMA <unknown10>" )1.46 LONG_PORT( 0x8BC, SPUDMAUN11, PORT_MRW, 0, "SPU DMA <unknown11>" )1.47 - LONG_PORT( 0xC00, PVRDMAEXT, PORT_MRW, 0, "PVR DMA External address" )1.48 - LONG_PORT( 0xC04, PVRDMASH4, PORT_MRW, 0, "PVR DMA SH4 address" )1.49 - LONG_PORT( 0xC08, PVRDMASIZ, PORT_MRW, 0, "PVR DMA Size" )1.50 - LONG_PORT( 0xC0C, PVRDMADIR, PORT_MRW, 0, "PVR DMA Direction" )1.51 - LONG_PORT( 0xC10, PVRDMAMOD, PORT_MRW, 0, "PVR DMA Mode" )1.52 - LONG_PORT( 0xC14, PVRDMACTL1, PORT_MRW, 0, "PVR DMA Control 1" )1.53 - LONG_PORT( 0xC18, PVRDMACTL2, PORT_MRW, 0, "PVR DMA Control 2" )1.54 - LONG_PORT( 0xC80, PVRDMAUN1, PORT_MRW, 0, "PVR DMA <unknown1>" )1.55 + LONG_PORT( 0xC00, PVRDMA2EXT, PORT_MRW, 0, "PVR DMA External address" )1.56 + LONG_PORT( 0xC04, PVRDMA2SH4, PORT_MRW, 0, "PVR DMA SH4 address" )1.57 + LONG_PORT( 0xC08, PVRDMA2SIZ, PORT_MRW, 0, "PVR DMA Size" )1.58 + LONG_PORT( 0xC0C, PVRDMA2DIR, PORT_MRW, 0, "PVR DMA Direction" )1.59 + LONG_PORT( 0xC10, PVRDMA2MOD, PORT_MRW, 0, "PVR DMA Mode" )1.60 + LONG_PORT( 0xC14, PVRDMA2CTL1, PORT_MRW, 0, "PVR DMA Control 1" )1.61 + LONG_PORT( 0xC18, PVRDMA2CTL2, PORT_MRW, 0, "PVR DMA Control 2" )1.62 + LONG_PORT( 0xC80, PVRDMA2UN1, PORT_MRW, 0, "PVR DMA <unknown1>" )1.64 MMIO_REGION_END1.66 +#define EVENT_PVR_RENDER_DONE 21.67 #define EVENT_SCANLINE1 31.68 #define EVENT_SCANLINE2 41.69 #define EVENT_RETRACE 51.70 +#define EVENT_PVR_OPAQUE_DONE 71.71 +#define EVENT_PVR_OPAQUEMOD_DONE 81.72 +#define EVENT_PVR_TRANS_DONE 91.73 +#define EVENT_PVR_TRANSMODE_DONE 101.74 #define EVENT_MAPLE_DMA 121.75 #define EVENT_MAPLE_ERR 13 /* ??? */1.76 #define EVENT_GDROM_DMA 141.77 -#define EVENT_SPU_DMA0 15 /* ??? */1.78 +#define EVENT_SPU_DMA0 151.79 #define EVENT_SPU_DMA1 161.80 #define EVENT_SPU_DMA2 171.81 #define EVENT_SPU_DMA3 181.82 +#define EVENT_PVR_DMA 191.83 +#define EVENT_PVR_PUNCHOUT_DONE 211.84 +1.85 #define EVENT_GDROM_CMD 321.86 #define EVENT_AICA 33
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