1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/src/sh4/intc.h	Sun Dec 11 05:15:36 2005 +0000
     1.3 @@ -0,0 +1,68 @@
     1.4 +#ifndef sh4intc_H
     1.5 +#define sh4intc_H 1
     1.6 +
     1.7 +#include "sh4core.h"
     1.8 +
     1.9 +#ifdef __cplusplus
    1.10 +extern "C" {
    1.11 +#if 0
    1.12 +}
    1.13 +#endif
    1.14 +#endif
    1.15 +
    1.16 +#define INT_IRQ0        0     /* External Interrupt request 0 */
    1.17 +#define INT_IRQ1        1
    1.18 +#define INT_IRQ2        2
    1.19 +#define INT_IRQ3        3
    1.20 +#define INT_IRQ4        4
    1.21 +#define INT_IRQ5        5
    1.22 +#define INT_IRQ6        6
    1.23 +#define INT_IRQ7        7
    1.24 +#define INT_IRQ8        8
    1.25 +#define INT_IRQ9        9
    1.26 +#define INT_IRQ10      10
    1.27 +#define INT_IRQ11      11
    1.28 +#define INT_IRQ12      12
    1.29 +#define INT_IRQ13      13
    1.30 +#define INT_IRQ14      14
    1.31 +#define INT_NMI        15     /* Non-Maskable Interrupt */
    1.32 +#define INT_HUDI       16     /* Hitachi use debug interface */
    1.33 +#define INT_GPIO       17     /* I/O port interrupt */
    1.34 +#define INT_DMA_DMTE0  18     /* DMA transfer end 0 */
    1.35 +#define INT_DMA_DMTE1  19     /* DMA transfer end 1 */
    1.36 +#define INT_DMA_DMTE2  20     /* DMA transfer end 2 */
    1.37 +#define INT_DMA_DMTE3  21     /* DMA transfer end 3 */
    1.38 +#define INT_DMA_DMAE   22     /* DMA address error */
    1.39 +#define INT_TMU_TUNI0  23     /* Timer underflow interrupt 0 */
    1.40 +#define INT_TMU_TUNI1  24     /* Timer underflow interrupt 1 */
    1.41 +#define INT_TMU_TUNI2  25     /* Timer underflow interrupt 2 */
    1.42 +#define INT_TMU_TICPI2 26     /* Timer input capture interrupt */
    1.43 +#define INT_RTC_ATI    27     /* RTC Alarm interrupt */
    1.44 +#define INT_RTC_PRI    28     /* RTC periodic interrupt */
    1.45 +#define INT_RTC_CUI    29     /* RTC Carry-up interrupt */
    1.46 +#define INT_SCI_ERI    30     /* SCI receive-error interrupt */
    1.47 +#define INT_SCI_RXI    31     /* SCI receive-data-full interrupt */
    1.48 +#define INT_SCI_TXI    32     /* SCI transmit-data-empty interrupt */
    1.49 +#define INT_SCI_TEI    33     /* SCI transmit-end interrupt */
    1.50 +#define INT_SCIF_ERI   34     /* SCIF receive-error interrupt */
    1.51 +#define INT_SCIF_RXI   35     /* SCIF receive-data-full interrupt */
    1.52 +#define INT_SCIF_BRI   36     /* SCIF break interrupt request */
    1.53 +#define INT_SCIF_TXI   37     /* SCIF Transmit-data-empty interrupt */
    1.54 +#define INT_WDT_ITI    38     /* WDT Interval timer interval (CPG) */
    1.55 +#define INT_REF_RCMI   39     /* Compare-match interrupt */
    1.56 +#define INT_REF_ROVI   40     /* Refresh counter overflow interrupt */
    1.57 +
    1.58 +#define INT_NUM_SOURCES 41
    1.59 +
    1.60 +char *intc_get_interrupt_name( int which );
    1.61 +void intc_raise_interrupt( int which );
    1.62 +void intc_clear_interrupt( int which );
    1.63 +uint32_t intc_accept_interrupt( void );
    1.64 +void intc_reset( void );
    1.65 +void intc_mask_changed( void );
    1.66 +
    1.67 +#ifdef __cplusplus
    1.68 +}
    1.69 +#endif
    1.70 +
    1.71 +#endif /* !sh4intc_H */