1.1 --- a/src/pvr2/pvr2.h	Mon Feb 05 08:51:34 2007 +0000
     1.2 +++ b/src/pvr2/pvr2.h	Wed Sep 12 09:17:52 2007 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: pvr2.h,v 1.34 2007-02-05 08:51:34 nkeynes Exp $
     1.6 + * $Id: pvr2.h,v 1.35 2007-02-11 10:09:32 nkeynes Exp $
     1.7   *
     1.8   * PVR2 (video chip) functions and macros.
     1.9   *
    1.10 @@ -175,19 +175,6 @@
    1.11   */
    1.12  void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f );
    1.13  
    1.14 -
    1.15 -/**
    1.16 - * Describes a rendering buffer that's actually held in GL, for when we need
    1.17 - * to fetch the bits back to vram.
    1.18 - */
    1.19 -typedef struct pvr2_render_buffer {
    1.20 -    sh4addr_t render_addr; /* The actual address rendered to in pvr ram */
    1.21 -    uint32_t size; /* Length of rendering region in bytes */
    1.22 -    int width, height;
    1.23 -    int colour_format;
    1.24 -    int scale;
    1.25 -} *pvr2_render_buffer_t;
    1.26 -
    1.27  /**
    1.28   * Flush the indicated render buffer back to PVR. Caller is responsible for
    1.29   * tracking whether there is actually anything in the buffer.
    1.30 @@ -197,25 +184,12 @@
    1.31   * @param backBuffer TRUE to flush the back buffer, FALSE for 
    1.32   * the front buffer.
    1.33   */
    1.34 -void pvr2_render_buffer_copy_to_sh4( pvr2_render_buffer_t buffer, 
    1.35 -				     gboolean backBuffer );
    1.36 -
    1.37 -/**
    1.38 - * Copy data from PVR ram into the GL render buffer. 
    1.39 - *
    1.40 - * @param buffer A render buffer indicating the address to read from, and the
    1.41 - * format the data is in.
    1.42 - * @param backBuffer TRUE to write the back buffer, FALSE for 
    1.43 - * the front buffer.
    1.44 - */
    1.45 -void pvr2_render_buffer_copy_from_sh4( pvr2_render_buffer_t buffer, 
    1.46 -				       gboolean backBuffer );
    1.47 -
    1.48 +void pvr2_render_buffer_copy_to_sh4( render_buffer_t buffer );
    1.49  
    1.50  /**
    1.51   * Invalidate any caching on the supplied SH4 address
    1.52   */
    1.53 -gboolean pvr2_render_buffer_invalidate( sh4addr_t addr );
    1.54 +gboolean pvr2_render_buffer_invalidate( sh4addr_t addr, gboolean isWrite );
    1.55  
    1.56  
    1.57  /**************************** Tile Accelerator ***************************/
    1.58 @@ -250,15 +224,9 @@
    1.59  /********************************* Renderer ******************************/
    1.60  
    1.61  /**
    1.62 - * Initialize the rendering pipeline.
    1.63 - * @return TRUE on success, FALSE on failure.
    1.64 - */
    1.65 -gboolean pvr2_render_init( void );
    1.66 -
    1.67 -/**
    1.68   * Render the current scene stored in PVR ram to the GL back buffer.
    1.69   */
    1.70 -void pvr2_render_scene( void );
    1.71 +void pvr2_render_scene( render_buffer_t buffer );
    1.72  
    1.73  /**
    1.74   * Display the scene rendered to the supplied address.