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lxdream.org :: lxdream/src/pvr2/pvr2.h
lxdream 0.9.1
released Jun 29
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filename src/pvr2/pvr2.h
changeset 352:f0df7a6d4703
prev348:15b2de02558d
next429:e581b90c3fb3
author nkeynes
date Wed Sep 12 09:17:52 2007 +0000 (16 years ago)
permissions -rw-r--r--
last change Fill in most of the FP operations and fix the stack adjustments
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     1 /**
     2  * $Id: pvr2.h,v 1.35 2007-02-11 10:09:32 nkeynes Exp $
     3  *
     4  * PVR2 (video chip) functions and macros.
     5  *
     6  * Copyright (c) 2005 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    19 #include "dream.h"
    20 #include "mem.h"
    21 #include "display.h"
    22 #include "pvr2/pvr2mmio.h"
    23 #include <GL/gl.h>
    25 typedef unsigned int pvraddr_t;
    26 typedef unsigned int pvr64addr_t;
    28 #define DISPMODE_ENABLE      0x00000001 /* Display enable */
    29 #define DISPMODE_LINEDOUBLE  0x00000002 /* scanline double */
    30 #define DISPMODE_COLFMT      0x0000000C /* Colour mode */
    31 #define DISPMODE_CLOCKDIV    0x08000000 /* Clock divide-by-2 */
    33 #define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
    34 #define DISPSIZE_LPF    0x000FFC00 /* lines per field */
    35 #define DISPSIZE_PPL    0x000003FF /* pixel words (32 bit) per line */
    37 #define DISPCFG_VP 0x00000001 /* V-sync polarity */
    38 #define DISPCFG_HP 0x00000002 /* H-sync polarity */
    39 #define DISPCFG_I  0x00000010 /* Interlace enable */
    40 #define DISPCFG_BS 0x000000C0 /* Broadcast standard */
    41 #define DISPCFG_VO 0x00000100 /* Video output enable */
    43 #define BS_NTSC 0x00000000
    44 #define BS_PAL  0x00000040
    45 #define BS_PALM 0x00000080 /* ? */
    46 #define BS_PALN 0x000000C0 /* ? */
    48 #define PVR2_RAM_BASE 0x05000000
    49 #define PVR2_RAM_BASE_INT 0x04000000
    50 #define PVR2_RAM_SIZE (8 * 1024 * 1024)
    51 #define PVR2_RAM_PAGES (PVR2_RAM_SIZE>>12)
    52 #define PVR2_RAM_MASK 0x7FFFFF
    54 #define RENDER_ZONLY  0
    55 #define RENDER_NORMAL 1     /* Render non-modified polygons */
    56 #define RENDER_CHEAPMOD 2   /* Render cheap-modified polygons */
    57 #define RENDER_FULLMOD 3    /* Render the fully-modified version of the polygons */
    59 void pvr2_next_frame( void );
    60 void pvr2_set_base_address( uint32_t );
    61 int pvr2_get_frame_count( void );
    62 gboolean pvr2_save_next_scene( const gchar *filename );
    64 #define PVR2_CMD_END_OF_LIST 0x00
    65 #define PVR2_CMD_USER_CLIP   0x20
    66 #define PVR2_CMD_POLY_OPAQUE 0x80
    67 #define PVR2_CMD_MOD_OPAQUE  0x81
    68 #define PVR2_CMD_POLY_TRANS  0x82
    69 #define PVR2_CMD_MOD_TRANS   0x83
    70 #define PVR2_CMD_POLY_PUNCHOUT 0x84
    71 #define PVR2_CMD_VERTEX      0xE0
    72 #define PVR2_CMD_VERTEX_LAST 0xF0
    74 #define PVR2_POLY_TEXTURED 0x00000008
    75 #define PVR2_POLY_SPECULAR 0x00000004
    76 #define PVR2_POLY_SHADED   0x00000002
    77 #define PVR2_POLY_UV_16BIT 0x00000001
    79 #define PVR2_POLY_MODE_CLAMP_RGB 0x00200000
    80 #define PVR2_POLY_MODE_ALPHA    0x00100000
    81 #define PVR2_POLY_MODE_TEXALPHA 0x00080000
    82 #define PVR2_POLY_MODE_FLIP_S   0x00040000
    83 #define PVR2_POLY_MODE_FLIP_T   0x00020000
    84 #define PVR2_POLY_MODE_CLAMP_S  0x00010000
    85 #define PVR2_POLY_MODE_CLAMP_T  0x00008000
    87 #define PVR2_POLY_FOG_LOOKUP    0x00000000
    88 #define PVR2_POLY_FOG_VERTEX    0x00400000
    89 #define PVR2_POLY_FOG_DISABLED  0x00800000
    90 #define PVR2_POLY_FOG_LOOKUP2   0x00C00000
    93 #define PVR2_TEX_FORMAT_ARGB1555 0x00000000
    94 #define PVR2_TEX_FORMAT_RGB565   0x08000000
    95 #define PVR2_TEX_FORMAT_ARGB4444 0x10000000
    96 #define PVR2_TEX_FORMAT_YUV422   0x18000000
    97 #define PVR2_TEX_FORMAT_BUMPMAP  0x20000000
    98 #define PVR2_TEX_FORMAT_IDX4     0x28000000
    99 #define PVR2_TEX_FORMAT_IDX8     0x30000000
   101 #define PVR2_TEX_MIPMAP      0x80000000
   102 #define PVR2_TEX_COMPRESSED  0x40000000
   103 #define PVR2_TEX_FORMAT_MASK 0x38000000
   104 #define PVR2_TEX_UNTWIDDLED  0x04000000
   105 #define PVR2_TEX_STRIDE      0x02000000
   106 #define PVR2_TEX_IS_PALETTE(mode) ( (mode & PVR2_TEX_FORMAT_MASK) == PVR2_TEX_FORMAT_IDX4 || (mode&PVR2_TEX_FORMAT_MASK) == PVR2_TEX_FORMAT_IDX8 )
   109 #define PVR2_TEX_ADDR(x) ( ((x)&0x01FFFFF)<<3 );
   110 #define PVR2_TEX_IS_MIPMAPPED(x) ( ((x) & 0x84000000) == 0x80000000 )
   111 #define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED )
   112 #define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0)
   113 #define PVR2_TEX_IS_STRIDE(x) (((x) & 0x06000000) == 0x06000000)
   115 /****************************** Frame Buffer *****************************/
   117 /**
   118  * Write a block of data to an address in the DMA range (0x10000000 - 
   119  * 0x13FFFFFF), ie TA, YUV, or texture ram.
   120  */
   121 void pvr2_dma_write( sh4addr_t dest, char *src, uint32_t length );
   123 /**
   124  * Write to the interleaved memory address space (aka 64-bit address space).
   125  */
   126 void pvr2_vram64_write( sh4addr_t dest, char *src, uint32_t length );
   128 /**
   129  * Write to the interleaved memory address space (aka 64-bit address space),
   130  * using a line length and stride.
   131  */
   132 void pvr2_vram64_write_stride( sh4addr_t dest, char *src, uint32_t line_bytes,
   133 			       uint32_t line_stride_bytes, uint32_t line_count );
   135 /**
   136  * Read from the interleaved memory address space (aka 64-bit address space)
   137  */
   138 void pvr2_vram64_read( char *dest, sh4addr_t src, uint32_t length );
   140 /**
   141  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   142  * space), writing the image to the destination buffer in detwiddled format. 
   143  * Width and height must be powers of 2
   144  * This version reads 4-bit pixels.
   145  */
   146 void pvr2_vram64_read_twiddled_4( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   149 /**
   150  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   151  * space), writing the image to the destination buffer in detwiddled format. 
   152  * Width and height must be powers of 2
   153  * This version reads 8-bit pixels.
   154  */
   155 void pvr2_vram64_read_twiddled_8( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   157 /**
   158  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   159  * space), writing the image to the destination buffer in detwiddled format. 
   160  * Width and height must be powers of 2, and src must be 16-bit aligned.
   161  * This version reads 16-bit pixels.
   162  */
   163 void pvr2_vram64_read_twiddled_16( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   165 /**
   166  * Read an image from the interleaved memory address space (aka 64-bit address space) 
   167  * where the source and destination line sizes may differ. Note that both byte
   168  * counts must be a multiple of 4, and the src address must be 32-bit aligned.
   169  */
   170 void pvr2_vram64_read_stride( char *dest, uint32_t dest_line_bytes, sh4addr_t srcaddr,
   171 			       uint32_t src_line_bytes, uint32_t line_count );
   172 /**
   173  * Dump a portion of vram to a stream from the interleaved memory address 
   174  * space.
   175  */
   176 void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f );
   178 /**
   179  * Flush the indicated render buffer back to PVR. Caller is responsible for
   180  * tracking whether there is actually anything in the buffer.
   181  *
   182  * @param buffer A render buffer indicating the address to store to, and the
   183  * format the data needs to be in.
   184  * @param backBuffer TRUE to flush the back buffer, FALSE for 
   185  * the front buffer.
   186  */
   187 void pvr2_render_buffer_copy_to_sh4( render_buffer_t buffer );
   189 /**
   190  * Invalidate any caching on the supplied SH4 address
   191  */
   192 gboolean pvr2_render_buffer_invalidate( sh4addr_t addr, gboolean isWrite );
   195 /**************************** Tile Accelerator ***************************/
   196 /**
   197  * Process the data in the supplied buffer as an array of TA command lists.
   198  * Any excess bytes are held pending until a complete list is sent
   199  */
   200 void pvr2_ta_write( char *buf, uint32_t length );
   203 /**
   204  * (Re)initialize the tile accelerator in preparation for the next scene.
   205  * Normally called immediately before commencing polygon transmission.
   206  */
   207 void pvr2_ta_init( void );
   210 /****************************** YUV Converter ****************************/
   212 /**
   213  * Process a block of YUV data.
   214  */
   215 void pvr2_yuv_write( char *buf, uint32_t length );
   217 /**
   218  * Initialize the YUV converter.
   219  */
   220 void pvr2_yuv_init( uint32_t target_addr );
   222 void pvr2_yuv_set_config( uint32_t config );
   224 /********************************* Renderer ******************************/
   226 /**
   227  * Render the current scene stored in PVR ram to the GL back buffer.
   228  */
   229 void pvr2_render_scene( render_buffer_t buffer );
   231 /**
   232  * Display the scene rendered to the supplied address.
   233  * @return TRUE if there was an available render that was displayed,
   234  * otherwise FALSE (and no action was taken)
   235  */
   236 gboolean pvr2_render_display_frame( uint32_t address );
   239 void render_backplane( uint32_t *polygon, uint32_t width, uint32_t height, uint32_t mode );
   241 void render_set_context( uint32_t *context, int render_mode );
   243 void pvr2_render_tilebuffer( int width, int height, int clipx1, int clipy1, 
   244 			     int clipx2, int clipy2 );
   246 float pvr2_render_find_maximum_z();
   247 /**
   248  * Structure to hold a complete unpacked vertex (excluding modifier
   249  * volume parameters - generate separate vertexes in that case).
   250  */
   251 struct vertex_unpacked {
   252     float x,y,z;
   253     float u,v;            /* Texture coordinates */
   254     float rgba[4];        /* Fragment colour (RGBA order) */
   255     float offset_rgba[4]; /* Offset color (RGBA order) */
   256 };
   258 void render_unpacked_vertex_array( uint32_t poly1, struct vertex_unpacked *vertexes[], 
   259 				   int num_vertexes );
   261 void render_vertex_array( uint32_t poly1, uint32_t *vertexes[], int num_vertexes, 
   262 			  int vertex_size, int render_mode );
   264 /****************************** Texture Cache ****************************/
   266 /**
   267  * Initialize the texture cache.
   268  */
   269 void texcache_init( void );
   271 /**
   272  * Initialize the GL side of the texture cache (texture ids and such).
   273  */
   274 void texcache_gl_init( void );
   276 /**
   277  * Flush all textures and delete. The cache will be non-functional until
   278  * the next call to texcache_init(). This would typically be done if
   279  * switching GL targets.
   280  */    
   281 void texcache_shutdown( void );
   283 /**
   284  * Evict all textures contained in the page identified by a texture address.
   285  */
   286 void texcache_invalidate_page( uint32_t texture_addr );
   288 /**
   289  * Return a texture ID for the texture specified at the supplied address
   290  * and given parameters (the same sequence of bytes could in theory have
   291  * multiple interpretations). We use the texture address as the primary
   292  * index, but allow for multiple instances at each address. The texture
   293  * will be bound to the GL_TEXTURE_2D target before being returned.
   294  * 
   295  * If the texture has already been bound, return the ID to which it was
   296  * bound. Otherwise obtain an unused texture ID and set it up appropriately.
   297  */
   298 GLuint texcache_get_texture( uint32_t texture_addr, int width, int height,
   299 			     int mode );
   301 /************************* Rendering support macros **************************/
   302 #define POLY1_DEPTH_MODE(poly1) ( pvr2_poly_depthmode[(poly1)>>29] )
   303 #define POLY1_DEPTH_ENABLE(poly1) (((poly1)&0x04000000) == 0 )
   304 #define POLY1_CULL_MODE(poly1) (((poly1)>>27)&0x03)
   305 #define POLY1_TEXTURED(poly1) (((poly1)&0x02000000))
   306 #define POLY1_SPECULAR(poly1) (((poly1)&0x01000000))
   307 #define POLY1_GOURAUD_SHADED(poly1) ((poly1)&0x00800000)
   308 #define POLY1_SHADE_MODEL(poly1) (((poly1)&0x00800000) ? GL_SMOOTH : GL_FLAT)
   309 #define POLY1_UV16(poly1)   (((poly1)&0x00400000))
   310 #define POLY1_SINGLE_TILE(poly1) (((poly1)&0x00200000))
   312 #define POLY2_SRC_BLEND(poly2) ( pvr2_poly_srcblend[(poly2) >> 29] )
   313 #define POLY2_DEST_BLEND(poly2) ( pvr2_poly_dstblend[((poly2)>>26)&0x07] )
   314 #define POLY2_SRC_BLEND_TARGET(poly2)    ((poly2)&0x02000000)
   315 #define POLY2_DEST_BLEND_TARGET(poly2)   ((poly2)&0x01000000)
   316 #define POLY2_FOG_MODE(poly2)            ((poly2)&0x00C00000)
   317 #define POLY2_COLOUR_CLAMP_ENABLE(poly2) ((poly2)&0x00200000)
   318 #define POLY2_ALPHA_ENABLE(poly2)        ((poly2)&0x00100000)
   319 #define POLY2_TEX_ALPHA_ENABLE(poly2)   (((poly2)&0x00080000) == 0 )
   320 #define POLY2_TEX_CLAMP_U(poly2)         ((poly2)&0x00010000)
   321 #define POLY2_TEX_CLAMP_V(poly2)         ((poly2)&0x00008000)
   322 #define POLY2_TEX_WIDTH(poly2) ( 1<< ((((poly2) >> 3) & 0x07 ) + 3) )
   323 #define POLY2_TEX_HEIGHT(poly2) ( 1<< (((poly2) & 0x07 ) + 3) )
   324 #define POLY2_TEX_BLEND(poly2) (((poly2) >> 6)&0x03)
   325 extern int pvr2_poly_depthmode[8];
   326 extern int pvr2_poly_srcblend[8];
   327 extern int pvr2_poly_dstblend[8];
   328 extern int pvr2_poly_texblend[4];
   329 extern int pvr2_render_colour_format[8];
   331 float halftofloat(uint16_t half);
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