2 * $Id: x86op.h,v 1.10 2007-09-19 09:15:18 nkeynes Exp $
4 * Definitions of x86 opcodes for use by the translator.
6 * Copyright (c) 2007 Nathan Keynes.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #ifndef __lxdream_x86op_H
20 #define __lxdream_x86op_H
42 #define MARK_JMP(n,x) uint8_t *_mark_jmp_##x = xlat_output + n
43 #define JMP_TARGET(x) assert( _mark_jmp_##x == xlat_output )
45 #define MARK_JMP(n, x)
53 #define OP(x) *xlat_output++ = (x)
54 #define OP32(x) *((uint32_t *)xlat_output) = (x); xlat_output+=4
55 #define OP64(x) *((uint64_t *)xlat_output) = (x); xlat_output+=8
56 #if SH4_TRANSLATOR == TARGET_X86_64
57 #define OPPTR(x) OP64((uint64_t)(x))
59 #define OPPTR(x) OP32((uint32_t)(x))
62 /* Offset of a reg relative to the sh4r structure */
63 #define REG_OFFSET(reg) (((char *)&sh4r.reg) - ((char *)&sh4r))
65 #define R_T REG_OFFSET(t)
66 #define R_Q REG_OFFSET(q)
67 #define R_S REG_OFFSET(s)
68 #define R_M REG_OFFSET(m)
69 #define R_SR REG_OFFSET(sr)
70 #define R_GBR REG_OFFSET(gbr)
71 #define R_SSR REG_OFFSET(ssr)
72 #define R_SPC REG_OFFSET(spc)
73 #define R_VBR REG_OFFSET(vbr)
74 #define R_MACH REG_OFFSET(mac)+4
75 #define R_MACL REG_OFFSET(mac)
76 #define R_PR REG_OFFSET(pr)
77 #define R_SGR REG_OFFSET(sgr)
78 #define R_FPUL REG_OFFSET(fpul)
79 #define R_FPSCR REG_OFFSET(fpscr)
80 #define R_DBR REG_OFFSET(dbr)
82 /**************** Basic X86 operations *********************/
83 /* Note: operands follow SH4 convention (source, dest) rather than x86
84 * conventions (dest, source)
87 /* Two-reg modrm form - first arg is the r32 reg, second arg is the r/m32 reg */
88 #define MODRM_r32_rm32(r1,r2) OP(0xC0 | (r1<<3) | r2)
89 #define MODRM_rm32_r32(r1,r2) OP(0xC0 | (r2<<3) | r1)
91 /* ebp+disp8 modrm form */
92 #define MODRM_r32_ebp8(r1,disp) OP(0x45 | (r1<<3)); OP(disp)
94 /* ebp+disp32 modrm form */
95 #define MODRM_r32_ebp32(r1,disp) OP(0x85 | (r1<<3)); OP32(disp)
97 #define MODRM_r32_sh4r(r1,disp) if(disp>127){ MODRM_r32_ebp32(r1,disp);}else{ MODRM_r32_ebp8(r1,(unsigned char)disp); }
99 #define REXW() OP(0x48)
102 #define ADD_sh4r_r32(disp,r1) OP(0x03); MODRM_r32_sh4r(r1,disp)
103 #define ADD_r32_sh4r(r1,disp) OP(0x01); MODRM_r32_sh4r(r1,disp)
104 #define ADD_r32_r32(r1,r2) OP(0x03); MODRM_rm32_r32(r1,r2)
105 #define ADD_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1, 0); OP(imm)
106 #define ADD_imm8s_sh4r(imm,disp) OP(0x83); MODRM_r32_sh4r(0,disp); OP(imm)
107 #define ADD_imm32_r32(imm32,r1) OP(0x81); MODRM_rm32_r32(r1,0); OP32(imm32)
108 #define ADC_r32_r32(r1,r2) OP(0x13); MODRM_rm32_r32(r1,r2)
109 #define ADC_sh4r_r32(disp,r1) OP(0x13); MODRM_r32_sh4r(r1,disp)
110 #define ADC_r32_sh4r(r1,disp) OP(0x11); MODRM_r32_sh4r(r1,disp)
111 #define AND_r32_r32(r1,r2) OP(0x23); MODRM_rm32_r32(r1,r2)
112 #define AND_imm8_r8(imm8, r1) OP(0x80); MODRM_rm32_r32(r1,4); OP(imm8)
113 #define AND_imm8s_r32(imm8,r1) OP(0x83); MODRM_rm32_r32(r1,4); OP(imm8)
114 #define AND_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,4); OP32(imm)
115 #define CALL_r32(r1) OP(0xFF); MODRM_rm32_r32(r1,2)
116 #define CLC() OP(0xF8)
117 #define CMC() OP(0xF5)
118 #define CMP_sh4r_r32(disp,r1) OP(0x3B); MODRM_r32_sh4r(r1,disp)
119 #define CMP_r32_r32(r1,r2) OP(0x3B); MODRM_rm32_r32(r1,r2)
120 #define CMP_imm32_r32(imm32, r1) OP(0x81); MODRM_rm32_r32(r1,7); OP32(imm32)
121 #define CMP_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1,7); OP(imm)
122 #define CMP_imm8s_sh4r(imm,disp) OP(0x83); MODRM_r32_sh4r(7,disp) OP(imm)
123 #define DEC_r32(r1) OP(0x48+r1)
124 #define IMUL_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,5)
125 #define INC_r32(r1) OP(0x40+r1)
126 #define JMP_rel8(rel, label) OP(0xEB); OP(rel); MARK_JMP(rel,label)
127 #define MOV_r32_r32(r1,r2) OP(0x89); MODRM_r32_rm32(r1,r2)
128 #define MOV_r32_sh4r(r1,disp) OP(0x89); MODRM_r32_sh4r(r1,disp)
129 #define MOV_moff32_EAX(off) OP(0xA1); OPPTR(off)
130 #define MOV_sh4r_r32(disp, r1) OP(0x8B); MODRM_r32_sh4r(r1,disp)
131 #define MOV_r32ind_r32(r1,r2) OP(0x8B); OP(0 + (r2<<3) + r1 )
132 #define MOVSX_r8_r32(r1,r2) OP(0x0F); OP(0xBE); MODRM_rm32_r32(r1,r2)
133 #define MOVSX_r16_r32(r1,r2) OP(0x0F); OP(0xBF); MODRM_rm32_r32(r1,r2)
134 #define MOVZX_r8_r32(r1,r2) OP(0x0F); OP(0xB6); MODRM_rm32_r32(r1,r2)
135 #define MOVZX_r16_r32(r1,r2) OP(0x0F); OP(0xB7); MODRM_rm32_r32(r1,r2)
136 #define MUL_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,4)
137 #define NEG_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,3)
138 #define NOT_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,2)
139 #define OR_r32_r32(r1,r2) OP(0x0B); MODRM_rm32_r32(r1,r2)
140 #define OR_imm8_r8(imm,r1) OP(0x80); MODRM_rm32_r32(r1,1); OP(imm)
141 #define OR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,1); OP32(imm)
142 #define OR_sh4r_r32(disp,r1) OP(0x0B); MODRM_r32_sh4r(r1,disp)
143 #define POP_r32(r1) OP(0x58 + r1)
144 #define PUSH_r32(r1) OP(0x50 + r1)
145 #define PUSH_imm32(imm) OP(0x68); OP32(imm)
146 #define RCL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,2)
147 #define RCR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,3)
148 #define RET() OP(0xC3)
149 #define ROL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,0)
150 #define ROR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,1)
151 #define SAR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,7)
152 #define SAR_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,7); OP(imm)
153 #define SAR_r32_CL(r1) OP(0xD3); MODRM_rm32_r32(r1,7)
154 #define SBB_r32_r32(r1,r2) OP(0x1B); MODRM_rm32_r32(r1,r2)
155 #define SHL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,4)
156 #define SHL_r32_CL(r1) OP(0xD3); MODRM_rm32_r32(r1,4)
157 #define SHL_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,4); OP(imm)
158 #define SHR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,5)
159 #define SHR_r32_CL(r1) OP(0xD3); MODRM_rm32_r32(r1,5)
160 #define SHR_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,5); OP(imm)
161 #define STC() OP(0xF9)
162 #define SUB_r32_r32(r1,r2) OP(0x2B); MODRM_rm32_r32(r1,r2)
163 #define SUB_sh4r_r32(disp,r1) OP(0x2B); MODRM_r32_sh4r(r1, disp)
164 #define TEST_r8_r8(r1,r2) OP(0x84); MODRM_r32_rm32(r1,r2)
165 #define TEST_r32_r32(r1,r2) OP(0x85); MODRM_rm32_r32(r1,r2)
166 #define TEST_imm8_r8(imm8,r1) OP(0xF6); MODRM_rm32_r32(r1,0); OP(imm8)
167 #define TEST_imm32_r32(imm,r1) OP(0xF7); MODRM_rm32_r32(r1,0); OP32(imm)
168 #define XCHG_r8_r8(r1,r2) OP(0x86); MODRM_rm32_r32(r1,r2)
169 #define XOR_r8_r8(r1,r2) OP(0x32); MODRM_rm32_r32(r1,r2)
170 #define XOR_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1,6); OP(imm)
171 #define XOR_r32_r32(r1,r2) OP(0x33); MODRM_rm32_r32(r1,r2)
172 #define XOR_sh4r_r32(disp,r1) OP(0x33); MODRM_r32_sh4r(r1,disp)
173 #define XOR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,6); OP32(imm)
176 /* Floating point ops */
177 #define FABS_st0() OP(0xD9); OP(0xE1)
178 #define FADDP_st(st) OP(0xDE); OP(0xC0+st)
179 #define FCHS_st0() OP(0xD9); OP(0xE0)
180 #define FCOMIP_st(st) OP(0xDF); OP(0xF0+st)
181 #define FDIVP_st(st) OP(0xDE); OP(0xF8+st)
182 #define FILD_sh4r(disp) OP(0xDB); MODRM_r32_sh4r(0, disp)
183 #define FILD_r32ind(r32) OP(0xDB); OP(0x00+r32)
184 #define FISTP_sh4r(disp) OP(0xDB); MODRM_r32_sh4r(3, disp)
185 #define FLD0_st0() OP(0xD9); OP(0xEE);
186 #define FLD1_st0() OP(0xD9); OP(0xE8);
187 #define FLDCW_r32ind(r32) OP(0xD9); OP(0x28+r32)
188 #define FMULP_st(st) OP(0xDE); OP(0xC8+st)
189 #define FNSTCW_r32ind(r32) OP(0xD9); OP(0x38+r32)
190 #define FPOP_st() OP(0xDD); OP(0xC0); OP(0xD9); OP(0xF7)
191 #define FSUBP_st(st) OP(0xDE); OP(0xE8+st)
192 #define FSQRT_st0() OP(0xD9); OP(0xFA)
194 /* Conditional branches */
195 #define JE_rel8(rel,label) OP(0x74); OP(rel); MARK_JMP(rel,label)
196 #define JA_rel8(rel,label) OP(0x77); OP(rel); MARK_JMP(rel,label)
197 #define JAE_rel8(rel,label) OP(0x73); OP(rel); MARK_JMP(rel,label)
198 #define JG_rel8(rel,label) OP(0x7F); OP(rel); MARK_JMP(rel,label)
199 #define JGE_rel8(rel,label) OP(0x7D); OP(rel); MARK_JMP(rel,label)
200 #define JC_rel8(rel,label) OP(0x72); OP(rel); MARK_JMP(rel,label)
201 #define JO_rel8(rel,label) OP(0x70); OP(rel); MARK_JMP(rel,label)
202 #define JNE_rel8(rel,label) OP(0x75); OP(rel); MARK_JMP(rel,label)
203 #define JNA_rel8(rel,label) OP(0x76); OP(rel); MARK_JMP(rel,label)
204 #define JNAE_rel8(rel,label) OP(0x72); OP(rel); MARK_JMP(rel,label)
205 #define JNG_rel8(rel,label) OP(0x7E); OP(rel); MARK_JMP(rel,label)
206 #define JNGE_rel8(rel,label) OP(0x7C); OP(rel); MARK_JMP(rel,label)
207 #define JNC_rel8(rel,label) OP(0x73); OP(rel); MARK_JMP(rel,label)
208 #define JNO_rel8(rel,label) OP(0x71); OP(rel); MARK_JMP(rel,label)
209 #define JNS_rel8(rel,label) OP(0x79); OP(rel); MARK_JMP(rel,label)
210 #define JS_rel8(rel,label) OP(0x78); OP(rel); MARK_JMP(rel,label)
213 /* 32-bit long forms w/ backpatching to an exit routine */
214 #define JMP_exit(rel) OP(0xE9); sh4_x86_add_backpatch(xlat_output); OP32(rel)
215 #define JE_exit(rel) OP(0x0F); OP(0x84); sh4_x86_add_backpatch(xlat_output); OP32(rel)
216 #define JA_exit(rel) OP(0x0F); OP(0x87); sh4_x86_add_backpatch(xlat_output); OP32(rel)
217 #define JAE_exit(rel) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output); OP32(rel)
218 #define JG_exit(rel) OP(0x0F); OP(0x8F); sh4_x86_add_backpatch(xlat_output); OP32(rel)
219 #define JGE_exit(rel) OP(0x0F); OP(0x8D); sh4_x86_add_backpatch(xlat_output); OP32(rel)
220 #define JC_exit(rel) OP(0x0F); OP(0x82); sh4_x86_add_backpatch(xlat_output); OP32(rel)
221 #define JO_exit(rel) OP(0x0F); OP(0x80); sh4_x86_add_backpatch(xlat_output); OP32(rel)
222 #define JNE_exit(rel) OP(0x0F); OP(0x85); sh4_x86_add_backpatch(xlat_output); OP32(rel)
223 #define JNA_exit(rel) OP(0x0F); OP(0x86); sh4_x86_add_backpatch(xlat_output); OP32(rel)
224 #define JNAE_exit(rel) OP(0x0F);OP(0x82); sh4_x86_add_backpatch(xlat_output); OP32(rel)
225 #define JNG_exit(rel) OP(0x0F); OP(0x8E); sh4_x86_add_backpatch(xlat_output); OP32(rel)
226 #define JNGE_exit(rel) OP(0x0F);OP(0x8C); sh4_x86_add_backpatch(xlat_output); OP32(rel)
227 #define JNC_exit(rel) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output); OP32(rel)
228 #define JNO_exit(rel) OP(0x0F); OP(0x81); sh4_x86_add_backpatch(xlat_output); OP32(rel)
231 /* Conditional moves ebp-rel */
232 #define CMOVE_r32_r32(r1,r2) OP(0x0F); OP(0x44); MODRM_rm32_r32(r1,r2)
233 #define CMOVA_r32_r32(r1,r2) OP(0x0F); OP(0x47); MODRM_rm32_r32(r1,r2)
234 #define CMOVAE_r32_r32(r1,r2) OP(0x0F); OP(0x43); MODRM_rm32_r32(r1,r2)
235 #define CMOVG_r32_r32(r1,r2) OP(0x0F); OP(0x4F); MODRM_rm32_r32(r1,r2)
236 #define CMOVGE_r32_r32(r1,r2) OP(0x0F); OP(0x4D); MODRM_rm32_r32(r1,r2)
237 #define CMOVC_r32_r32(r1,r2) OP(0x0F); OP(0x42); MODRM_rm32_r32(r1,r2)
238 #define CMOVO_r32_r32(r1,r2) OP(0x0F); OP(0x40); MODRM_rm32_r32(r1,r2)
241 /* Conditional setcc - writeback to sh4r.t */
242 #define SETE_sh4r(disp) OP(0x0F); OP(0x94); MODRM_r32_sh4r(0, disp);
243 #define SETA_sh4r(disp) OP(0x0F); OP(0x97); MODRM_r32_sh4r(0, disp);
244 #define SETAE_sh4r(disp) OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
245 #define SETG_sh4r(disp) OP(0x0F); OP(0x9F); MODRM_r32_sh4r(0, disp);
246 #define SETGE_sh4r(disp) OP(0x0F); OP(0x9D); MODRM_r32_sh4r(0, disp);
247 #define SETC_sh4r(disp) OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
248 #define SETO_sh4r(disp) OP(0x0F); OP(0x90); MODRM_r32_sh4r(0, disp);
250 #define SETNE_sh4r(disp) OP(0x0F); OP(0x95); MODRM_r32_sh4r(0, disp);
251 #define SETNA_sh4r(disp) OP(0x0F); OP(0x96); MODRM_r32_sh4r(0, disp);
252 #define SETNAE_sh4r(disp) OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
253 #define SETNG_sh4r(disp) OP(0x0F); OP(0x9E); MODRM_r32_sh4r(0, disp);
254 #define SETNGE_sh4r(disp) OP(0x0F); OP(0x9C); MODRM_r32_sh4r(0, disp);
255 #define SETNC_sh4r(disp) OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
256 #define SETNO_sh4r(disp) OP(0x0F); OP(0x91); MODRM_r32_sh4r(0, disp);
258 #define SETE_t() SETE_sh4r(R_T)
259 #define SETA_t() SETA_sh4r(R_T)
260 #define SETAE_t() SETAE_sh4r(R_T)
261 #define SETG_t() SETG_sh4r(R_T)
262 #define SETGE_t() SETGE_sh4r(R_T)
263 #define SETC_t() SETC_sh4r(R_T)
264 #define SETO_t() SETO_sh4r(R_T)
265 #define SETNE_t() SETNE_sh4r(R_T)
267 #define SETC_r8(r1) OP(0x0F); OP(0x92); MODRM_rm32_r32(r1, 0)
269 /* Pseudo-op Load carry from T: CMP [EBP+t], #01 ; CMC */
270 #define LDC_t() OP(0x83); MODRM_r32_sh4r(7,R_T); OP(0x01); CMC()
272 #endif /* !__lxdream_x86op_H */
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