lxdream 0.9.1| filename | src/pvr2/pvr2.c |
| changeset | 98:7b59bca968e9 |
| prev | 94:8d80d9c7cc7d |
| next | 100:995e42e96cc9 |
| author | nkeynes |
| date | Wed Feb 15 12:41:02 2006 +0000 (18 years ago) |
| permissions | -rw-r--r-- |
| last change | Reorg files slightly (move audio drivers into drivers, pvr2 code into its own directory) |
| view | annotate | diff | log | raw |
1 /**
2 * $Id: pvr2.c,v 1.15 2006-02-15 12:40:20 nkeynes Exp $
3 *
4 * PVR2 (Video) MMIO and supporting functions.
5 *
6 * Copyright (c) 2005 Nathan Keynes.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18 #define MODULE pvr2_module
20 #include "dream.h"
21 #include "video.h"
22 #include "mem.h"
23 #include "asic.h"
24 #include "pvr2.h"
25 #include "sh4/sh4core.h"
26 #define MMIO_IMPL
27 #include "pvr2.h"
29 char *video_base;
31 void pvr2_init( void );
32 uint32_t pvr2_run_slice( uint32_t );
33 void pvr2_display_frame( void );
35 video_driver_t video_driver = NULL;
36 struct video_buffer video_buffer[2];
37 int video_buffer_idx = 0;
39 struct dreamcast_module pvr2_module = { "PVR2", pvr2_init, NULL, NULL,
40 pvr2_run_slice, NULL,
41 NULL, NULL };
43 void pvr2_init( void )
44 {
45 register_io_region( &mmio_region_PVR2 );
46 register_io_region( &mmio_region_PVR2PAL );
47 register_io_region( &mmio_region_PVR2TA );
48 video_base = mem_get_region_by_name( MEM_REGION_VIDEO );
49 video_driver = &video_gtk_driver;
50 video_driver->set_output_format( 640, 480, COLFMT_RGB32 );
51 }
53 uint32_t pvr2_time_counter = 0;
54 uint32_t pvr2_frame_counter = 0;
55 uint32_t pvr2_time_per_frame = 20000000;
57 uint32_t pvr2_run_slice( uint32_t nanosecs )
58 {
59 pvr2_time_counter += nanosecs;
60 while( pvr2_time_counter >= pvr2_time_per_frame ) {
61 pvr2_display_frame();
62 pvr2_time_counter -= pvr2_time_per_frame;
63 }
64 return nanosecs;
65 }
67 uint32_t vid_stride, vid_lpf, vid_ppl, vid_hres, vid_vres, vid_col;
68 int interlaced, bChanged = 1, bEnabled = 0, vid_size = 0;
69 char *frame_start; /* current video start address (in real memory) */
71 /*
72 * Display the next frame, copying the current contents of video ram to
73 * the window. If the video configuration has changed, first recompute the
74 * new frame size/depth.
75 */
76 void pvr2_display_frame( void )
77 {
78 int dispsize = MMIO_READ( PVR2, DISPSIZE );
79 int dispmode = MMIO_READ( PVR2, DISPMODE );
80 int vidcfg = MMIO_READ( PVR2, VIDCFG );
81 int vid_stride = ((dispsize & DISPSIZE_MODULO) >> 20) - 1;
82 int vid_lpf = ((dispsize & DISPSIZE_LPF) >> 10) + 1;
83 int vid_ppl = ((dispsize & DISPSIZE_PPL)) + 1;
84 gboolean bEnabled = (dispmode & DISPMODE_DE) && (vidcfg & VIDCFG_VO ) ? TRUE : FALSE;
85 gboolean interlaced = (vidcfg & VIDCFG_I ? TRUE : FALSE);
86 if( bEnabled ) {
87 video_buffer_t buffer = &video_buffer[video_buffer_idx];
88 video_buffer_idx = !video_buffer_idx;
89 video_buffer_t last = &video_buffer[video_buffer_idx];
90 buffer->colour_format = (dispmode & DISPMODE_COL);
91 buffer->rowstride = (vid_ppl + vid_stride) << 2;
92 buffer->data = frame_start = video_base + MMIO_READ( PVR2, DISPADDR1 );
93 buffer->vres = vid_lpf;
94 if( interlaced ) buffer->vres <<= 1;
95 switch( buffer->colour_format ) {
96 case COLFMT_RGB15:
97 case COLFMT_RGB16: buffer->hres = vid_ppl << 1; break;
98 case COLFMT_RGB24: buffer->hres = (vid_ppl << 2) / 3; break;
99 case COLFMT_RGB32: buffer->hres = vid_ppl; break;
100 }
102 if( video_driver != NULL ) {
103 if( buffer->hres != last->hres ||
104 buffer->vres != last->vres ||
105 buffer->colour_format != last->colour_format) {
106 video_driver->set_output_format( buffer->hres, buffer->vres,
107 buffer->colour_format );
108 }
109 if( MMIO_READ( PVR2, VIDCFG2 ) & 0x08 ) { /* Blanked */
110 uint32_t colour = MMIO_READ( PVR2, BORDERCOL );
111 video_driver->display_blank_frame( colour );
112 } else {
113 video_driver->display_frame( buffer );
114 }
115 }
116 } else {
117 video_buffer_idx = 0;
118 video_buffer[0].hres = video_buffer[0].vres = 0;
119 }
120 pvr2_frame_counter++;
121 asic_event( EVENT_SCANLINE1 );
122 asic_event( EVENT_SCANLINE2 );
123 asic_event( EVENT_RETRACE );
124 }
126 void mmio_region_PVR2_write( uint32_t reg, uint32_t val )
127 {
128 if( reg >= 0x200 && reg < 0x600 ) { /* Fog table */
129 MMIO_WRITE( PVR2, reg, val );
130 /* I don't want to hear about these */
131 return;
132 }
134 INFO( "PVR2 write to %08X <= %08X [%s: %s]", reg, val,
135 MMIO_REGID(PVR2,reg), MMIO_REGDESC(PVR2,reg) );
137 switch(reg) {
138 case RENDSTART:
139 if( val == 0xFFFFFFFF )
140 pvr2_render_scene();
141 break;
142 }
143 MMIO_WRITE( PVR2, reg, val );
144 }
146 MMIO_REGION_READ_FN( PVR2, reg )
147 {
148 switch( reg ) {
149 case BEAMPOS:
150 return sh4r.icount&0x20 ? 0x2000 : 1;
151 default:
152 return MMIO_READ( PVR2, reg );
153 }
154 }
156 MMIO_REGION_DEFFNS( PVR2PAL )
158 void pvr2_set_base_address( uint32_t base )
159 {
160 mmio_region_PVR2_write( DISPADDR1, base );
161 }
164 void pvr2_render_scene( void )
165 {
166 /* Actual rendering goes here :) */
167 asic_event( EVENT_PVR_RENDER_DONE );
168 DEBUG( "Rendered frame %d", pvr2_frame_counter );
169 }
171 /** Tile Accelerator */
173 struct tacmd {
174 uint32_t command;
175 uint32_t param1;
176 uint32_t param2;
177 uint32_t texture;
178 float alpha;
179 float red;
180 float green;
181 float blue;
182 };
184 struct vertex_type1 {
185 uint32_t command;
186 float x, y, z;
187 uint32_t blank, blank2;
188 uint32_t col;
189 float f;
190 };
192 int32_t mmio_region_PVR2TA_read( uint32_t reg )
193 {
194 return 0xFFFFFFFF;
195 }
197 char pvr2ta_remainder[8];
199 void mmio_region_PVR2TA_write( uint32_t reg, uint32_t val )
200 {
201 DEBUG( "Direct write to TA %08X", val );
202 }
204 unsigned int pvr2_last_poly_type = 0;
206 void pvr2ta_write( char *buf, uint32_t length )
207 {
208 int i;
209 struct tacmd *cmd_list = (struct tacmd *)buf;
210 int count = length >> 5;
211 for( i=0; i<count; i++ ){
212 unsigned int type = (cmd_list[i].command >> 24) & 0xFF;
213 if( type == 0xE0 || type == 0xF0 ) {
214 struct vertex_type1 *vert = (struct vertex_type1 *)&cmd_list[i];
215 DEBUG( "PVR2 vrt: %f %f %f %08X %08X %08X %f", vert->x, vert->y, vert->z, vert->blank, vert->blank2, vert->col, vert->f );
216 } else {
217 DEBUG( "PVR2 cmd: %08X %08X %08X %08X %08X %08X %08X %08X", cmd_list[i].command, cmd_list[i].param1, cmd_list[i].param2, cmd_list[i].texture, cmd_list[i].alpha, cmd_list[i].red, cmd_list[i].green, cmd_list[i].blue );
218 }
219 if( type == 0 ) {
220 /* End of list */
221 switch( pvr2_last_poly_type ) {
222 case 0x80: /* Opaque polys */
223 asic_event( EVENT_PVR_OPAQUE_DONE );
224 break;
225 case 0x81: /* Opaque poly modifier */
226 asic_event( EVENT_PVR_OPAQUEMOD_DONE );
227 break;
228 case 0x82: /* Transparent polys */
229 asic_event( EVENT_PVR_TRANS_DONE );
230 break;
231 case 0x83: /* Transparent poly modifier */
232 asic_event( EVENT_PVR_TRANSMOD_DONE );
233 break;
234 case 0x84: /* Punchthrough */
235 asic_event( EVENT_PVR_PUNCHOUT_DONE );
236 break;
237 }
238 pvr2_last_poly_type = 0;
239 } else if( type >= 0x80 && type <= 0x84 ) {
240 pvr2_last_poly_type = type;
241 }
242 }
243 }
.