2 * $Id: ide.c,v 1.12 2006-05-03 12:52:38 nkeynes Exp $
4 * IDE interface implementation
6 * Copyright (c) 2005 Nathan Keynes.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #define MODULE ide_module
25 #include "gdrom/ide.h"
26 #include "gdrom/gdrom.h"
27 #include "gdrom/packet.h"
29 #define MAX_WRITE_BUF 4096
30 #define MAX_SECTOR_SIZE 2352 /* Audio sector */
31 #define DEFAULT_DATA_SECTORS 8
33 static void ide_init( void );
34 static void ide_reset( void );
35 static void ide_save_state( FILE *f );
36 static int ide_load_state( FILE *f );
37 static void ide_raise_interrupt( void );
38 static void ide_clear_interrupt( void );
40 struct dreamcast_module ide_module = { "IDE", ide_init, ide_reset, NULL, NULL,
41 NULL, ide_save_state, ide_load_state };
43 struct ide_registers idereg;
45 static unsigned char command_buffer[12];
46 unsigned char *data_buffer = NULL;
47 uint32_t data_buffer_len = 0;
49 /* "\0\0\0\0\xb4\x19\0\0\x08SE REV 6.42990316" */
50 unsigned char gdrom_ident[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0xb4, 0x19, 0x00,
51 0x00, 0x08, 0x53, 0x45, 0x20, 0x20, 0x20, 0x20,
52 0x20, 0x20, 0x52, 0x65, 0x76, 0x20, 0x36, 0x2e,
53 0x34, 0x32, 0x39, 0x39, 0x30, 0x33, 0x31, 0x36 };
56 static void ide_init( void )
59 data_buffer_len = DEFAULT_DATA_SECTORS;
60 data_buffer = malloc( MAX_SECTOR_SIZE * data_buffer_len );
61 assert( data_buffer != NULL );
64 static void ide_reset( void )
66 ide_clear_interrupt();
69 idereg.lba0 = /* 0x21; */ 0x81;
72 idereg.feature = 0; /* Indeterminate really */
75 idereg.disc = gdrom_is_mounted() ? (IDE_DISC_CDROM|IDE_DISC_READY) : IDE_DISC_NONE;
78 static void ide_save_state( FILE *f )
84 static int ide_load_state( FILE *f )
89 static void ide_set_write_buffer( unsigned char *buf, int len )
91 idereg.status |= IDE_ST_DATA;
94 idereg.writeptr = (uint16_t *)buf;
95 idereg.readptr = NULL;
98 static void ide_set_read_buffer( unsigned char *buf, int len, int blocksize )
100 idereg.status |= IDE_ST_DATA;
102 idereg.datalen = len;
103 idereg.readptr = (uint16_t *)buf;
104 idereg.writeptr = NULL;
105 idereg.lba1 = len&0xFF;
106 idereg.lba2 = len>>8;
107 idereg.blocksize = idereg.blockleft = blocksize;
110 static void ide_raise_interrupt( void )
112 if( idereg.intrq_pending == 0 ) {
113 idereg.intrq_pending = 1;
114 if( IS_IDE_IRQ_ENABLED() )
115 asic_event( EVENT_IDE );
119 static void ide_clear_interrupt( void )
121 if( idereg.intrq_pending != 0 ) {
122 idereg.intrq_pending = 0;
123 if( IS_IDE_IRQ_ENABLED() )
124 asic_clear_event( EVENT_IDE );
128 static void ide_set_error( int error_code )
130 idereg.status = 0x51;
131 idereg.error = error_code;
134 uint8_t ide_read_status( void )
136 if( (idereg.status & IDE_ST_BUSY) == 0 )
137 ide_clear_interrupt();
138 return idereg.status;
141 uint16_t ide_read_data_pio( void ) {
142 if( idereg.readptr == NULL )
144 uint16_t rv = *idereg.readptr++;
147 if( idereg.datalen <=0 ) {
148 idereg.readptr = NULL;
149 idereg.status &= ~IDE_ST_DATA;
150 ide_raise_interrupt();
151 } else if( idereg.blockleft <= 0 ) {
152 ide_raise_interrupt();
153 idereg.blockleft = idereg.blocksize;
158 void ide_write_data_pio( uint16_t val ) {
159 if( idereg.writeptr == NULL )
161 *idereg.writeptr++ = val;
163 if( idereg.datalen <= 0 ) {
164 int len = ((unsigned char *)idereg.writeptr) - idereg.data;
165 idereg.writeptr = NULL;
166 idereg.status &= ~IDE_ST_DATA;
167 ide_write_buffer( idereg.data, len );
171 void ide_write_control( uint8_t val ) {
172 if( IS_IDE_IRQ_ENABLED() ) {
173 if( (val & 0x02) != 0 && idereg.intrq_pending != 0 )
174 asic_clear_event( EVENT_IDE );
176 if( (val & 0x02) == 0 && idereg.intrq_pending != 0 )
177 asic_event( EVENT_IDE );
179 idereg.control = val;
182 void ide_write_command( uint8_t val ) {
183 ide_clear_interrupt();
184 idereg.command = val;
186 case IDE_CMD_RESET_DEVICE:
190 ide_set_write_buffer(command_buffer,12);
192 case IDE_CMD_SET_FEATURE:
193 switch( idereg.feature ) {
194 case IDE_FEAT_SET_TRANSFER_MODE:
195 switch( idereg.count & 0xF8 ) {
197 INFO( "Set PIO default mode: %d", idereg.count&0x07 );
199 case IDE_XFER_PIO_FLOW:
200 INFO( "Set PIO Flow-control mode: %d", idereg.count&0x07 );
202 case IDE_XFER_MULTI_DMA:
203 INFO( "Set Multiword DMA mode: %d", idereg.count&0x07 );
205 case IDE_XFER_ULTRA_DMA:
206 INFO( "Set Ultra DMA mode: %d", idereg.count&0x07 );
209 INFO( "Setting unknown transfer mode: %02X", idereg.count );
214 WARN( "IDE: unimplemented feature: %02X", idereg.feature );
216 ide_raise_interrupt( );
219 WARN( "IDE: Unimplemented command: %02X", val );
221 idereg.status = (idereg.status | IDE_ST_READY | IDE_ST_SERV) & (~IDE_ST_ERROR);
224 void ide_set_packet_error( uint16_t error )
226 idereg.gdrom_error = error;
227 idereg.error = (error & 0x0F) << 4;
229 idereg.status = 0x51;
234 * Execute a packet command. This particular method is responsible for parsing
235 * the command buffers (12 bytes), and generating the appropriate responses,
236 * although the actual implementation is mostly delegated to gdrom.c
238 void ide_packet_command( unsigned char *cmd )
240 uint32_t length, datalen;
241 uint32_t lba, status;
243 int blocksize = idereg.lba1 + (idereg.lba2<<8);
245 ide_raise_interrupt( );
246 /* Okay we have the packet in the command buffer */
247 WARN( "ATAPI: Received Packet command: %02X", cmd[0] );
248 fwrite_dump( (unsigned char *)cmd, 12, stderr );
250 case PKT_CMD_TEST_READY:
251 if( !gdrom_is_mounted() ) {
252 ide_set_packet_error( PKT_ERR_NODISC );
255 ide_set_packet_error( 0 );
256 idereg.status = 0x50;
259 case PKT_CMD_IDENTIFY:
261 if( lba >= sizeof(gdrom_ident) ) {
262 ide_set_error(PKT_ERR_BADFIELD);
266 if( lba+length > sizeof(gdrom_ident) )
267 length = sizeof(gdrom_ident) - lba;
268 ide_set_read_buffer(gdrom_ident + lba, length, blocksize);
271 memset( data_buffer, 0, 10 );
275 data_buffer[0] = 0xf0;
276 data_buffer[2] = idereg.gdrom_error & 0xFF;
277 data_buffer[8] = (idereg.gdrom_error >> 8) & 0xFF;
278 ide_set_read_buffer( data_buffer, length , blocksize );
280 case PKT_CMD_READ_TOC:
281 if( !gdrom_get_toc( data_buffer ) ) {
282 ide_set_packet_error( PKT_ERR_NODISC ); /* No disc in drive */
285 length = (cmd[3]<<8) | cmd[4];
286 if( length > sizeof(struct gdrom_toc) )
287 length = sizeof(struct gdrom_toc);
288 ide_set_read_buffer( data_buffer, length, blocksize );
290 case PKT_CMD_READ_SECTOR:
291 lba = cmd[2] << 16 | cmd[3] << 8 | cmd[4];
292 length = cmd[8] << 16 | cmd[9] << 8 | cmd[10]; /* blocks */
293 if( length > data_buffer_len ) {
295 data_buffer_len = data_buffer_len << 1;
296 } while( data_buffer_len < length );
297 data_buffer = realloc( data_buffer, data_buffer_len );
301 case 0x20: mode = GDROM_MODE1; break;
302 case 0x24: mode = GDROM_GD; break;
303 case 0x28: mode = GDROM_MODE1; break; /* ??? */
304 case 0x30: mode = GDROM_RAW; break;
306 ERROR( "Unrecognized read mode '%02X' in GD-Rom read request", cmd[1] );
307 ide_set_packet_error( PKT_ERR_BADFIELD );
311 status = gdrom_read_sectors( lba, length, mode, data_buffer, &data_buffer_len );
313 ide_set_packet_error( status );
314 data_buffer[6] = (lba >> 8) & 0xFF;
315 data_buffer[7] = lba & 0xFF;
318 ide_set_read_buffer( data_buffer, datalen, blocksize );
321 ide_set_packet_error( PKT_ERR_BADCMD ); /* Invalid command */
324 ide_set_packet_error( PKT_ERR_OK );
327 void ide_write_buffer( unsigned char *data, int datalen ) {
328 switch( idereg.command ) {
330 ide_packet_command( data );
338 * This method is called from the ASIC side when a DMA read request is
339 * initiated. If there is a pending DMA transfer already, we copy the
340 * data immediately, otherwise we record the DMA buffer for use when we
341 * get to actually doing the transfer.
343 void ide_dma_read_req( uint32_t addr, uint32_t length )
.